| /freebsd/sys/contrib/device-tree/Bindings/board/ |
| H A D | fsl-board.txt | 45 cpld@3,0 {
67 * Freescale on-board CPLD
69 Some Freescale boards like T1040RDB have an on board CPLD connected.
72 - compatible: Should be a board-specific string like "fsl,<board>-cpld"
74 "fsl,t1040rdb-cpld", "fsl,t1042rdb-cpld", "fsl,t1042rdb_pi-cpld"
75 - reg: should describe CPLD registers
78 cpld@3,0 {
79 compatible = "fsl,t1040rdb-cpld";
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| H A D | fsl,fpga-qixis.yaml | 7 title: Freescale on-board FPGA/CPLD
35 - fsl,ls1043ardb-cpld
36 - fsl,ls1046ardb-cpld
37 - fsl,t1040rdb-cpld
38 - fsl,t1042rdb-cpld
39 - fsl,t1042rdb_pi-cpld
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| /freebsd/sys/powerpc/amigaone/ |
| H A D | cpld_a1222.c | 45 #include "cpld.h"
48 * A driver for the AmigaOne A1222 "Tabor" Main CPLD.
50 * The main CPLD is the interface between the CPU and the GPIO CPLD.
51 * Communication with the GPIO CPLD is over the main CPLD's mailbox interface,
52 * along with the dual-port RAM on the CPLD.
54 * Only one process can open the CPLD character device at a time. The driver
65 /* CPLD Registers. */
122 "cpld",
127 DRIVER_MODULE(cpld, lbc, cpld_driver, 0, 0);
174 if (!ofw_bus_is_compatible(dev, "aeon,tabor-cpld")) in cpld_probe()
[all …]
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| H A D | cpld_x5000.c | 43 #include "cpld.h"
46 * A driver for the AmigaOne X5000 "Cyrus+" CPLD.
51 * communicate with the Xena by issuing ioctl()s to this CPLD.
60 /* CPLD Registers. */
109 "cpld",
114 DRIVER_MODULE(cpld, lbc, cpld_driver, 0, 0);
134 if (!ofw_bus_is_compatible(dev, "aeon,cyrus-cpld")) in cpld_probe()
137 device_set_desc(dev, "AmigaOne Cyrus CPLD"); in cpld_probe()
163 mtx_init(&sc->sc_mutex, "cpld", NULL, MTX_DEF); in cpld_attach()
193 err = make_dev_s(&mda, &sc->sc_cdev, "cpld"); in cpld_attach()
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| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | delta,tn48m-cpld.yaml | 4 $id: http://devicetree.org/schemas/mfd/delta,tn48m-cpld.yaml#
7 title: Delta Networks TN48M CPLD controller
13 Lattice CPLD onboard the TN48M switches is used for system
24 const: delta,tn48m-cpld
58 cpld@41 {
59 compatible = "delta,tn48m-cpld";
|
| H A D | qriox.txt | 1 KEYMILE qrio Board Control CPLD
|
| /freebsd/sys/contrib/device-tree/src/powerpc/ |
| H A D | turris1x.dts | 259 <0x3 0x0 0x0 0xffa00000 0x00020000>; /* CPLD */
340 cpld@3,0 {
342 * Turris CPLD firmware which runs on this Lattice FPGA,
343 * is extended version of P1021RDB-PC CPLD v4.1 firmware.
346 * Turris CPLD firmware is open source and available at:
349 compatible = "cznic,turris1x-cpld", "fsl,p1021rdb-pc-cpld", "simple-bus", "syscon";
358 * CPLD firmware maps SET0, SET1 and SET2
359 * input logic of MAX6370KA+T chip to CPLD
361 * input logic is outside of the CPLD and
371 * CPLD firmware which manages system reset and
[all …]
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| H A D | motionpro.dts | 101 // 8-bit board CPLD on LocalPlus Bus CS2
102 cpld@2,0 {
103 compatible = "promess,motionpro-cpld";
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| H A D | mpc5121ads.dts | 64 compatible = "fsl,mpc5121ads-cpld";
69 compatible = "fsl,mpc5121ads-cpld-pic";
|
| /freebsd/sys/contrib/device-tree/Bindings/gpio/ |
| H A D | delta,tn48m-gpio.yaml | 7 title: Delta Networks TN48M CPLD GPIO controller
14 details see ../mfd/delta,tn48m-cpld.yaml.
16 Delta TN48M has an onboard Lattice CPLD that is used as an GPIO expander.
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| /freebsd/sys/contrib/device-tree/src/powerpc/fsl/ |
| H A D | t1042rdb.dts | 70 cpld@3,0 {
71 compatible = "fsl,t104xrdb-cpld", "fsl,deepsleep-cpld";
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| H A D | t1042rdb_pi.dts | 43 cpld@3,0 {
44 compatible = "fsl,t104xrdb-cpld", "fsl,deepsleep-cpld";
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| H A D | t1042d4rdb.dts | 46 cpld@3,0 {
47 compatible = "fsl,t1040d4rdb-cpld",
48 "fsl,deepsleep-cpld";
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| H A D | t1040rdb.dts | 106 cpld@3,0 {
107 compatible = "fsl,t104xrdb-cpld", "fsl,deepsleep-cpld";
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| H A D | p1020rdb-pd.dts | 47 /* NOR, NAND flash, L2 switch and CPLD */
131 cpld@2,0 {
132 compatible = "fsl,p1020rdb-pd-cpld";
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| /freebsd/sys/contrib/device-tree/Bindings/memory-controllers/fsl/ |
| H A D | ifc.txt | 41 /* NOR, NAND Flashes and CPLD on board */
76 cpld@3,0 {
79 compatible = "fsl,p1010rdb-cpld";
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| /freebsd/sys/contrib/device-tree/Bindings/reset/ |
| H A D | delta,tn48m-reset.yaml | 7 title: Delta Networks TN48M CPLD reset controller
14 details see ../mfd/delta,tn48m-cpld.yaml.
|
| /freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | fsl-ls1046a-rdb.dts | 81 /* NAND Flashe and CPLD on board */
93 cpld: board-control@2,0 { label
94 compatible = "fsl,ls1046ardb-cpld";
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| /freebsd/sys/contrib/device-tree/Bindings/net/ |
| H A D | hisilicon-hns-dsaf.txt | 41 - cpld-syscon: is syscon handle + register offset pair for cpld register. It is
42 not required if there isn't cpld device.
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| /freebsd/sys/contrib/device-tree/src/arm/aspeed/ |
| H A D | aspeed-bmc-facebook-greatlakes.dts | 267 /*O0-O7*/ "","","","","","","fan0-bmc-cpld-enable","fan1-bmc-cpld-enable",
268 /*P0-P7*/ "fan2-bmc-cpld-enable","fan3-bmc-cpld-enable",
|
| H A D | aspeed-bmc-facebook-catalina.dts | 673 // SCM CPLD IOEXP
766 // PDB CPLD IOEXP 0x10
776 // PDB CPLD IOEXP 0x11
786 // PDB CPLD IOEXP 0x12
796 // PDB CPLD IOEXP 0x13
806 // PDB CPLD IOEXP 0x14
816 // PDB CPLD IOEXP 0x15
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| /freebsd/sys/contrib/device-tree/src/arm64/hisilicon/ |
| H A D | hip05-d02.dts | 78 cpld@100000000 {
79 compatible = "hisilicon,hip05-cpld";
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| /freebsd/sys/contrib/device-tree/Bindings/scsi/ |
| H A D | hisilicon-sas.txt | 12 register. The second is the address and length of CPLD register for
14 we use a CPLD for directly attached disk LED control.
|
| /freebsd/sys/dev/sfxge/common/ |
| H A D | efx_regs_mcdi_aoe.h | 2215 /* enum: FPGA and CPLD information */
2221 /* enum: Set CPLD to idle */
2223 /* enum: Read from CPLD register */
2225 /* enum: Write to CPLD register */
2227 /* enum: Execute CPLD instruction */
2229 /* enum: Reprogram the CPLD on the AOE device */
2330 /* enum: Reprogram CPLD, poll for completion */
2332 /* enum: Reprogram CPLD, send event on completion */
2634 /* JTAG IDCODE of CPLD */
2637 /* Version of CPLD */
[all …]
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| /freebsd/sys/contrib/device-tree/include/dt-bindings/reset/ |
| H A D | delta,tn48m-reset.h | 3 * Delta TN48M CPLD GPIO driver
|