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Searched full:cpen (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/s390/crypto/
H A Dzcrypt_api.c646 int cpen, qpen, qid = 0, rc = -ENODEV; in zcrypt_rsa_modexpo() local
688 cpen = (tr && tr->again_counter && tr->last_qid && in zcrypt_rsa_modexpo()
691 if (!zcrypt_card_compare(zc, pref_zc, wgt + cpen, pref_wgt)) in zcrypt_rsa_modexpo()
707 wgt + cpen + qpen, pref_wgt)) in zcrypt_rsa_modexpo()
711 pref_wgt = wgt + cpen + qpen; in zcrypt_rsa_modexpo()
750 int cpen, qpen, qid = 0, rc = -ENODEV; in zcrypt_rsa_crt() local
792 cpen = (tr && tr->again_counter && tr->last_qid && in zcrypt_rsa_crt()
795 if (!zcrypt_card_compare(zc, pref_zc, wgt + cpen, pref_wgt)) in zcrypt_rsa_crt()
811 wgt + cpen + qpen, pref_wgt)) in zcrypt_rsa_crt()
815 pref_wgt = wgt + cpen + qpen; in zcrypt_rsa_crt()
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/linux/drivers/extcon/
H A Dextcon-max8997.c216 ctrl2 |= CONTROL2_CPEN_MASK; /* LowPwr=0, CPEn=1 */ in max8997_muic_set_path()
218 ctrl2 |= CONTROL2_LOWPWR_MASK; /* LowPwr=1, CPEn=0 */ in max8997_muic_set_path()
H A Dextcon-max14577.c224 ctrl2 |= CTRL2_CPEN_MASK; /* LowPwr=0, CPEn=1 */ in max14577_muic_set_path()
226 ctrl2 |= CTRL2_LOWPWR_MASK; /* LowPwr=1, CPEn=0 */ in max14577_muic_set_path()
H A Dextcon-max77693.c276 ctrl2 |= MAX77693_CONTROL2_CPEN_MASK; /* LowPwr=0, CPEn=1 */ in max77693_muic_set_path()
278 ctrl2 |= MAX77693_CONTROL2_LOWPWR_MASK; /* LowPwr=1, CPEn=0 */ in max77693_muic_set_path()
/linux/sound/pci/oxygen/
H A Dxonar_cs43xx.c105 /* set CPEN (control port mode) and power down */ in cs43xx_registers_init()
/linux/arch/alpha/include/asm/
H A Dcore_titan.h71 titan_64 cpen; member
/linux/drivers/usb/dwc3/
H A Dcore.h1135 * @ulpi_ext_vbus_drv: Set to confiure the upli chip to drives CPEN pin
H A Dcore.c767 * the CPEN pin requires the configuration of the ULPI DRVVBUSEXTERNAL in dwc3_hs_phy_setup()