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/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dsamsung,exynos5433-clock.yaml29 - samsung,exynos5433-cmu-top
31 - samsung,exynos5433-cmu-cpif
33 - samsung,exynos5433-cmu-mif
36 - samsung,exynos5433-cmu-peric
38 - samsung,exynos5433-cmu-peris
40 - samsung,exynos5433-cmu-fsys
41 - samsung,exynos5433-cmu-g2d
43 - samsung,exynos5433-cmu-disp
44 - samsung,exynos5433-cmu-aud
45 - samsung,exynos5433-cmu-bus0
[all …]
H A Dexynos5433-clock.txt1 * Samsung Exynos5433 CMU (Clock Management Units)
9 - "samsung,exynos5433-cmu-top" - clock controller compatible for CMU_TOP
12 - "samsung,exynos5433-cmu-cpif" - clock controller compatible for CMU_CPIF
14 - "samsung,exynos5433-cmu-mif" - clock controller compatible for CMU_MIF
16 - "samsung,exynos5433-cmu-peric" - clock controller compatible for CMU_PERIC
18 - "samsung,exynos5433-cmu-peris" - clock controller compatible for CMU_PERIS
20 - "samsung,exynos5433-cmu-fsys" - clock controller compatible for CMU_FSYS
22 - "samsung,exynos5433-cmu-g2d" - clock controller compatible for CMU_G2D
24 - "samsung,exynos5433-cmu-disp" - clock controller compatible for CMU_DISP
26 - "samsung,exynos5433-cmu-aud" - clock controller compatible for CMU_AUD
[all …]
H A Dsamsung,exynos850-clock.yaml17 Exynos850 clock controller is comprised of several CMU units, generating
18 clocks for different domains. Those CMU units are modeled as separate device
23 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
34 - samsung,exynos850-cmu-top
35 - samsung,exynos850-cmu-apm
36 - samsung,exynos850-cmu-aud
37 - samsung,exynos850-cmu-cmgp
38 - samsung,exynos850-cmu-core
39 - samsung,exynos850-cmu-cpucl0
40 - samsung,exynos850-cmu-cpucl1
[all …]
H A Dsamsung,exynosautov9-clock.yaml17 Exynos Auto v9 clock controller is comprised of several CMU units, generating
18 clocks for different domains. Those CMU units are modeled as separate device
23 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
35 - samsung,exynosautov9-cmu-top
36 - samsung,exynosautov9-cmu-busmc
37 - samsung,exynosautov9-cmu-core
38 - samsung,exynosautov9-cmu-dpum
39 - samsung,exynosautov9-cmu-fsys0
40 - samsung,exynosautov9-cmu-fsys1
41 - samsung,exynosautov9-cmu-fsys2
[all …]
H A Dgoogle,gs101-clock.yaml13 Google GS101 clock controller is comprised of several CMU units, generating
14 clocks for different domains. Those CMU units are modeled as separate device
19 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
30 - google,gs101-cmu-top
31 - google,gs101-cmu-apm
32 - google,gs101-cmu-misc
33 - google,gs101-cmu-hsi0
34 - google,gs101-cmu-hsi2
35 - google,gs101-cmu-peric0
36 - google,gs101-cmu-peric1
[all …]
H A Dsamsung,exynosautov920-clock.yaml16 ExynosAuto v920 clock controller is comprised of several CMU units, generating
17 clocks for different domains. Those CMU units are modeled as separate device
22 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
34 - samsung,exynosautov920-cmu-top
35 - samsung,exynosautov920-cmu-peric0
36 - samsung,exynosautov920-cmu-peric1
37 - samsung,exynosautov920-cmu-misc
38 - samsung,exynosautov920-cmu-hsi0
39 - samsung,exynosautov920-cmu-hsi1
60 const: samsung,exynosautov920-cmu-top
[all …]
H A Dactions,owl-cmu.txt1 * Actions Semi Owl Clock Management Unit (CMU)
10 "actions,s900-cmu"
11 "actions,s700-cmu"
12 "actions,s500-cmu"
23 dt-bindings/clock/actions,s900-cmu.h or actions,s700-cmu.h or
24 actions,s500-cmu.h header and can be used in device tree sources.
31 Actions Semi S900 CMU also requires one more clock:
36 cmu: clock-controller@e0160000 {
37 compatible = "actions,s900-cmu";
51 clocks = <&cmu CLK_UART5>;
H A Dexynos3250-clock.txt9 - "samsung,exynos3250-cmu" - controller compatible with Exynos3250 SoC.
10 - "samsung,exynos3250-cmu-dmc" - controller compatible with
12 - "samsung,exynos3250-cmu-isp" - ISP block clock controller compatible
29 cmu: clock-controller@10030000 {
30 compatible = "samsung,exynos3250-cmu";
36 compatible = "samsung,exynos3250-cmu-dmc";
42 compatible = "samsung,exynos3250-cmu-isp";
55 clocks = <&cmu CLK_UART0>, <&cmu CLK_SCLK_UART0>;
H A Dsamsung,exynos7885-clock.yaml17 Exynos7885 clock controller is comprised of several CMU units, generating
18 clocks for different domains. Those CMU units are modeled as separate device
23 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
34 - samsung,exynos7885-cmu-top
35 - samsung,exynos7885-cmu-core
36 - samsung,exynos7885-cmu-fsys
37 - samsung,exynos7885-cmu-peri
58 const: samsung,exynos7885-cmu-top
74 const: samsung,exynos7885-cmu-core
96 const: samsung,exynos7885-cmu-fsys
[all …]
H A Dsamsung,exynos-clock.yaml23 - samsung,exynos3250-cmu
24 - samsung,exynos3250-cmu-dmc
25 - samsung,exynos3250-cmu-isp
/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos3250.dtsi81 clocks = <&cmu CLK_DIV_ACLK_200>;
89 clocks = <&cmu CLK_DIV_ACLK_266>;
117 clocks = <&cmu CLK_DIV_ACLK_160>;
125 clocks = <&cmu CLK_DIV_GDL>;
133 clocks = <&cmu CLK_DIV_ACLK_400_MCUISP>;
161 clocks = <&cmu CLK_SCLK_MFC>;
169 clocks = <&cmu CLK_DIV_ACLK_100>;
191 clocks = <&cmu CLK_DIV_GDR>;
217 clocks = <&cmu CLK_ARM_CLK>;
240 clocks = <&cmu CLK_ARM_CLK>;
[all …]
H A Dexynos3250-artik5-eval.dts49 assigned-clocks = <&cmu CLK_MOUT_SPI0>, <&cmu CLK_DIV_SPI0>,
50 <&cmu CLK_DIV_SPI0_PRE>, <&cmu CLK_SCLK_SPI0>;
51 assigned-clock-parents = <&cmu CLK_DIV_MPLL_PRE>, /* for: CLK_MOUT_SPI0 */
52 <&cmu CLK_MOUT_SPI0>, /* for: CLK_DIV_SPI0 */
53 <&cmu CLK_DIV_SPI0>, /* for: CLK_DIV_SPI0_PRE */
54 <&cmu CLK_DIV_SPI0_PRE>; /* for: CLK_SCLK_SPI0 */
/freebsd/sys/contrib/device-tree/src/arm64/actions/
H A Ds900.dtsi6 #include <dt-bindings/clock/actions,s900-cmu.h>
125 clocks = <&cmu CLK_UART0>;
133 clocks = <&cmu CLK_UART1>;
141 clocks = <&cmu CLK_UART2>;
149 clocks = <&cmu CLK_UART3>;
157 clocks = <&cmu CLK_UART4>;
165 clocks = <&cmu CLK_UART5>;
173 clocks = <&cmu CLK_UART6>;
184 cmu: clock-controller@e0160000 { label
185 compatible = "actions,s900-cmu";
[all …]
H A Ds700.dtsi6 #include <dt-bindings/clock/actions,s700-cmu.h>
119 clocks = <&cmu CLK_UART0>;
127 clocks = <&cmu CLK_UART1>;
135 clocks = <&cmu CLK_UART2>;
143 clocks = <&cmu CLK_UART3>;
151 clocks = <&cmu CLK_UART4>;
159 clocks = <&cmu CLK_UART5>;
167 clocks = <&cmu CLK_UART6>;
172 cmu: clock-controller@e0168000 { label
173 compatible = "actions,s700-cmu";
[all …]
/freebsd/sys/contrib/device-tree/src/arm/actions/
H A Dowl-s500.dtsi8 #include <dt-bindings/clock/actions,s500-cmu.h>
136 clocks = <&cmu CLK_UART0>;
144 clocks = <&cmu CLK_UART1>;
152 clocks = <&cmu CLK_UART2>;
160 clocks = <&cmu CLK_UART3>;
168 clocks = <&cmu CLK_UART4>;
176 clocks = <&cmu CLK_UART5>;
184 clocks = <&cmu CLK_UART6>;
188 cmu: clock-controller@b0160000 { label
189 compatible = "actions,s500-cmu";
[all …]
/freebsd/libexec/bootpd/
H A DREADME2 This is an enhanced version of the CMU BOOTP server which was derived
8 <bootp@andrew.cmu.edu>
11 bootp-request@andrew.cmu.edu
23 [ From the CMU README file: ]
53 which enables the CMU extensions for CMU PC/IP.
83 ww0n@andrew.cmu.edu ddp@andrew.cmu.edu
106 bootptab.cmu A sample database file for the server
H A Dbootp.h16 IN NO EVENT SHALL CMU BE LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL
82 * Vendor magic cookie (v_magic) for CMU
84 #define VM_CMU "CMU"
131 * "vendor" data permitted for CMU bootp clients.
H A Dbootptab.cmu44 # (Host name lookups are relative to the domain: andrew.cmu.edu)
46 :hn:dn=cmu.edu:\
52 :gw=gw.cs.cmu.edu:\
68 # hosts, but we don't really use this feature at CMU):
/freebsd/contrib/sendmail/cf/cf/
H A Dcyrusproto.mc11 # supporting documentation, and that the name of CMU not be
15 # CMU DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING
17 # CMU BE LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR
23 # Contributed to Berkeley by John Gardiner Myers <jgm+@CMU.EDU>.
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dactions,owl-emac.yaml72 #include <dt-bindings/clock/actions,s500-cmu.h>
80 clocks = <&cmu 59 /*CLK_ETHERNET*/>, <&cmu CLK_RMII_REF>;
82 resets = <&cmu RESET_ETHERNET>;
/freebsd/contrib/sendmail/cf/mailer/
H A Dcyrus.m423 # supporting documentation, and that the name of CMU not be
27 # CMU DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING
29 # CMU BE LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR
35 # Contributed to Berkeley by John Gardiner Myers <jgm+@CMU.EDU>.
/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dexynos3250.h22 * Main CMU
260 * CMU DMC
281 * CMU ISP
/freebsd/sys/contrib/device-tree/src/arm64/exynos/
H A Dexynos850.dtsi250 compatible = "samsung,exynos850-cmu-peri";
262 compatible = "samsung,exynos850-cmu-cpucl1";
273 compatible = "samsung,exynos850-cmu-cpucl0";
284 compatible = "samsung,exynos850-cmu-g3d";
293 compatible = "samsung,exynos850-cmu-apm";
302 compatible = "samsung,exynos850-cmu-cmgp";
311 compatible = "samsung,exynos850-cmu-core";
325 compatible = "samsung,exynos850-cmu-top";
334 compatible = "samsung,exynos850-cmu-mfcmscl";
349 compatible = "samsung,exynos850-cmu-dpu";
[all …]
H A Dexynos5433.dtsi370 compatible = "samsung,exynos5433-cmu-top";
385 compatible = "samsung,exynos5433-cmu-cpif";
394 compatible = "samsung,exynos5433-cmu-mif";
405 compatible = "samsung,exynos5433-cmu-peric";
411 compatible = "samsung,exynos5433-cmu-peris";
417 compatible = "samsung,exynos5433-cmu-fsys";
444 compatible = "samsung,exynos5433-cmu-g2d";
458 compatible = "samsung,exynos5433-cmu-disp";
484 compatible = "samsung,exynos5433-cmu-aud";
493 compatible = "samsung,exynos5433-cmu-bus0";
[all …]
/freebsd/sys/contrib/device-tree/Bindings/devfreq/
H A Dexynos-bus.txt240 clocks = <&cmu CLK_DIV_GDL>;
248 clocks = <&cmu CLK_DIV_GDR>;
256 clocks = <&cmu CLK_DIV_ACLK_160>;
264 clocks = <&cmu CLK_DIV_ACLK_200>;
272 clocks = <&cmu CLK_DIV_ACLK_400_MCUISP>;
280 clocks = <&cmu CLK_DIV_ACLK_266>;
288 clocks = <&cmu CLK_DIV_ACLK_100>;
296 clocks = <&cmu CLK_SCLK_MFC>;

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