Searched full:clk_top_vcodecpll_370p5 (Results 1 – 5 of 5) sorted by relevance
| /linux/include/dt-bindings/clock/ |
| H A D | mediatek,mt6795-clk.h | 86 #define CLK_TOP_VCODECPLL_370P5 75 macro
|
| H A D | mt8173-clk.h | 88 #define CLK_TOP_VCODECPLL_370P5 78 macro
|
| /linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt8173.dtsi | 1421 <&topckgen CLK_TOP_VCODECPLL_370P5>;
1435 assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>,
1537 <&topckgen CLK_TOP_VCODECPLL_370P5>;
|
| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt6795-topckgen.c | 443 FACTOR(CLK_TOP_VCODECPLL_370P5, "vcodecpll_370p5", "vcodecpll", 1, 4),
|
| H A D | clk-mt8173-topckgen.c | 522 FACTOR(CLK_TOP_VCODECPLL_370P5, "vcodecpll_370p5", "vcodecpll", 1, 4),
|