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Searched full:clk_top_usb30_sel (Results 1 – 11 of 11) sorted by relevance

/linux/Documentation/devicetree/bindings/usb/
H A Dmediatek,mtu3.yaml245 clocks = <&topckgen CLK_TOP_USB30_SEL>;
263 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
281 clocks = <&topckgen CLK_TOP_USB30_SEL>;
295 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
H A Dmediatek,mtk-xhci.yaml217 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt2712e.dtsi806 clocks = <&topckgen CLK_TOP_USB30_SEL>;
821 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
870 clocks = <&topckgen CLK_TOP_USB30_SEL>;
885 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
H A Dmt8173.dtsi942 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
957 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
/linux/include/dt-bindings/clock/
H A Dmediatek,mt6795-clk.h102 #define CLK_TOP_USB30_SEL 91 macro
H A Dmt8173-clk.h104 #define CLK_TOP_USB30_SEL 94 macro
H A Dmt2712-clk.h141 #define CLK_TOP_USB30_SEL 110 macro
/linux/Documentation/devicetree/bindings/phy/
H A Dmediatek,tphy.yaml291 clocks = <&topckgen CLK_TOP_USB30_SEL>;
/linux/drivers/clk/mediatek/
H A Dclk-mt6795-topckgen.c470 TOP_MUX_GATE(CLK_TOP_USB30_SEL, "usb30_sel", usb30_parents, 0x70, 0, 2, 7, 0),
H A Dclk-mt8173-topckgen.c549 MUX_GATE(CLK_TOP_USB30_SEL, "usb30_sel", usb30_parents, 0x0070, 0, 2, 7),
H A Dclk-mt2712.c660 MUX_GATE(CLK_TOP_USB30_SEL, "usb30_sel", usb30_parents, 0x070, 0, 2, 7),