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Searched full:clk_top_etherpll_125m (Results 1 – 4 of 4) sorted by relevance

/linux/Documentation/devicetree/bindings/net/
H A Dmediatek-dwmac.yaml174 assigned-clock-parents = <&topckgen CLK_TOP_ETHERPLL_125M>,
/linux/include/dt-bindings/clock/
H A Dmt2712-clk.h92 #define CLK_TOP_ETHERPLL_125M 61 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt2712.c100 FACTOR(CLK_TOP_ETHERPLL_125M, "etherpll_125m", "etherpll", 1, 1),
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt2712e.dtsi749 assigned-clock-parents = <&topckgen CLK_TOP_ETHERPLL_125M>,