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Searched full:clk_top_aud_44k_timing (Results 1 – 4 of 4) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmt2701-clk.h158 #define CLK_TOP_AUD_44K_TIMING 147 macro
/linux/arch/arm/boot/dts/mediatek/
H A Dmt2701.dtsi438 <&topckgen CLK_TOP_AUD_44K_TIMING>,
H A Dmt7623.dtsi639 <&topckgen CLK_TOP_AUD_44K_TIMING>,
/linux/drivers/clk/mediatek/
H A Dclk-mt2701.c643 GATE_TOP_AUD(CLK_TOP_AUD_44K_TIMING, "a2sys_hp_ck", "aud_mux2_div",