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Searched full:clk_top_apll2 (Results 1 – 19 of 19) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmt8516-clk.h69 #define CLK_TOP_APLL2 37 macro
H A Dmediatek,mt6795-clk.h37 #define CLK_TOP_APLL2 26 macro
H A Dmt8173-clk.h36 #define CLK_TOP_APLL2 26 macro
H A Dmediatek,mt8365-clk.h58 #define CLK_TOP_APLL2 48 macro
H A Dmt2712-clk.h79 #define CLK_TOP_APLL2 48 macro
H A Dmt8192-clk.h117 #define CLK_TOP_APLL2 105 macro
H A Dmt8195-clk.h105 #define CLK_TOP_APLL2 93 macro
/linux/Documentation/devicetree/bindings/sound/
H A Dmt8195-afe-pcm.yaml162 <&topckgen 166>, //CLK_TOP_APLL2
/linux/drivers/clk/mediatek/
H A Dclk-mt6795-topckgen.c387 FACTOR(CLK_TOP_APLL2, "apll2_ck", "apll2", 1, 1),
H A Dclk-mt8173-topckgen.c462 FACTOR(CLK_TOP_APLL2, "apll2_ck", "apll2", 1, 1),
H A Dclk-mt8516.c64 FACTOR(CLK_TOP_APLL2, "apll2_ck", "apll2", 1, 1),
H A Dclk-mt8167.c71 FACTOR(CLK_TOP_APLL2, "apll2_ck", "apll2", 1, 1),
H A Dclk-mt8365.c80 FACTOR(CLK_TOP_APLL2, "apll2_ck", "apll2", 1, 1),
H A Dclk-mt2712.c87 FACTOR(CLK_TOP_APLL2, "apll2_ck", "apll2", 1, 1),
H A Dclk-mt8192.c63 FACTOR(CLK_TOP_APLL2, "apll2_ck", "apll2", 1, 1),
H A Dclk-mt8188-topckgen.c1136 MUX_GATE_CLR_SET_UPD(CLK_TOP_APLL2, "top_apll2",
H A Dclk-mt8195-topckgen.c1102 MUX_GATE_CLR_SET_UPD(CLK_TOP_APLL2, "top_apll2",
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8173.dtsi897 <&topckgen CLK_TOP_APLL2>;
H A Dmt8192.dtsi1013 <&topckgen CLK_TOP_APLL2>,