Searched full:clk_mout_bpll (Results 1 – 6 of 6) sorted by relevance
| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | samsung,exynos5422-dmc.yaml | 118 <&clock CLK_MOUT_BPLL>,
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| /linux/include/dt-bindings/clock/ |
| H A D | exynos5420.h | 226 #define CLK_MOUT_BPLL 655 macro
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| H A D | exynos3250.h | 268 #define CLK_MOUT_BPLL 9 macro
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| /linux/drivers/clk/samsung/ |
| H A D | clk-exynos5420.c | 740 MUX_F(CLK_MOUT_BPLL, "mout_bpll", mout_bpll_p, SRC_CDREX, 0, 1,
1676 clk_prepare_enable(hws[CLK_MOUT_BPLL]->clk); in exynos5x_clk_init()
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| H A D | clk-exynos3250.c | 892 MUX(CLK_MOUT_BPLL, "mout_bpll", mout_bpll_p, SRC_DMC, 10, 1),
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| /linux/arch/arm/boot/dts/samsung/ |
| H A D | exynos5420.dtsi | 355 <&clock CLK_MOUT_BPLL>,
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