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/linux/include/dt-bindings/clock/
H A Dexynos5410.h56 #define CLK_MMC2 353 macro
H A Dpxa-clock.h39 #define CLK_MMC2 29 macro
H A Dsun5i-ccu.h61 #define CLK_MMC2 66 macro
H A Dsun50i-a100-ccu.h48 #define CLK_MMC2 64 macro
H A Dsun50i-h616-ccu.h48 #define CLK_MMC2 62 macro
H A Dsun50i-h6-ccu.h52 #define CLK_MMC2 66 macro
H A Dsun20i-d1-ccu.h68 #define CLK_MMC2 58 macro
H A Dsun8i-v3s-ccu.h83 #define CLK_MMC2 51 macro
H A Dsun8i-a23-a33-ccu.h93 #define CLK_MMC2 66 macro
H A Dsun50i-a64-ccu.h99 #define CLK_MMC2 77 macro
H A Dsun8i-a83t-ccu.h103 #define CLK_MMC2 66 macro
H A Dsun9i-a80-ccu.h65 #define CLK_MMC2 39 macro
H A Dsun8i-h3-ccu.h110 #define CLK_MMC2 77 macro
H A Dsun8i-r40-ccu.h133 #define CLK_MMC2 109 macro
H A Dsun6i-a31-ccu.h121 #define CLK_MMC2 85 macro
H A Dsun4i-a10-ccu.h135 #define CLK_MMC2 104 macro
H A Dexynos5420.h117 #define CLK_MMC2 353 macro
/linux/Documentation/devicetree/bindings/mmc/
H A Dsamsung,exynos-dw-mshc.yaml150 clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>;
/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-h5.dtsi257 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
/linux/drivers/clk/hisilicon/
H A Dcrg-hi3516cv300.c105 { HI3516CV300_MMC2_CLK, "clk_mmc2", "mmc2_mux", CLK_SET_RATE_PARENT,
/linux/drivers/clk/sunxi-ng/
H A Dccu-sun5i.c696 [CLK_MMC2] = &mmc2_clk.common.hw,
830 [CLK_MMC2] = &mmc2_clk.common.hw,
940 [CLK_MMC2] = &mmc2_clk.common.hw,
/linux/arch/arm/boot/dts/allwinner/
H A Dsun8i-h3.dtsi316 <&ccu CLK_MMC2>,
/linux/arch/arm/boot/dts/samsung/
H A Dexynos5410.dtsi156 clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>;
/linux/arch/arm/boot/dts/intel/pxa/
H A Dpxa3xx.dtsi198 clocks = <&clks CLK_MMC2>;
/linux/drivers/clk/samsung/
H A Dclk-exynos5410.c184 GATE(CLK_MMC2, "sdmmc2", "aclk200", GATE_BUS_FSYS0, 14, 0, 0),

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