Searched full:clk_gscl0 (Results 1 – 9 of 9) sorted by relevance
/linux/Documentation/devicetree/bindings/media/ |
H A D | samsung,exynos5250-gsc.yaml | 106 clocks = <&clock CLK_GSCL0>;
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/linux/Documentation/devicetree/bindings/iommu/ |
H A D | samsung,sysmmu.yaml | 96 <&clock CLK_GSCL0>;
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/linux/include/dt-bindings/clock/ |
H A D | exynos5250.h | 60 #define CLK_GSCL0 256 macro
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H A D | exynos5420.h | 164 #define CLK_GSCL0 465 macro
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/linux/arch/arm/boot/dts/samsung/ |
H A D | exynos5250.dtsi | 746 clocks = <&clock CLK_GSCL0>; 1029 clocks = <&clock CLK_SMMU_GSCL0>, <&clock CLK_GSCL0>;
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H A D | exynos5420.dtsi | 809 clocks = <&clock CLK_GSCL0>; 1026 clocks = <&clock CLK_SMMU_GSCL0>, <&clock CLK_GSCL0>;
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/linux/drivers/clk/samsung/ |
H A D | clk-exynos5250.c | 518 GATE(CLK_GSCL0, "gscl0", "mout_aclk266_gscl_sub", GATE_IP_GSCL, 0, 0,
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H A D | clk-exynos5260.c | 736 GATE(GSCL_CLK_GSCL0, "clk_gscl0", "mout_aclk_gscl_333_user",
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H A D | clk-exynos5420.c | 1252 GATE(CLK_GSCL0, "gscl0", "aclk300_gscl", GATE_IP_GSCL0, 0, 0, 0),
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