| /linux/drivers/clk/samsung/ |
| H A D | clk-exynos-clkout.c | 20 #define DRV_NAME "exynos-clkout"
116 struct exynos_clkout *clkout; in exynos_clkout_probe() local
120 clkout = devm_kzalloc(&pdev->dev, in exynos_clkout_probe()
121 struct_size(clkout, data.hws, EXYNOS_CLKOUT_NR_CLKS), in exynos_clkout_probe()
123 if (!clkout) in exynos_clkout_probe()
130 clkout->np = pdev->dev.of_node; in exynos_clkout_probe()
131 if (!clkout->np) { in exynos_clkout_probe()
136 clkout->np = pdev->dev.parent->of_node; in exynos_clkout_probe()
139 platform_set_drvdata(pdev, clkout); in exynos_clkout_probe()
141 spin_lock_init(&clkout->slock); in exynos_clkout_probe()
[all …]
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| /linux/include/linux/platform_data/ |
| H A D | si5351.h | 36 * @SI5351_CLKOUT_SRC_MSYNTH_N: clkout N source clock is multisynth N
37 * @SI5351_CLKOUT_SRC_MSYNTH_0_4: clkout N source clock is multisynth 0 (N<4)
39 * @SI5351_CLKOUT_SRC_XTAL: clkout N source clock is XTAL
40 * @SI5351_CLKOUT_SRC_CLKIN: clkout N source clock is CLKIN (Si5351C only)
85 * @clkout: clkout number
87 * @clkout_src: clkout source clock
88 * @pll_master: if true, clkout can also change pll rate
89 * @pll_reset: if true, clkout can reset its pll
91 * @rate: initial clkout rate, or default if 0
109 * @clkout: array of clkout configuration
[all …]
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| /linux/drivers/clk/ |
| H A D | clk-lmk04832.c | 188 * @num_channels: Number of available output channels (clkout count)
247 * Each pair of clkout clocks share a single device clock (DCLKX_Y)
248 * @clkout: list of output clock references
249 * @clk_data: holds clkout related data like clk_hw* and number of clocks
268 struct lmk_clkout *clkout; member
703 dev_dbg(lmk->dev, "clkout%02u: sysref_ddly=%u, dclkx_y_ddly=%u, " in lmk04832_clkout_set_ddly()
1167 struct lmk_clkout *clkout = container_of(hw, struct lmk_clkout, hw); in lmk04832_clkout_is_enabled() local
1168 struct lmk04832 *lmk = clkout->lmk; in lmk04832_clkout_is_enabled()
1176 ret = regmap_read(lmk->regmap, LMK04832_REG_CLKOUT_CTRL2(clkout->id), in lmk04832_clkout_is_enabled()
1183 ret = regmap_read(lmk->regmap, LMK04832_REG_CLKOUT_SRC_MUX(clkout->id), in lmk04832_clkout_is_enabled()
[all …]
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| H A D | clk-si5351.c | 63 struct si5351_hw_data *clkout; member
805 * Si5351 clkout divider
932 __func__, clk_hw_get_name(&drvdata->clkout[num].hw), in _si5351_clkout_reset_pll()
950 if (pdata->clkout[hwdata->num].pll_reset) in si5351_clkout_prepare()
1055 /* clkout freqency is 8kHz - 160MHz */ in si5351_clkout_determine_rate()
1137 /* powerup clkout */ in si5351_clkout_set_rate()
1275 /* per clkout properties */ in si5351_dt_parse()
1285 dev_err(&client->dev, "invalid clkout %d\n", num); in si5351_dt_parse()
1293 pdata->clkout[num].multisynth_src = in si5351_dt_parse()
1297 pdata->clkout[num].multisynth_src = in si5351_dt_parse()
[all …]
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| H A D | clk-rk808.c | 3 * Clkout driver for Rockchip RK808
200 .name = "rk808-clkout",
206 MODULE_DESCRIPTION("Clkout driver for the rk808 series PMICs");
209 MODULE_ALIAS("platform:rk808-clkout");
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| H A D | clk-lochnagar.c | 53 LN_PARENT("ln-cdc-clkout"),
54 LN_PARENT("ln-dsp-clkout"),
64 LN_PARENT("ln-cdc-clkout"),
65 LN_PARENT("ln-dsp-clkout"),
79 LN_PARENT("ln-spdif-clkout"),
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| H A D | clk-cdce706.c | 85 struct cdce706_hw_data clkout[6]; member
603 for (i = 0; i < ARRAY_SIZE(cdce->clkout); ++i) { in cdce706_register_clkouts()
609 cdce->clkout[i].parent = val & CDCE706_CLKOUT_DIVIDER_MASK; in cdce706_register_clkouts()
612 cdce->clkout[i].parent); in cdce706_register_clkouts()
615 return cdce706_register_hw(cdce, cdce->clkout, in cdce706_register_clkouts()
616 ARRAY_SIZE(cdce->clkout), in cdce706_register_clkouts()
626 if (idx >= ARRAY_SIZE(cdce->clkout)) { in of_clk_cdce_get()
631 return &cdce->clkout[idx].hw; in of_clk_cdce_get()
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| /linux/Documentation/devicetree/bindings/iio/adc/ |
| H A D | st,stm32-dfsdm-adc.yaml | 38 dfsdm clock can also feed CLKOUT, when CLKOUT is used.
39 - description: audio clock can be used as an alternate to feed CLKOUT.
59 If not, SPI CLKOUT frequency will not be accurate.
145 - "CLKOUT": internal SPI clock (CLKOUT) (default)
149 enum: [ CLKIN, CLKOUT, CLKOUT_F, CLKOUT_R ]
211 - "CLKOUT": internal SPI clock (CLKOUT) (default)
215 enum: [ CLKIN, CLKOUT, CLKOUT_F, CLKOUT_R ]
387 st,adc-channel-clk-src = "CLKOUT";
414 st,adc-channel-clk-src = "CLKOUT";
423 st,adc-channel-clk-src = "CLKOUT";
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| /linux/arch/arm/boot/dts/ti/omap/ |
| H A D | dm814x-clocks.dtsi | 6 * "2.6.11 Connected Outputs of DPLLJ". Only clkout is
16 "481c5040.adpll.clkout",
28 "481c5080.adpll.clkout",
39 "481c50b0.adpll.clkout",
50 "481c50e0.adpll.clkout",
61 "481c5110.adpll.clkout",
72 "481c5140.adpll.clkout",
83 "481c5170.adpll.clkout",
94 "481c51a0.adpll.clkout",
105 "481c51d0.adpll.clkout",
[all …]
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| /linux/drivers/net/can/cc770/ |
| H A D | cc770_platform.c | 73 u32 clkext = CC770_PLATFORM_CAN_CLOCK, clkout = 0; in cc770_get_of_node_data() local
105 of_property_read_u32(np, "bosch,clock-out-frequency", &clkout); in cc770_get_of_node_data()
106 if (clkout > 0) { in cc770_get_of_node_data()
107 u32 cdv = clkext / clkout; in cc770_get_of_node_data()
113 priv->clkout |= (cdv - 1) & CLKOUT_CD_MASK; in cc770_get_of_node_data()
123 priv->clkout |= (slew << CLKOUT_SL_SHIFT) & in cc770_get_of_node_data()
142 priv->clkout = pdata->cor; in cc770_get_platform_data()
197 "bus_config=0x%02x clkout=0x%02x\n", in cc770_platform_probe()
199 priv->cpu_interface, priv->bus_config, priv->clkout); in cc770_platform_probe()
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| /linux/Documentation/devicetree/bindings/net/ |
| H A D | realtek,rtl82xx.yaml | 43 realtek,clkout-disable:
46 Disable CLKOUT clock, CLKOUT clock default is enabled after hardware reset.
76 realtek,clkout-disable;
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| /linux/drivers/video/fbdev/omap2/omapfb/dss/ |
| H A D | hdmi_pll.c | 42 unsigned long fint, clkdco, clkout; in hdmi_pll_compute() local
79 clkout = clkdco / m2; in hdmi_pll_compute()
86 DSSDBG("Fint %lu, clkdco %lu, clkout %lu\n", fint, clkdco, clkout); in hdmi_pll_compute()
96 pi->clkout[0] = clkout; in hdmi_pll_compute()
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| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | ti,lmk04832.yaml | 108 ti,clkout-fmt:
132 ti,clkout-sysref:
200 ti,clkout-fmt = <0x01>; // LVDS
205 ti,clkout-fmt = <0x01>; // LVDS
206 ti,clkout-sysref;
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| H A D | cirrus,lochnagar.yaml | 48 - ln-cdc-clkout # Output clock from CODEC card.
49 - ln-dsp-clkout # Output clock from DSP card.
57 - ln-spdif-clkout # Optional input clock from SPDIF.
|
| H A D | silabs,si5351.yaml | 87 "^clkout@[0-7]$":
230 clkout@0 {
247 clkout@1 {
260 clkout@2 {
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| H A D | stericsson,u8500-clks.yaml | 112 clkout-clock:
144 #include <dt-bindings/clock/ste-db8500-clkout.h>
175 clkout_clk: clkout-clock {
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| /linux/drivers/gpu/drm/omapdrm/dss/ |
| H A D | pll.c | 266 * for clkout. Additionally clkdco rate will be the same as clkout rate
267 * when clkout rate is >= min_clkdco.
270 * clkout = clkdco / m2
275 unsigned long fint, clkdco, clkout; in dss_pll_calc_b() local
281 DSSDBG("clkin %lu, target clkout %lu\n", clkin, target_clkout); in dss_pll_calc_b()
307 clkout = clkdco / m2; in dss_pll_calc_b()
314 DSSDBG("Fint %lu, clkdco %lu, clkout %lu\n", fint, clkdco, clkout); in dss_pll_calc_b()
324 cinfo->clkout[0] = clkout; in dss_pll_calc_b()
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| /linux/sound/soc/sh/rcar/ |
| H A D | adg.c | 16 #define CLKOUT 0 macro
34 struct clk *clkout[CLKOUTMAX]; member
56 ((pos) = adg->clkout[i]); \
72 [CLKOUT] = "audio_clkout",
369 dev_dbg(dev, "CLKOUT is based on BRG%c (= %dHz)\n", in rsnd_adg_ssi_clk_try_start()
638 * for clkout in rsnd_adg_get_clkout()
641 clk = clk_register_fixed_rate(dev, clkout_name[CLKOUT], in rsnd_adg_get_clkout()
646 adg->clkout[CLKOUT] = clk; in rsnd_adg_get_clkout()
661 adg->clkout[i] = clk; in rsnd_adg_get_clkout()
663 adg->onecell.clks = adg->clkout; in rsnd_adg_get_clkout()
[all …]
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| /linux/Documentation/devicetree/bindings/net/can/ |
| H A D | cc770.txt | 24 - bosch,clock-out-frequency : slock frequency in Hz on the CLKOUT pin.
25 If not specified or if the specified value is 0, the CLKOUT pin
28 - bosch,slew-rate : slew rate of the CLKOUT signal. If not specified,
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| /linux/drivers/clk/ux500/ |
| H A D | u8500_of_clk.c | 78 struct clk_hw *clkout; in ux500_clkout_get() local
88 pr_err("%s: invalid clkout ID %d\n", __func__, id); in ux500_clkout_get()
93 pr_info("%s: clkout%d already registered, not reconfiguring\n", in ux500_clkout_get()
108 pr_debug("registering clkout%d with source %d and divider %d\n", in ux500_clkout_get()
111 clkout = clk_reg_prcmu_clkout(id ? "clkout2" : "clkout1", in ux500_clkout_get()
115 if (IS_ERR(clkout)) { in ux500_clkout_get()
116 pr_err("failed to register clkout%d\n", id + 1); in ux500_clkout_get()
117 return ERR_CAST(clkout); in ux500_clkout_get()
120 clkout_clk[id] = clkout; in ux500_clkout_get()
122 return clkout; in ux500_clkout_get()
[all …]
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| /linux/drivers/rtc/ |
| H A D | rtc-max31335.c | 187 #define clk_hw_to_max31335(_hw) container_of(_hw, struct max31335_data, clkout)
192 struct clk_hw clkout; member
495 .name = "max31335-clkout",
583 max31335->clkout.init = &max31335_clk_init; in max31335_clkout_register()
585 ret = devm_clk_hw_register(dev, &max31335->clkout); in max31335_clkout_register()
590 &max31335->clkout); in max31335_clkout_register()
594 max31335->clkout.clk = devm_clk_get_enabled(dev, NULL); in max31335_clkout_register()
595 if (IS_ERR(max31335->clkout.clk)) in max31335_clkout_register()
596 return dev_err_probe(dev, PTR_ERR(max31335->clkout.clk), in max31335_clkout_register()
597 "cannot enable clkout\n"); in max31335_clkout_register()
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| /linux/drivers/clk/renesas/ |
| H A D | r9a06g032-clocks.c | 260 D_ROOT(CLKOUT, "clkout", 25, 1),
262 D_FFC(CLKOUT_D10, "clkout_d10", CLKOUT, 10),
263 D_FFC(CLKOUT_D16, "clkout_d16", CLKOUT, 16),
264 D_FFC(CLKOUT_D160, "clkout_d160", CLKOUT, 160),
265 D_DIV(CLKOUT_D1OR2, "clkout_d1or2", CLKOUT, 0, 1, 2),
266 D_FFC(CLKOUT_D20, "clkout_d20", CLKOUT, 20),
267 D_FFC(CLKOUT_D40, "clkout_d40", CLKOUT, 40),
268 D_FFC(CLKOUT_D5, "clkout_d5", CLKOUT, 5),
269 D_FFC(CLKOUT_D8, "clkout_d8", CLKOUT, 8),
270 D_DIV(DIV_ADC, "div_adc", CLKOUT, 77, 50, 250),
[all …]
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| /linux/drivers/clk/xilinx/ |
| H A D | clk-xlnx-clock-wizard.c | 130 * @clkout: Output clocks
141 struct clk *clkout[WZRD_NUM_OUTPUTS]; member
1039 clk_wzrd->clkout[0] = clk_wzrd_ver_register_divider in clk_wzrd_probe()
1072 clk_wzrd->clkout[0] = clk_wzrd_register_divider in clk_wzrd_probe()
1152 clk_wzrd->clkout[i] = clk_wzrd_ver_register_divider in clk_wzrd_probe()
1164 clk_wzrd->clkout[i] = clk_wzrd_register_divf in clk_wzrd_probe()
1172 clk_wzrd->clkout[i] = clk_wzrd_register_divider in clk_wzrd_probe()
1180 if (IS_ERR(clk_wzrd->clkout[i])) { in clk_wzrd_probe()
1184 clk_unregister(clk_wzrd->clkout[j]); in clk_wzrd_probe()
1187 ret = PTR_ERR(clk_wzrd->clkout[i]); in clk_wzrd_probe()
[all …]
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| /linux/Documentation/devicetree/bindings/clock/ti/ |
| H A D | adpll.txt | 25 "481c5040.adpll.clkout",
37 "481c5080.adpll.clkout",
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| /linux/Documentation/devicetree/bindings/gpio/ |
| H A D | intel,ixp4xx-gpio.yaml | 44 intel,ixp4xx-gpio14-clkout:
49 intel,ixp4xx-gpio15-clkout:
|