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/linux/drivers/net/ethernet/apm/xgene/
H A Dxgene_enet_cle.c123 static int xgene_cle_dram_wr(struct xgene_enet_cle *cle, u32 *data, u8 nregs, in xgene_cle_dram_wr() argument
127 enum xgene_cle_parser parser = cle->active_parser; in xgene_cle_dram_wr()
128 void __iomem *base = cle->base; in xgene_cle_dram_wr()
134 nparsers = (type >= PTREE_RAM) ? 1 : cle->parsers; in xgene_cle_dram_wr()
156 struct xgene_enet_cle *cle) in xgene_cle_enable_ptree() argument
158 struct xgene_cle_ptree *ptree = &cle->ptree; in xgene_cle_enable_ptree()
159 void __iomem *addr, *base = cle->base; in xgene_cle_enable_ptree()
164 ptree->start_pkt += cle->jump_bytes; in xgene_cle_enable_ptree()
165 for (i = 0; i < cle->parsers; i++) { in xgene_cle_enable_ptree()
166 if (cle->active_parser != PARSER_ALL) in xgene_cle_enable_ptree()
[all …]
/linux/Documentation/devicetree/bindings/mtd/
H A Dorion-nand.txt9 - cle : Address line number connected to CLE. Default is 0
23 cle = <0>;
H A Dgpio-control-nand.txt15 GPIO references is: RDY, nCE, ALE, CLE, and nWP. nCE and nWP are optional.
41 <&banka 4 0>, /* CLE */
H A Datmel-nand.txt170 atmel,nand-cmd-offset = <22>; /* cle */
193 atmel,nand-cmd-offset = <22>; /* cle */
H A Dfsmc-nand.txt15 byte 0 TCLR : CLE to RE delay in number of AHB clock cycles, only 4 bits
/linux/drivers/mtd/nand/raw/
H A Dgpio.c37 struct gpio_desc *cle; member
84 gpiod_set_value(gpiomtd->cle, 1); in gpio_nand_exec_instr()
88 gpiod_set_value(gpiomtd->cle, 0); in gpio_nand_exec_instr()
336 gpiomtd->cle = devm_gpiod_get(dev, "cle", GPIOD_OUT_LOW); in gpio_nand_probe()
337 if (IS_ERR(gpiomtd->cle)) { in gpio_nand_probe()
338 ret = PTR_ERR(gpiomtd->cle); in gpio_nand_probe()
H A Dorion_nand.c40 offs = (1 << board->cle); in orion_nand_cmd_ctrl()
131 if (!of_property_read_u32(pdev->dev.of_node, "cle", &val)) in orion_nand_probe()
132 board->cle = (u8)val; in orion_nand_probe()
134 board->cle = 0; in orion_nand_probe()
H A Dams-delta.c315 priv->gpiod_cle = devm_gpiod_get(&pdev->dev, "cle", GPIOD_OUT_LOW); in gpio_nand_probe()
318 dev_err(&pdev->dev, "CLE GPIO request failed (%d)\n", err); in gpio_nand_probe()
H A Dr852.h25 #define R852_CTL_COMMAND 0x01 /* send command (#CLE)*/
/linux/include/linux/platform_data/
H A Dmtd-orion_nand.h17 u8 cle; /* address line number connected to CLE */ member
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dlantiq,pinctrl-xway.txt56 ebu wait, nand ale, nand cs1, nand cle, spi_di, spi_do, spi_clk, spi_cs1,
67 ebu cs1, ebu wait, nand ale, nand cs1, nand cle, nand rdy, nand rd,
79 ebu cs1, ebu wait, nand ale, nand cs1, nand cle, nand rdy, nand rd,
93 exin0, exin1, exin2, exin4, nand ale, nand cs0, nand cs1, nand cle,
/linux/include/linux/mtd/
H A Dplatnand.h46 * ALE/CLE/nCE. Also used to write command and address
/linux/arch/mips/boot/dts/ni/
H A D169445.dts70 <&gpio1 3 0>, /* cle */
/linux/drivers/pinctrl/
H A Dpinctrl-xway.c343 GRP_MUX("nand cle", EBU, danube_pins_nand_cle),
390 "nand cle"};
550 GRP_MUX("nand cle", EBU, xrx100_pins_nand_cle),
601 "nand cle", "nand rdy",
778 GRP_MUX("nand cle", EBU, xrx200_pins_nand_cle),
847 "nand cle", "nand rdy",
1021 GRP_MUX("nand cle", EBU, xrx300_pins_nand_cle),
1064 "nand cle", "nand rdy",
/linux/arch/arm/boot/dts/marvell/
H A Dorion5x-kuroboxpro.dts87 cle = <0>;
/linux/arch/arm/boot/dts/ti/keystone/
H A Dkeystone-k2l-evm.dts86 ti,davinci-mask-cle = <0x4000>;
H A Dkeystone-k2e-evm.dts113 ti,davinci-mask-cle = <0x4000>;
H A Dkeystone-k2hk-evm.dts130 ti,davinci-mask-cle = <0x4000>;
/linux/arch/powerpc/boot/dts/
H A Dxpedite5200.dts431 cle-line = <0x8>; /* CLE tied to A3 */
H A Dxpedite5200_xmon.dts435 cle-line = <0x8>; /* CLE tied to A3 */
/linux/arch/arm/boot/compressed/
H A Dhead-sharpsl.S136 bic r3, r3, #2 @ CLR CLE
/linux/drivers/usb/host/
H A Dohci-q.c192 /* we care about rm_list when setting CLE/BLE in case the HC was at in ed_schedule()
193 * work on some TD when CLE/BLE was turned off, and isn't quiesced in ed_schedule()
324 * clear CLE/BLE and wait. There's no safe way to scrub out list in ed_deschedule()
341 // a ohci_readl() later syncs CLE with the HC in ed_deschedule()
1129 /* CLE/BLE to enable, CLF/BLF to (maybe) kickstart */ in finish_unlinks()
/linux/arch/mips/boot/dts/ingenic/
H A Dci20.dts427 * Only CLE/ALE are needed for the devices that are connected, rather
587 groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe";
/linux/Documentation/driver-api/
H A Dmtdnand.rst164 case NAND_CTL_SETCLE: /* Set CLE pin high */ break;
165 case NAND_CTL_CLRCLE: /* Set CLE pin low */ break;
908 /* Select the command latch by setting CLE to high */
910 /* Deselect the command latch by setting CLE to low */
/linux/sound/soc/codecs/
H A Dtscs42xx.c734 /* CLE */
735 SOC_ENUM("CLE Level Detect",
737 SOC_ENUM("CLE Level Detect Win",
745 SOC_SINGLE_TLV("CLE Make-Up Gain Volume",

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