xref: /linux/Documentation/devicetree/bindings/pinctrl/raspberrypi,rp1-gpio.yaml (revision 115e74a29b530d121891238e9551c4bcdf7b04b5) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/raspberrypi,rp1-gpio.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: RaspberryPi RP1 GPIO/Pinconf/Pinmux Controller submodule
8
9maintainers:
10  - A. della Porta <andrea.porta@suse.com>
11
12description:
13  The RP1 chipset is a Multi Function Device containing, among other
14  sub-peripherals, a gpio/pinconf/mux controller whose 54 pins are grouped
15  into 3 banks.
16  It works also as an interrupt controller for those gpios.
17
18properties:
19  compatible:
20    const: raspberrypi,rp1-gpio
21
22  reg:
23    maxItems: 3
24    description: One reg specifier for each one of the 3 pin banks.
25
26  '#gpio-cells':
27    description: The first cell is the pin number and the second cell is used
28      to specify the flags (see include/dt-bindings/gpio/gpio.h).
29    const: 2
30
31  gpio-controller: true
32
33  gpio-ranges:
34    maxItems: 1
35
36  gpio-line-names:
37    maxItems: 54
38
39  interrupts:
40    maxItems: 3
41    description: One interrupt specifier for each one of the 3 pin banks.
42
43  '#interrupt-cells':
44    description:
45      Specifies the Bank number [0, 1, 2] and Flags as defined in
46      include/dt-bindings/interrupt-controller/irq.h.
47    const: 2
48
49  interrupt-controller: true
50
51patternProperties:
52  '-state$':
53    oneOf:
54      - $ref: '#/$defs/raspberrypi-rp1-state'
55      - patternProperties:
56          '-pins$':
57            $ref: '#/$defs/raspberrypi-rp1-state'
58        additionalProperties: false
59
60$defs:
61  raspberrypi-rp1-state:
62    allOf:
63      - $ref: pincfg-node.yaml#
64      - $ref: pinmux-node.yaml#
65
66    description:
67      Pin controller client devices use pin configuration subnodes (children
68      and grandchildren) for desired pin configuration.
69      Client device subnodes use below standard properties.
70
71    properties:
72      pins:
73        description:
74          List of gpio pins affected by the properties specified in this
75          subnode.
76        items:
77          pattern: '^gpio([0-9]|[1-4][0-9]|5[0-3])$'
78
79      function:
80        enum: [ alt0, alt1, alt2, alt3, alt4, gpio, alt6, alt7, alt8, none,
81                aaud, dcd0, dpi, dsi0_te_ext, dsi1_te_ext, dsr0, dtr0, gpclk0,
82                gpclk1, gpclk2, gpclk3, gpclk4, gpclk5, i2c0, i2c1, i2c2, i2c3,
83                i2c4, i2c5, i2c6, i2s0, i2s1, i2s2, ir, mic, pcie_clkreq_n,
84                pio, proc_rio, pwm0, pwm1, ri0, sd0, sd1, spi0, spi1, spi2,
85                spi3, spi4, spi5, spi6, spi7, spi8, uart0, uart1, uart2, uart3,
86                uart4, uart5, vbus0, vbus1, vbus2, vbus3 ]
87
88        description:
89          Specify the alternative function to be configured for the specified
90          pins.
91
92      bias-disable: true
93      bias-pull-down: true
94      bias-pull-up: true
95      input-enable: true
96      input-schmitt-enable: true
97      output-enable: true
98      output-high: true
99      output-low: true
100      slew-rate:
101        description: 0 is slow slew rate, 1 is fast slew rate
102        enum: [ 0, 1 ]
103      drive-strength:
104        enum: [ 2, 4, 8, 12 ]
105
106    additionalProperties: false
107
108allOf:
109  - $ref: pinctrl.yaml#
110
111required:
112  - reg
113  - compatible
114  - '#gpio-cells'
115  - gpio-controller
116  - interrupts
117  - '#interrupt-cells'
118  - interrupt-controller
119
120unevaluatedProperties: false
121
122examples:
123  - |
124    #include <dt-bindings/interrupt-controller/irq.h>
125
126    rp1 {
127        #address-cells = <2>;
128        #size-cells = <2>;
129
130        rp1_gpio: pinctrl@c0400d0000 {
131            reg = <0xc0 0x400d0000  0x0 0xc000>,
132                  <0xc0 0x400e0000  0x0 0xc000>,
133                  <0xc0 0x400f0000  0x0 0xc000>;
134            compatible = "raspberrypi,rp1-gpio";
135            gpio-controller;
136            #gpio-cells = <2>;
137            interrupt-controller;
138            #interrupt-cells = <2>;
139            interrupts = <0 IRQ_TYPE_LEVEL_HIGH>,
140                         <1 IRQ_TYPE_LEVEL_HIGH>,
141                         <2 IRQ_TYPE_LEVEL_HIGH>;
142            gpio-line-names =
143                   "ID_SDA", // GPIO0
144                   "ID_SCL", // GPIO1
145                   "GPIO2", "GPIO3", "GPIO4", "GPIO5", "GPIO6",
146                   "GPIO7", "GPIO8", "GPIO9", "GPIO10", "GPIO11",
147                   "GPIO12", "GPIO13", "GPIO14", "GPIO15", "GPIO16",
148                   "GPIO17", "GPIO18", "GPIO19", "GPIO20", "GPIO21",
149                   "GPIO22", "GPIO23", "GPIO24", "GPIO25", "GPIO26",
150                   "GPIO27",
151                   "PCIE_RP1_WAKE", // GPIO28
152                   "FAN_TACH", // GPIO29
153                   "HOST_SDA", // GPIO30
154                   "HOST_SCL", // GPIO31
155                   "ETH_RST_N", // GPIO32
156                   "", // GPIO33
157                   "CD0_IO0_MICCLK", // GPIO34
158                   "CD0_IO0_MICDAT0", // GPIO35
159                   "RP1_PCIE_CLKREQ_N", // GPIO36
160                   "", // GPIO37
161                   "CD0_SDA", // GPIO38
162                   "CD0_SCL", // GPIO39
163                   "CD1_SDA", // GPIO40
164                   "CD1_SCL", // GPIO41
165                   "USB_VBUS_EN", // GPIO42
166                   "USB_OC_N", // GPIO43
167                   "RP1_STAT_LED", // GPIO44
168                   "FAN_PWM", // GPIO45
169                   "CD1_IO0_MICCLK", // GPIO46
170                   "2712_WAKE", // GPIO47
171                   "CD1_IO1_MICDAT1", // GPIO48
172                   "EN_MAX_USB_CUR", // GPIO49
173                   "", // GPIO50
174                   "", // GPIO51
175                   "", // GPIO52
176                   ""; // GPIO53
177
178            rp1-i2s0-default-state {
179                function = "i2s0";
180                pins = "gpio18", "gpio19", "gpio20", "gpio21";
181                bias-disable;
182            };
183
184            rp1-uart0-default-state {
185                txd-pins {
186                    function = "uart0";
187                    pins = "gpio14";
188                    bias-disable;
189                };
190
191                rxd-pins {
192                    function = "uart0";
193                    pins = "gpio15";
194                    bias-pull-up;
195                };
196            };
197        };
198    };
199