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/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Dcci.txt2 ARM CCI cache coherent interconnect binding description
6 cache coherent interconnect (CCI) that is capable of monitoring bus
14 * CCI interconnect node
16 Description: Describes a CCI cache coherent Interconnect component
18 Node name must be "cci".
20 through the CCI interconnect is the same as the one seen from the
22 Every CCI node has to define the following properties:
28 "arm,cci-400"
29 "arm,cci-500"
30 "arm,cci-550"
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H A Darm,cci-400.yaml4 $id: http://devicetree.org/schemas/arm/arm,cci-400.yaml#
7 title: ARM CCI Cache Coherent Interconnect
14 coherent interconnect (CCI) that is capable of monitoring bus transactions
24 pattern: "^cci(@[0-9a-f]+)?$"
28 - arm,cci-400
29 - arm,cci-500
30 - arm,cci-550
35 Specifies base physical address of CCI control registers common to all
48 const: arm,cci-400-ctrl-if
71 - const: arm,cci-400-pmu,r0
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H A Dcci-control-port.yaml4 $id: http://devicetree.org/schemas/arm/cci-control-port.yaml#
7 title: CCI Interconnect Bus Masters
13 Masters in the device tree connected to a CCI port (inclusive of CPUs
19 cci-control-port:
33 cci-control-port = <&cci_control1>;
/freebsd/sys/contrib/device-tree/Bindings/i2c/
H A Dqcom,i2c-cci.yaml4 $id: http://devicetree.org/schemas/i2c/qcom,i2c-cci.yaml#
7 title: Qualcomm Camera Control Interface (CCI) I2C controller
17 - qcom,msm8226-cci
18 - qcom,msm8974-cci
19 - qcom,msm8996-cci
23 - qcom,msm8916-cci
24 - const: qcom,msm8226-cci # CCI v1
28 - qcom,sc7280-cci
29 - qcom,sc8280xp-cci
30 - qcom,sdm845-cci
[all …]
H A Di2c-qcom-cci.txt1 Qualcomm Camera Control Interface (CCI) I2C controller
9 "qcom,msm8916-cci"
10 "qcom,msm8996-cci"
11 "qcom,sdm845-cci"
12 "qcom,sm8250-cci"
13 "qcom,sm8450-cci"
18 Definition: base address CCI I2C controller and length of memory
24 Definition: specifies the CCI I2C interrupt. The format of the
37 Definition: a list of clock names, must include "cci" clock.
40 Usage: required for "qcom,msm8996-cci"
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/freebsd/contrib/llvm-project/lldb/source/Plugins/SymbolFile/NativePDB/
H A DCompileUnitIndex.cpp49 static void ParseCompile3(const CVSymbol &sym, CompilandIndexItem &cci) { in ParseCompile3() argument
50 cci.m_compile_opts.emplace(); in ParseCompile3()
52 SymbolDeserializer::deserializeAs<Compile3Sym>(sym, *cci.m_compile_opts)); in ParseCompile3()
55 static void ParseObjname(const CVSymbol &sym, CompilandIndexItem &cci) { in ParseObjname() argument
56 cci.m_obj_name.emplace(); in ParseObjname()
58 SymbolDeserializer::deserializeAs<ObjNameSym>(sym, *cci.m_obj_name)); in ParseObjname()
62 CompilandIndexItem &cci) { in ParseBuildInfo() argument
76 cci.m_build_info.assign(bir.ArgIndices.begin(), bir.ArgIndices.end()); in ParseBuildInfo()
147 std::unique_ptr<CompilandIndexItem>& cci = result.first->second; in GetOrCreateCompiland() local
151 cci in GetOrCreateCompiland()
[all...]
H A DPdbIndex.cpp116 void PdbIndex::BuildAddrToSymbolMap(CompilandIndexItem &cci) { in BuildAddrToSymbolMap() argument
117 lldbassert(cci.m_symbols_by_va.empty() && in BuildAddrToSymbolMap()
119 uint16_t modi = cci.m_id.modi; in BuildAddrToSymbolMap()
120 const CVSymbolArray &syms = cci.m_debug_stream.getSymbolArray(); in BuildAddrToSymbolMap()
134 cci.m_symbols_by_va.insert(std::make_pair(va, PdbSymUid(cu_sym_id))); in BuildAddrToSymbolMap()
145 CompilandIndexItem &cci = compilands().GetOrCreateCompiland(*modi); in FindSymbolsByVa() local
146 if (cci.m_symbols_by_va.empty()) in FindSymbolsByVa()
147 BuildAddrToSymbolMap(cci); in FindSymbolsByVa()
163 auto ub = cci.m_symbols_by_va.upper_bound(va); in FindSymbolsByVa()
165 for (auto iter = cci.m_symbols_by_va.begin(); iter != ub; ++iter) { in FindSymbolsByVa()
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H A DSymbolFileNativePDB.cpp141 static bool IsFunctionPrologue(const CompilandIndexItem &cci, in IsFunctionPrologue() argument
147 static bool IsFunctionEpilogue(const CompilandIndexItem &cci, in IsFunctionEpilogue() argument
477 const CompilandIndexItem *cci = in CreateFunction() local
479 lldbassert(cci); in CreateFunction()
480 CVSymbol sym_record = cci->m_debug_stream.readSymbolAtOffset(func_id.offset); in CreateFunction()
523 SymbolFileNativePDB::CreateCompileUnit(const CompilandIndexItem &cci) { in CreateCompileUnit() argument
525 cci.m_compile_opts ? TranslateLanguage(cci.m_compile_opts->getLanguage()) in CreateCompileUnit()
529 if (cci.m_compile_opts && cci.m_compile_opts->hasOptimizations()) in CreateCompileUnit()
533 m_index->compilands().GetMainSourceFile(cci); in CreateCompileUnit()
539 toOpaqueUid(cci.m_id), lang, optimized); in CreateCompileUnit()
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/freebsd/sys/contrib/device-tree/Bindings/interconnect/
H A Dmediatek,cci.yaml4 $id: http://devicetree.org/schemas/interconnect/mediatek,cci.yaml#
7 title: MediaTek Cache Coherent Interconnect (CCI) frequency and voltage scaling
14 MediaTek Cache Coherent Interconnect (CCI) is a hardware engine used by
21 - mediatek,mt8183-cci
22 - mediatek,mt8186-cci
35 - const: cci
44 Phandle of the regulator for CCI that provides the supply voltage.
48 Phandle of the regulator for sram of CCI that provides the supply
66 cci: cci {
67 compatible = "mediatek,mt8183-cci";
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/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos5422-cpus.dtsi62 cci-control-port = <&cci_control0>;
75 cci-control-port = <&cci_control0>;
88 cci-control-port = <&cci_control0>;
101 cci-control-port = <&cci_control0>;
114 cci-control-port = <&cci_control1>;
127 cci-control-port = <&cci_control1>;
140 cci-control-port = <&cci_control1>;
153 cci-control-port = <&cci_control1>;
H A Dexynos5420-cpus.dtsi63 cci-control-port = <&cci_control1>;
75 cci-control-port = <&cci_control1>;
87 cci-control-port = <&cci_control1>;
99 cci-control-port = <&cci_control1>;
111 cci-control-port = <&cci_control0>;
123 cci-control-port = <&cci_control0>;
135 cci-control-port = <&cci_control0>;
147 cci-control-port = <&cci_control0>;
H A Dexynos5260.dtsi67 cci-control-port = <&cci_control1>;
74 cci-control-port = <&cci_control1>;
81 cci-control-port = <&cci_control0>;
88 cci-control-port = <&cci_control0>;
95 cci-control-port = <&cci_control0>;
102 cci-control-port = <&cci_control0>;
355 cci: cci@10f00000 { label
356 compatible = "arm,cci-400";
363 compatible = "arm,cci-400-ctrl-if";
369 compatible = "arm,cci-400-ctrl-if";
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt6795.dtsi55 cci-control-port = <&cci_control2>;
64 cci-control-port = <&cci_control2>;
79 cci-control-port = <&cci_control2>;
94 cci-control-port = <&cci_control2>;
109 cci-control-port = <&cci_control1>;
124 cci-control-port = <&cci_control1>;
139 cci-control-port = <&cci_control1>;
154 cci-control-port = <&cci_control1>;
489 cci: cci
450 cci: cci@10390000 { global() label
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H A Dmt7622.dtsi82 cci-control-port = <&cci_control2>;
97 cci-control-port = <&cci_control2>;
346 cci: cci@10390000 { label
347 compatible = "arm,cci-400";
354 compatible = "arm,cci-400-ctrl-if";
360 compatible = "arm,cci-400-ctrl-if";
366 compatible = "arm,cci-400-ctrl-if", "syscon";
372 compatible = "arm,cci-400-pmu,r1";
988 cci-control-port = <&cci_control2>;
H A Dmt8183.dtsi214 cci_opp: opp-table-cci {
283 cci: cci { label
284 compatible = "mediatek,mt8183-cci";
287 clock-names = "cci", "intermediate";
347 mediatek,cci = <&cci>;
370 mediatek,cci = <&cci>;
393 mediatek,cci = <&cci>;
416 mediatek,cci = <&cci>;
439 mediatek,cci = <&cci>;
462 mediatek,cci = <&cci>;
[all …]
H A Dmt8186.dtsi32 cci: cci { label
33 compatible = "mediatek,mt8186-cci";
36 clock-names = "cci", "intermediate";
40 cci_opp: opp-table-cci {
388 mediatek,cci = <&cci>;
412 mediatek,cci = <&cci>;
436 mediatek,cci = <&cci>;
460 mediatek,cci = <&cci>;
484 mediatek,cci = <&cci>;
508 mediatek,cci = <&cci>;
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/freebsd/sys/contrib/device-tree/Bindings/cpufreq/
H A Dcpufreq-mediatek.txt23 - mediatek,cci:
24 Used to confirm the link status between cpufreq and mediatek cci. Because
25 cpufreq and mediatek cci could share the same regulator in some MediaTek SoCs.
27 property to make sure mediatek cci is ready.
28 For details of mediatek cci, please refer to
29 Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml
/freebsd/sys/contrib/device-tree/src/arm/mediatek/
H A Dmt7629.dtsi32 cci-control-port = <&cci_control2>;
40 cci-control-port = <&cci_control2>;
174 cci: cci@10390000 { label
175 compatible = "arm,cci-400";
182 compatible = "arm,cci-400-ctrl-if";
188 compatible = "arm,cci-400-ctrl-if";
194 compatible = "arm,cci-400-ctrl-if";
200 compatible = "arm,cci-400-pmu,r1";
/freebsd/sys/contrib/device-tree/src/arm/arm/
H A Dvexpress-v2p-ca15_a7.dts42 cci-control-port = <&cci_control1>;
52 cci-control-port = <&cci_control1>;
62 cci-control-port = <&cci_control2>;
72 cci-control-port = <&cci_control2>;
82 cci-control-port = <&cci_control2>;
161 cci@2c090000 {
162 compatible = "arm,cci-400";
169 compatible = "arm,cci-400-ctrl-if";
175 compatible = "arm,cci-400-ctrl-if";
181 compatible = "arm,cci-400-pmu,r0";
/freebsd/sys/dev/cesa/
H A Dcesa.c549 struct cesa_chain_info *cci; in cesa_create_chain_cb() local
561 cci = arg; in cesa_create_chain_cb()
562 sc = cci->cci_sc; in cesa_create_chain_cb()
563 cr = cci->cci_cr; in cesa_create_chain_cb()
567 cci->cci_error = error; in cesa_create_chain_cb()
577 config = cci->cci_config; in cesa_create_chain_cb()
591 cci->cci_config = config | CESA_CSHD_MAC; in cesa_create_chain_cb()
592 cesa_create_chain_cb(cci, segs, nseg, 0); in cesa_create_chain_cb()
594 cci->cci_config = config | CESA_CSHD_ENC; in cesa_create_chain_cb()
595 cesa_create_chain_cb(cci, segs, nseg, 0); in cesa_create_chain_cb()
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/freebsd/sys/contrib/device-tree/src/arm/allwinner/
H A Dsun9i-a80.dtsi70 cci-control-port = <&cci_control0>;
79 cci-control-port = <&cci_control0>;
88 cci-control-port = <&cci_control0>;
97 cci-control-port = <&cci_control0>;
106 cci-control-port = <&cci_control1>;
115 cci-control-port = <&cci_control1>;
124 cci-control-port = <&cci_control1>;
133 cci-control-port = <&cci_control1>;
551 cci: cci@1c90000 { label
552 compatible = "arm,cci-400";
[all …]
H A Dsun8i-a83t.dtsi69 cci-control-port = <&cci_control0>;
80 cci-control-port = <&cci_control0>;
91 cci-control-port = <&cci_control0>;
102 cci-control-port = <&cci_control0>;
113 cci-control-port = <&cci_control1>;
124 cci-control-port = <&cci_control1>;
135 cci-control-port = <&cci_control1>;
146 cci-control-port = <&cci_control1>;
405 cci@1790000 {
406 compatible = "arm,cci-400";
[all …]
/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Ddwc3-xilinx.txt23 - dma-coherent: Enable this flag if CCI is enabled in design. Adding this
25 Xilinx USB 3.0 IP - USB coherency register to enable CCI.
/freebsd/share/doc/papers/beyond4.3/
H A Dbeyond43.ms96 non-VAX processor, the CCI Power 6/32 and 6/32SX. (This addition also
100 device drivers done for CCI's 4.2BSD UNIX,
127 During the work on the CCI machine,
130 Disk labels were implemented for the CCI disks and for the most common
/freebsd/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/
H A DCheckerManager.cpp80 CachedDeclCheckersMapTy::iterator CCI = CachedDeclCheckersMap.find(DeclKind); in runCheckersOnASTDecl() local
81 if (CCI != CachedDeclCheckersMap.end()) { in runCheckersOnASTDecl()
82 checkers = &(CCI->second); in runCheckersOnASTDecl()
910 CachedStmtCheckersMapTy::iterator CCI = CachedStmtCheckersMap.find(Key); in getCachedStmtCheckersFor() local
911 if (CCI != CachedStmtCheckersMap.end()) in getCachedStmtCheckersFor()
912 return CCI->second; in getCachedStmtCheckersFor()

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