BPI\-R2 (full) in projects: freebsd - OpenGrok search results

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Searched +full:bpi +full:- +full:r2 (Results 1 – 15 of 15) sorted by relevance

/freebsd/sys/contrib/device-tree/src/arm/mediatek/
H A D	mt7623n-bananapi-bpi-r2.dts	`2 * Copyright 2017-2018 Sean Wang <sean.wang@mediatek.com> 4 * SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/input/input.h> 13 model = "Bananapi BPI-R2"; 14 compatible = "bananapi,bpi-r2", "mediatek,mt7623"; 21 stdout-path = "serial2:115200n8"; 25 compatible = "hdmi-connector"; 28 ddc-i2c-bus = <&hdmiddc0>; 32 remote-endpoint = <&hdmi0_out>; [all …]`
/freebsd/crypto/openssl/crypto/bn/asm/
H A D	ppc64-mont-fixed.pl	2 # Copyright 2021-2022 The OpenSSL Project Authors. All Rights Reserved. 11 # <martin@meltin.net> & Alastair D'Silva <alastair@d-silva.org> for 33 # Finally, saving non-volatile registers into volatile vector 50 ( $xlate="${dir}ppc-xlate.pl" and -f $xlate ) or 51 ( $xlate="${dir}../../perlasm/ppc-xlate.pl" and -f $xlate) or 52 die "can't locate ppc-xlate.pl"; 58 die "bad flavour ($flavour) - only ppc64 permitted"; 68 my $toc = "r2"; 79 my $bpi = "r11"; 87 # Non-volatile registers used for tp[i] [all …]
/freebsd/sys/modules/dtb/rockchip/
H A D	Makefile	`5 rockchip/rk3288-tinker.dts \ 6 rockchip/rk3288-tinker-s.dts 9 rockchip/rk3399-khadas-edge-captain.dts \ 10 rockchip/rk3399-khadas-edge.dts \ 11 rockchip/rk3399-khadas-edge-v.dts \ 12 rockchip/rk3399-nanopc-t4.dts \ 13 rockchip/rk3328-nanopi-r2s.dts \ 14 rockchip/rk3399-nanopi-r4s.dts \ 15 rockchip/rk3399-rock-4c-plus.dts \ 16 rockchip/rk3399-rock-pi-4.dts \ [all …]`
/freebsd/sys/contrib/device-tree/Bindings/arm/
H A D	mediatek.yaml	`1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sean Wang <sean.wang@mediatek.com> 11 - Matthias Brugger <matthias.bgg@gmail.com> 21 - items: 22 - enum: 23 - mediatek,mt2701-evb 24 - const: mediatek,mt2701 26 - items: [all …]`
H A D	rockchip.yaml	`1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <heiko@sntech.de> 18 - description: 96boards RK3399 Ficus (ROCK960 Enterprise Edition) 20 - const: vamrs,ficus 21 - const: rockchip,rk3399 23 - description: 96boards RK3399 Rock960 (ROCK960 Consumer Edition) 25 - const: vamrs,rock960 26 - const: rockchip,rk3399 [all …]`
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A D	InductiveRangeCheckElimination.cpp	1 //===- InductiveRangeCheckElimination.cpp - -------- 248 BranchProbabilityInfo BPI; global() member in __anona4c10e620111::InductiveRangeCheckElimination 262 InductiveRangeCheckElimination(ScalarEvolution & SE,BranchProbabilityInfo BPI,DominatorTree & DT,LoopInfo & LI,GetBFIFunc GetBFI=std::nullopt) InductiveRangeCheckElimination() argument 528 extractRangeChecksFromBranch(BranchInst * BI,Loop * L,ScalarEvolution & SE,BranchProbabilityInfo * BPI,SmallVectorImpl<InductiveRangeCheck> & Checks,bool & Changed) extractRangeChecksFromBranch() argument 1927 IntersectSignedRange(ScalarEvolution & SE,const std::optional<InductiveRangeCheck::Range> & R1,const InductiveRangeCheck::Range & R2) IntersectSignedRange() argument 1956 IntersectUnsignedRange(ScalarEvolution & SE,const std::optional<InductiveRangeCheck::Range> & R1,const InductiveRangeCheck::Range & R2) IntersectUnsignedRange() argument 1990 auto &BPI = AM.getResult<BranchProbabilityAnalysis>(F); run() local [all...]
/freebsd/contrib/llvm-project/clang/lib/Basic/Targets/
H A D	ARM.cpp	1 //===--- ARM.cpp - Implement ARM target feature support -------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 11 //===----------------------------------------------------------------------===// 47 ? "E-m:o-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64" in setABIAAPCS() 48 : "e-m:o-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64", in setABIAAPCS() 53 "-m:w" in setABIAAPCS() 54 "-p:32:32" in setABIAAPCS() 55 "-Fi8" in setABIAAPCS() 56 "-i64:64" in setABIAAPCS() [all …]
H A D	AArch64.cpp	1 //===--- AArch64.cpp - Implement AArch64 target feature support -----------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 11 //===----------------------------------------------------------------------===// 70 } else if (ArchInfo->Version.getMajor() == 8) { in setArchFeatures() 71 if (ArchInfo->Version.getMinor() >= 7u) { in setArchFeatures() 74 if (ArchInfo->Version.getMinor() >= 6u) { in setArchFeatures() 78 if (ArchInfo->Version.getMinor() >= 5u) { in setArchFeatures() 86 if (ArchInfo->Version.getMinor() >= 4u) { in setArchFeatures() 91 if (ArchInfo->Version.getMinor() >= 3u) { in setArchFeatures() [all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A D	HexagonVLIWPacketizer.cpp	1 //===- HexagonPacketizer.cpp - VLIW packetizer ----------------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 17 //===----------------------------------------------------------------------===// 59 DisablePacketizer("disable-packetizer", cl::Hidden, 62 static cl::opt<bool> Slot1Store("slot1-store-slot0-load", cl::Hidden, 67 "hexagon-packetize-volatiles", cl::Hidden, cl::init(true), 68 cl::desc("Allow non-solo packetization of volatile memory references")); 71 EnableGenAllInsnClass("enable-gen-insn", cl::Hidden, 75 DisableVecDblNVStores("disable-vecdbl-nv-stores", cl::Hidden, [all …]
H A D	HexagonInstrInfo.cpp	1 //===- HexagonInstrInfo.cpp - Hexagon Instruction Information -------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 11 //===----------------------------------------------------------------------===// 68 #define DEBUG_TYPE "hexagon-instrinfo" 76 cl::opt<bool> ScheduleInlineAsm("hexagon-sched-inline-asm", cl::Hidden, 77 cl::init(false), cl::desc("Do not consider inline-asm a scheduling/" 80 static cl::opt<bool> EnableBranchPrediction("hexagon-enable-branch-prediction", 84 "disable-hexagon-nv-schedule", cl::Hidden, 88 "enable-timing-class-latency", cl::Hidden, cl::init(false), [all …]
/freebsd/sys/contrib/device-tree/Bindings/net/dsa/
H A D	mediatek,mt7530.yaml	`1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Arınç ÜNAL <arinc.unal@arinc9.com> 11 - Landen Chao <Landen.Chao@mediatek.com> 12 - DENG Qingfang <dqfext@gmail.com> 13 - Sean Wang <sean.wang@mediatek.com> 14 - Daniel Golle <daniel@makrotopia.org> 17 There are three versions of MT7530, standalone, in a multi-chip module and 18 built-into a SoC. [all …]`
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A D	rk3568-bpi-r2-pro.dts	`1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Author: Frank Wunderlich <frank-w@public-files.de> 7 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/leds/common.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/soc/rockchip,vop2.h> 15 model = "Bananapi-R2 Pro (RK3568) DDR4 Board"; 16 compatible = "sinovoip,rk3568-bpi-r2pro", "rockchip,rk3568"; 26 stdout-path = "serial2:1500000n8"; [all …]`
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A D	InstCombineInternal.h	1 //===- InstCombineInternal.h - InstCombine pass internals -------- C++ --===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 13 //===----------------------------------------------------------------------===// 70 BlockFrequencyInfo BFI, BranchProbabilityInfo BPI, in InstCombinerImpl() argument 73 BFI, BPI, PSI, DL, LI) {} in InstCombinerImpl() 86 // Visitation implementation - Implement instruction combining for different 89 // null - No change was made 90 // I - Change was made, I is still valid, I may be dead though 91 // otherwise - Change was made, replace I with returned instruction [all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A D	PPCISelDAGToDAG.cpp	1 //===-- PPCISelDAGToDAG.cpp - PPC --pattern matching inst selector --------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 12 //===----------------------------------------------------------------------===// 72 #define DEBUG_TYPE "ppc-isel" 73 #define PASS_NAME "PowerPC DAG->DAG Pattern Instruction Selection" 86 "Number of compares not eliminated as they have non-extending uses."); 91 cl::opt<bool> ANDIGlueBug("expose-ppc-andi-glue-bug", 95 UseBitPermRewriter("ppc-use-bit-perm-rewriter", cl::init(true), 99 "ppc-bit-perm-rewriter-stress-rotates", [all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A D	SIISelLowering.cpp	1 //===-- SIISelLowering.cpp - SI DAG Lowering Implementation ---------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 12 //===----------------------------------------------------------------------===// 49 #define DEBUG_TYPE "si-lower" 54 "amdgpu-disable-loop-alignment", 59 "amdgpu-use-divergent-register-indexing", 66 return Info->getMode().FP32Denormals == DenormalMode::getPreserveSign(); in denormalModeIsFlushAllF32() 71 return Info->getMode().FP64FP16Denormals == DenormalMode::getPreserveSign(); in denormalModeIsFlushAllF64F16() 97 const TargetRegisterClass *V64RegClass = TRI->getVGPR64Class(); in SITargetLowering() [all …]