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/linux/Documentation/mm/
H A Dtranshuge.rst59 pmd_offset. It's trivial to make the code transparent hugepage aware
64 hugepage aware.
72 Example to make mremap.c transparent hugepage aware with a one liner
86 Locking in hugepage aware code
89 We want as much code as possible hugepage aware, as calling
92 To make pagetable walks huge pmd aware, all you need to do is to call
/linux/Documentation/driver-api/usb/
H A Ddma.rst14 the 2.4 (and earlier) kernels, or they can now be DMA-aware.
16 DMA-aware usb drivers:
18 - New calls enable DMA-aware drivers, letting them allocate dma buffers and
25 - "usbcore" will map this DMA address, if a DMA-aware driver didn't do
/linux/tools/testing/selftests/kvm/aarch64/
H A Ddebug-exceptions.c183 /* Setup a context-aware breakpoint for Linked Context ID Match */ in install_wp_ctx()
189 /* Setup a linked watchpoint (linked to the context-aware breakpoint) */ in install_wp_ctx()
204 /* Setup a context-aware breakpoint for Linked Context ID Match */ in install_hw_bp_ctx()
212 * to the context-aware breakpoint. in install_hw_bp_ctx()
534 * context-aware breakpoint# with the given ID_AA64DFR0_EL1 configuration.
548 /* Number of context aware breakpoints */ in test_guest_debug_exceptions_all()
554 /* Number of normal (non-context aware) breakpoints */ in test_guest_debug_exceptions_all()
557 /* Lowest context aware breakpoint number */ in test_guest_debug_exceptions_all()
/linux/tools/testing/selftests/drivers/net/mlxsw/
H A Dvxlan.sh116 log_test "vxlan device with a vlan-aware bridge"
873 log_test "vlan-aware - enslavement to vlan-aware bridge"
882 log_test "vlan-aware - two vnis mapped to the same vlan"
896 log_test "vlan-aware - failed enslavement to vlan-aware bridge"
902 # (i.e., different TTL) are enslaved to the same VLAN-aware bridge,
917 log_test "vlan-aware - failed enslavement to bridge due to conflict"
929 # Create a simple setup with two VxLAN devices and a single VLAN-aware
974 log_info "vxlan entry offload indication - vlan-aware"
1172 log_info "offload indication - replay & cleanup - vlan aware"
H A Dextack.sh125 # Test with VLAN-aware bridge.
163 # Only one VLAN-aware bridge is supported, so this should fail with
169 log_test "extack - multiple VLAN-aware bridges creation"
/linux/Documentation/scheduler/
H A Dsched-capacity.rst2 Capacity Aware Scheduling
133 Capacity aware scheduling requires an expression of a task's requirements with
248 This means that while the capacity aware scheduling criteria will be written
252 3. Capacity aware scheduling requirements
269 As stated in 2.2, capacity-aware scheduling requires a frequency-invariant task
277 when the kernel is aware of the switched-to frequency (also employed by
331 5. Capacity aware scheduling implementation
370 Wakeup CPU selection in CFS can be eclipsed by Energy Aware Scheduling
/linux/Documentation/admin-guide/mm/
H A Dshrinker_debugfs.rst59 If the shrinker is not memcg-aware or CONFIG_MEMCG is off, 0 is printed
60 as cgroup inode id. If the shrinker is not numa-aware, 0's are printed
112 For a non-memcg-aware shrinker or on a system with no memory
/linux/include/linux/
H A Dshrinker.h13 * Bitmap and deferred work of shrinker::id corresponding to memcg-aware
37 /* current node being shrunk (for NUMA aware shrinkers) */
54 /* current memcg being shrunk (for memcg aware shrinkers) */
/linux/Documentation/mm/damon/
H A Ddesign.rst32 overhead/accuracy control and access-aware system operations on top of the
272 One common purpose of data access monitoring is access-aware system efficiency
546 The programming interface for kernel space data access-aware applications.
549 access-aware applications using DAMON's core features. For this, DAMON exposes
564 for general purpose DAMON control and special purpose data access-aware system
566 user space. The user space can build their efficient data access-aware
597 Special-Purpose Access-aware Kernel Modules
603 in runtime. For each special-purpose system-wide data access-aware system
/linux/Documentation/devicetree/bindings/bus/
H A Dst,stm32mp25-rifsc.yaml20 for peripherals), assign all non-RIF aware peripherals to zero, one or
23 unit), assign all non RIF-aware bus master to one security domain by
/linux/include/asm-generic/
H A Drwonce.h5 * READ_ONCE and WRITE_ONCE, but only when the compiler is aware of some
6 * particular ordering. One way to make the compiler aware of ordering is to
/linux/arch/arm/mach-sa1100/include/mach/
H A Dirqs.h86 * Neponset, SA1111 and UCB1x00 are sparse IRQ aware, so can dynamically
89 * LoCoMo has 4 additional IRQs, but is not sparse IRQ aware, and so has
/linux/drivers/gpu/drm/
H A Ddrm_self_refresh_helper.c31 * &drm_connector_state.self_refresh_aware to true at runtime if it is SR-aware
47 * connectors must be SR aware and all will enter/exit SR mode at the same time.
49 * If the crtc and connector are SR aware, but the panel connected does not
/linux/Documentation/devicetree/bindings/arm/
H A Dsecure.txt5 kernel) are not TrustZone aware and run entirely in either the Normal
7 TrustZone aware and need to be able to determine whether devices are
/linux/Documentation/userspace-api/media/v4l/
H A Dvidioc-subdev-g-client-cap.rst85 - The client is aware of streams. Setting this flag enables the use
90 - The client is aware of the :c:type:`v4l2_subdev_frame_interval`
/linux/arch/powerpc/platforms/cell/
H A Dcpufreq_spudemand.c3 * spu aware cpufreq governor for the cell processor
132 MODULE_DESCRIPTION("SPU-aware cpufreq governor for the cell processor");
/linux/Documentation/block/
H A Ddata-integrity.rst103 It is completely unreasonable for an application to be aware whether
188 5.2 Integrity-Aware Filesystem
191 A filesystem that is integrity-aware can prepare I/Os with IMD
/linux/Documentation/locking/
H A Dfutex-requeue-pi.rst53 In order to support PI-aware pthread_condvar's, the kernel needs to
106 to be requeued to a PI-aware futex. The implementation is the
/linux/fs/zonefs/
H A DKconfig9 device (e.g. host-managed or host-aware SMR disk drives) as files.
/linux/Documentation/arch/powerpc/
H A Dtransactional_memory.rst120 However, basic signal handlers don't need to be aware of transactions
123 Transaction-aware signal handlers can read the transactional register state
198 GDB and ptrace are not currently TM-aware. If one stops during a transaction,
/linux/Documentation/networking/dsa/
H A Dsja1105.rst99 Time-aware scheduling
189 - VLAN-aware virtual links: these match on destination MAC address, VLAN ID and
304 driver asks for the VLAN ID and VLAN PCP when the port is under a VLAN-aware
312 - port was standalone and joins a bridge (VLAN-aware or VLAN-unaware)
315 - port was standalone, but another port joins a VLAN-aware bridge and this
/linux/net/dsa/
H A Dtag_sja1105.c186 /* Port is VLAN-aware, so there is a bridge somewhere (a single one, in sja1105_xmit_tpid()
198 * VLAN-aware in that case. in sja1105_xmit_tpid()
205 WARN_ONCE(1, "Port is VLAN-aware but cannot find associated bridge!\n"); in sja1105_xmit_tpid()
218 /* If the port is under a VLAN-aware bridge, just slide the in sja1105_imprecise_xmit()
220 * This works because we support a single VLAN-aware bridge in sja1105_imprecise_xmit()
/linux/include/linux/mailbox/
H A Dzynqmp-ipi-message.h13 * Client is supposed to be aware of this.
/linux/Documentation/arch/arm/
H A Dkernel_mode_neon.rst13 * Don't sleep in your NEON code, and be aware that it will be executed with
81 The compiler is not aware of the special significance of kernel_neon_begin() and
/linux/Documentation/admin-guide/pm/
H A Dintel_uncore_frequency_scaling.rst62 SoCs with TPMI (Topology Aware Register and PM Capsule Interface)
76 SoCs with the support of TPMI (Topology Aware Register and PM Capsule

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