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/linux/arch/s390/include/asm/
H A Dalternative.h6 * Each alternative comes with a 32 bit feature field:
17 * in which context an alternative is supposed to be applied to the
24 * specific alternative patching.
27 * alternative should be applied.
67 u32 type : 8; /* type of alternative */
97 * | alternative instr 1 |
100 * | alternative instr 2 |
106 * | alternative instr |
130 /* alternative assembly primitive: */
131 #define ALTERNATIVE(oldinstr, altinstr, feature) \ macro
[all …]
/linux/tools/testing/selftests/net/
H A Daltnames.sh21 check_err $? "Failed to add short alternative name"
24 check_err $? "Failed to do link show with short alternative name"
27 check_err $? "Failed to get short alternative name from link show JSON"
30 check_err $? "Got unexpected short alternative name from link show JSON"
36 check_err $? "Failed to add long alternative name"
39 check_err $? "Failed to do link show with long alternative name"
42 check_err $? "Failed to get long alternative name from link show JSON"
45 check_err $? "Got unexpected long alternative name from link show JSON"
48 check_err $? "Failed to delete short alternative name"
51 check_fail $? "Unexpected success while trying to do link show with deleted short alternative name"
/linux/arch/parisc/include/asm/
H A Dcache.h9 #include <asm/alternative.h>
53 ALTERNATIVE(ALT_COND_NO_SMP, INSN_PxTLB) \
56 ALTERNATIVE(ALT_COND_NO_SMP, INSN_PxTLB) \
57 ALTERNATIVE(ALT_COND_NO_SPLIT_TLB, INSN_NOP) \
61 ALTERNATIVE(ALT_COND_NO_DCACHE, INSN_NOP) \
62 ALTERNATIVE(ALT_COND_NO_IOC_FDC, INSN_NOP) \
65 ALTERNATIVE(ALT_COND_NO_DCACHE, INSN_NOP) \
66 ALTERNATIVE(ALT_COND_NO_IOC_FDC, INSN_NOP) :::"memory")
H A Dalternative.h35 /* Alternative SMP implementation. */
36 #define ALTERNATIVE(cond, replacement) "!0:" \ macro
47 #define ALTERNATIVE(from, to, cond, replacement)\ macro
/linux/arch/riscv/include/asm/
H A Derrata_list.h18 ALTERNATIVE(__stringify(RISCV_PTR do_trap_insn_fault), \
24 ALTERNATIVE(__stringify(RISCV_PTR do_page_fault), \
31 asm(ALTERNATIVE("sfence.vma x0, %0", "sfence.vma", SIFIVE_VENDOR_ID, \
36 asm(ALTERNATIVE("sfence.vma %0", "sfence.vma", SIFIVE_VENDOR_ID, \
41 asm(ALTERNATIVE("sfence.vma %0, %1", "sfence.vma", SIFIVE_VENDOR_ID, \
46 asm(ALTERNATIVE( \
81 asm volatile(ALTERNATIVE( \
102 asm volatile(ALTERNATIVE( \
H A Dalternative-macros.h19 .pushsection .alternative, "a"
70 ".pushsection .alternative, \"a\"\n" \
135 * ALTERNATIVE(old_content, new_content, vendor_id, patch_id, CONFIG_k)
137 * asm(ALTERNATIVE(old_content, new_content, vendor_id, patch_id, CONFIG_k));
146 #define ALTERNATIVE(old_content, new_content, vendor_id, patch_id, CONFIG_k) \ macro
151 * ALTERNATIVE() to patch its customized content at the same location. In
153 * on the following sample code and then replace ALTERNATIVE() with
H A Dcpufeature-macros.h10 #include <asm/alternative-macros.h>
21 asm goto(ALTERNATIVE("j %l[l_no]", "nop", %[vendor], %[ext], 1) in __riscv_has_extension_likely()
35 asm goto(ALTERNATIVE("nop", "j %l[l_yes]", %[vendor], %[ext], 1) in __riscv_has_extension_unlikely()
/linux/arch/loongarch/include/asm/
H A Dalternative.h21 * Debug flag that can be tested to see whether alternative
50 * Pad the second replacement alternative with additional NOPs if it is
51 * additionally longer than the first replacement alternative.
70 /* alternative assembly primitive: */
71 #define ALTERNATIVE(oldinstr, newinstr, feature) \ macro
92 * Alternative instructions for different CPU types or capabilities.
103 #define alternative(oldinstr, newinstr, feature) \ macro
104 (asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) : : : "memory"))
H A Dalternative-asm.h24 * Define an alternative between two instructions. If @feature is
29 .macro ALTERNATIVE oldinstr, newinstr, feature
54 * Same as ALTERNATIVE macro above but for two alternatives. If CPU
/linux/Documentation/networking/pse-pd/
H A Dpse-pi.rst32 design. As a result, the complexities of choosing between alternative pin
42 as Alternative A and Alternative B, which are distinguished not only by their
46 Alternative A and B Overview
49 - **Alternative A:** Utilizes RJ45 conductors 1, 2, 3 and 6. In either case of
51 The power delivery's polarity in this alternative can vary based on the MDI
55 - **Alternative B:** Utilizes RJ45 conductors 4, 5, 7 and 8. In case of
58 1G/2G/5G/10GBaseT network. Alternative B includes two configurations with
65 The following table outlines the pin configurations for both Alternative A and
66 Alternative B.
69 | Conductor | Alternative A | Alternative A | Alternative B | Alternative B |
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/linux/tools/testing/selftests/powerpc/pmu/event_code_tests/
H A Devent_alternatives_tests_p9.c34 * alternative events is handled by respective PMU driver in event_alternatives_tests_p9()
50 * Expected to pass since PM_RUN_CYC_ALT in PMC2 has alternative event in event_alternatives_tests_p9()
63 * Expected to pass since PM_INST_DISP in PMC2 has alternative event in event_alternatives_tests_p9()
76 * Expected to pass since PM_BR_2PATH in PMC2 has alternative event in event_alternatives_tests_p9()
89 * Expected to pass since PM_LD_MISS_L1 in PMC3 has alternative event in event_alternatives_tests_p9()
102 * Expected to pass since PM_RUN_INST_CMPL_ALT in PMC4 has alternative event in event_alternatives_tests_p9()
H A Devent_alternatives_tests_p10.c36 * alternative events is handled by respective PMU driver in event_alternatives_tests_p10()
45 * Test for event alternative for 0x0001e in event_alternatives_tests_p10()
66 * Expected to pass since 0x0001e has alternative event in event_alternatives_tests_p10()
94 * Expected to pass since 0x00020 has alternative event in event_alternatives_tests_p10()
/linux/arch/x86/entry/
H A Dcalling.h168 ALTERNATIVE "", "SET_NOFLUSH_BIT \reg", X86_FEATURE_PCID
174 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
187 ALTERNATIVE "jmp .Lwrcr3_\@", "", X86_FEATURE_PCID
217 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
223 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
231 ALTERNATIVE "jmp .Ldone_\@", "", X86_FEATURE_PTI
250 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
260 ALTERNATIVE "jmp .Lwrcr3_\@", "", X86_FEATURE_PCID
307 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_KERNEL_IBRS
336 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_KERNEL_IBRS
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/linux/Documentation/devicetree/bindings/net/pse-pd/
H A Dpse-controller.yaml75 - alternative-a
76 - alternative-b
86 | Conductor | Alternative A | Alternative A | Alternative B | Alternative B |
/linux/arch/arm64/include/asm/
H A Dlse.h14 #include <asm/alternative.h>
15 #include <asm/alternative-macros.h>
28 ALTERNATIVE(llsc, __LSE_PREAMBLE lse, ARM64_HAS_LSE_ATOMICS)
H A Darch_timer.h69 asm volatile(ALTERNATIVE("isb\n mrs %0, cntpct_el0", in arch_timer_read_cntpct_el0()
81 asm volatile(ALTERNATIVE("isb\n mrs %0, cntvct_el0", in arch_timer_read_cntvct_el0()
183 asm volatile(ALTERNATIVE("isb\n mrs %0, cntpct_el0", in __arch_counter_get_cntpct()
204 asm volatile(ALTERNATIVE("isb\n mrs %0, cntvct_el0", in __arch_counter_get_cntvct()
/linux/arch/x86/include/asm/
H A Duaccess_64.h11 #include <asm/alternative.h>
29 asm_inline (ALTERNATIVE("", "and " __percpu_arg([mask]) ", %[addr]", in __untagged_addr()
60 * Masking the user address is an alternative to a conditional
128 ALTERNATIVE("rep movsb", in copy_user_generic()
190 ALTERNATIVE("rep stosb", in __clear_user()
H A Dnospec-branch.h10 #include <asm/alternative.h>
299 ALTERNATIVE "", \
324 * VERW within an ALTERNATIVE.
330 ALTERNATIVE "", __CLEAR_CPU_BUFFERS, X86_FEATURE_CLEAR_CPU_BUF
334 ALTERNATIVE "", "call clear_bhb_loop", X86_FEATURE_CLEAR_BHB_LOOP
338 ALTERNATIVE "", "call clear_bhb_loop", X86_FEATURE_CLEAR_BHB_VMEXIT
403 ALTERNATIVE("", \
528 asm volatile(ALTERNATIVE("", "wrmsr", %c[feature]) in alternative_msr_write()
540 asm_inline volatile(ALTERNATIVE("", "call write_ibpb", X86_FEATURE_IBPB) in indirect_branch_prediction_barrier()
/linux/arch/parisc/kernel/
H A Dpacache.S26 #include <asm/alternative.h>
106 ALTERNATIVE(88b, fitdone, ALT_COND_NO_SPLIT_TLB, INSN_NOP)
244 89: ALTERNATIVE(88b, 89b, ALT_COND_NO_ICACHE, INSN_NOP)
305 89: ALTERNATIVE(88b, 89b, ALT_COND_NO_DCACHE, INSN_NOP)
548 ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
549 ALTERNATIVE(1b, 1b+4, ALT_COND_NO_SMP, INSN_PxTLB)
677 ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
743 ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
775 89: ALTERNATIVE(88b, 89b, ALT_COND_NO_DCACHE, INSN_NOP)
792 ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
[all …]
H A Dalternative.c3 * Alternative live-patching for parisc.
10 #include <asm/alternative.h>
83 pr_debug("ALTERNATIVE %3d: Cond %2x, Replace %2d instructions to 0x%08x @ 0x%px (%pS)\n", in apply_alternatives()
/linux/arch/s390/kernel/
H A Dentry.S15 #include <asm/alternative.h>
37 ALTERNATIVE "nop", ".insn s,0xb2010000,\address", ALT_FACILITY(193)
41 ALTERNATIVE "nop", ".insn s,0xb2000000,\address", ALT_FACILITY(193)
52 ALTERNATIVE "brcl 0,0", __stringify(mvc __PT_LAST_BREAK(8,\reg),__LC_LAST_BREAK(\lowcore)),\
97 ALTERNATIVE "nop", ".insn rrf,0xb2e80000,0,0,12,0", ALT_SPEC(82)
101 ALTERNATIVE "nop", ".insn rrf,0xb2e80000,0,0,13,0", ALT_SPEC(82)
105 ALTERNATIVE "TSTMSK \tif_ptr,\tif_mask; jz .+8; .insn rrf,0xb2e80000,0,0,13,0", \
111 ALTERNATIVE "jz .+8; .insn rrf,0xb2e80000,0,0,12,0", \
167 ALTERNATIVE "nop", "lpp _LPP_OFFSET(%r13)", ALT_FACILITY(40)
499 0: ALTERNATIVE "brcl 0,0", __stringify(lay %r12,__LC_LAST_BREAK_SAVE_AREA(%r13)),\
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/linux/arch/riscv/kernel/
H A Dalternative.c3 * alternative runtime patching
13 #include <asm/alternative.h>
141 /* Don't modify jumps inside the alternative block */ in riscv_alternative_fix_offsets()
186 alt = find_section(hdr, shdr, ".alternative"); in apply_vdso_alternatives()
223 * for alternative.o in kernel/Makefile.
/linux/tools/arch/x86/lib/
H A Dmemset_64.S8 #include <asm/alternative.h>
23 * The FSRS alternative should be done inline (avoiding the call and
33 ALTERNATIVE "jmp memset_orig", "", X86_FEATURE_FSRS
/linux/tools/include/asm/
H A Dalternative.h7 .macro ALTERNATIVE oldinstr, newinstr, feature
15 #define ALTERNATIVE # macro
/linux/arch/x86/lib/
H A Dretpoline.S8 #include <asm/alternative.h>
268 /* Dummy for the alternative in CALL_UNTRAIN_RET. */
369 ALTERNATIVE JMP_RETBLEED_UNTRAIN_RET, JMP_SRSO_UNTRAIN_RET, X86_FEATURE_SRSO
432 * The ALTERNATIVE below adds a really loud warning to catch the case
443 ALTERNATIVE __stringify(ANNOTATE_UNRET_SAFE; ret), \

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