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/linux/arch/x86/include/asm/
H A Dsmap.h14 #include <asm/alternative.h>
19 ALTERNATIVE "", "clac", X86_FEATURE_SMAP
22 ALTERNATIVE "", "stac", X86_FEATURE_SMAP
28 /* Note: a barrier is implicit in alternative() */ in clac()
29 alternative("", "clac", X86_FEATURE_SMAP); in clac()
34 /* Note: a barrier is implicit in alternative() */ in stac()
35 alternative("", "stac", X86_FEATURE_SMAP); in stac()
43 ALTERNATIVE(ANNOTATE_IGNORE_ALTERNATIVE in smap_save()
54 ALTERNATIVE(ANNOTATE_IGNORE_ALTERNATIVE in smap_restore()
62 ALTERNATIVE("", "clac", X86_FEATURE_SMAP)
[all …]
H A Dalternative.h24 * Alternative inline assembly for SMP.
34 * The SMP alternative tables can be kept after boot and contain both
93 * Debug flag that can be tested to see whether alternative
214 /* alternative assembly primitive: */
215 #define ALTERNATIVE(oldinstr, newinstr, ft_flags) \ macro
221 ALTERNATIVE(ALTERNATIVE(oldinstr, newinstr1, ft_flags1), newinstr2, ft_flags2)
229 ALTERNATIVE(ALTERNATIVE_2(oldinstr, newinstr1, ft_flags1, newinstr2, ft_flags2), \
233 * Alternative instructions for different CPU types or capabilities.
244 #define alternative(oldinstr, newinstr, ft_flags) \ macro
245 asm_inline volatile(ALTERNATIVE(oldinstr, newinstr, ft_flags) : : : "memory")
[all …]
H A Dnospec-branch.h10 #include <asm/alternative.h>
299 ALTERNATIVE "", \
313 ALTERNATIVE "", "verw mds_verw_sel(%rip)", X86_FEATURE_CLEAR_CPU_BUF
320 ALTERNATIVE "", "verw %cs:mds_verw_sel", X86_FEATURE_CLEAR_CPU_BUF
326 ALTERNATIVE "", "call clear_bhb_loop", X86_FEATURE_CLEAR_BHB_LOOP
330 ALTERNATIVE "", "call clear_bhb_loop", X86_FEATURE_CLEAR_BHB_VMEXIT
395 ALTERNATIVE("", \
519 asm volatile(ALTERNATIVE("", "wrmsr", %c[feature]) in alternative_msr_write()
529 asm_inline volatile(ALTERNATIVE("", "call write_ibpb", X86_FEATURE_IBPB) in indirect_branch_prediction_barrier()
/linux/tools/testing/selftests/net/
H A Daltnames.sh21 check_err $? "Failed to add short alternative name"
24 check_err $? "Failed to do link show with short alternative name"
27 check_err $? "Failed to get short alternative name from link show JSON"
30 check_err $? "Got unexpected short alternative name from link show JSON"
36 check_err $? "Failed to add long alternative name"
39 check_err $? "Failed to do link show with long alternative name"
42 check_err $? "Failed to get long alternative name from link show JSON"
45 check_err $? "Got unexpected long alternative name from link show JSON"
48 check_err $? "Failed to delete short alternative name"
51 check_fail $? "Unexpected success while trying to do link show with deleted short alternative name"
/linux/arch/arm64/include/asm/
H A Dalternative-macros.h41 * alternative assembly primitive:
117 * Alternative sequences
131 * alternative sequence it is defined in (branches into an
132 * alternative sequence are not fixed up).
136 * Begin an alternative code sequence.
165 * Provide the other half of the alternative code sequence.
178 * Complete an alternative code sequence.
190 * Callback-based alternative epilogue
197 * Provides a trivial alternative or default sequence consisting solely
213 * Usage: asm(ALTERNATIVE(oldinstr, newinstr, cpucap));
[all …]
H A Dlse.h14 #include <asm/alternative.h>
15 #include <asm/alternative-macros.h>
28 ALTERNATIVE(llsc, __LSE_PREAMBLE lse, ARM64_HAS_LSE_ATOMICS)
H A Darch_timer.h69 asm volatile(ALTERNATIVE("isb\n mrs %0, cntpct_el0", in arch_timer_read_cntpct_el0()
81 asm volatile(ALTERNATIVE("isb\n mrs %0, cntvct_el0", in arch_timer_read_cntvct_el0()
183 asm volatile(ALTERNATIVE("isb\n mrs %0, cntpct_el0", in __arch_counter_get_cntpct()
204 asm volatile(ALTERNATIVE("isb\n mrs %0, cntvct_el0", in __arch_counter_get_cntvct()
/linux/arch/parisc/include/asm/
H A Dcache.h9 #include <asm/alternative.h>
53 ALTERNATIVE(ALT_COND_NO_SMP, INSN_PxTLB) \
56 ALTERNATIVE(ALT_COND_NO_SMP, INSN_PxTLB) \
57 ALTERNATIVE(ALT_COND_NO_SPLIT_TLB, INSN_NOP) \
61 ALTERNATIVE(ALT_COND_NO_DCACHE, INSN_NOP) \
62 ALTERNATIVE(ALT_COND_NO_IOC_FDC, INSN_NOP) \
65 ALTERNATIVE(ALT_COND_NO_DCACHE, INSN_NOP) \
66 ALTERNATIVE(ALT_COND_NO_IOC_FDC, INSN_NOP) :::"memory")
H A Dalternative.h35 /* Alternative SMP implementation. */
36 #define ALTERNATIVE(cond, replacement) "!0:" \ macro
47 #define ALTERNATIVE(from, to, cond, replacement)\ macro
/linux/arch/riscv/include/asm/
H A Derrata_list.h8 #include <asm/alternative.h>
35 ALTERNATIVE(__stringify(RISCV_PTR do_trap_insn_fault), \
41 ALTERNATIVE(__stringify(RISCV_PTR do_page_fault), \
48 asm(ALTERNATIVE("sfence.vma x0, %0", "sfence.vma", SIFIVE_VENDOR_ID, \
53 asm(ALTERNATIVE("sfence.vma %0", "sfence.vma", SIFIVE_VENDOR_ID, \
58 asm(ALTERNATIVE("sfence.vma %0, %1", "sfence.vma", SIFIVE_VENDOR_ID, \
87 asm volatile(ALTERNATIVE( \
108 asm volatile(ALTERNATIVE( \
H A Dalternative-macros.h19 .pushsection .alternative, "a"
70 ".pushsection .alternative, \"a\"\n" \
135 * ALTERNATIVE(old_content, new_content, vendor_id, patch_id, CONFIG_k)
137 * asm(ALTERNATIVE(old_content, new_content, vendor_id, patch_id, CONFIG_k));
146 #define ALTERNATIVE(old_content, new_content, vendor_id, patch_id, CONFIG_k) \ macro
151 * ALTERNATIVE() to patch its customized content at the same location. In
153 * on the following sample code and then replace ALTERNATIVE() with
H A Dcpufeature-macros.h10 #include <asm/alternative-macros.h>
21 asm goto(ALTERNATIVE("j %l[l_no]", "nop", %[vendor], %[ext], 1) in __riscv_has_extension_likely()
35 asm goto(ALTERNATIVE("nop", "j %l[l_yes]", %[vendor], %[ext], 1) in __riscv_has_extension_unlikely()
H A Darch_hweight.h9 #include <asm/alternative-macros.h>
23 asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0, in __arch_hweight32()
54 asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0, in __arch_hweight64()
/linux/arch/loongarch/include/asm/
H A Dalternative.h21 * Debug flag that can be tested to see whether alternative
50 * Pad the second replacement alternative with additional NOPs if it is
51 * additionally longer than the first replacement alternative.
70 /* alternative assembly primitive: */
71 #define ALTERNATIVE(oldinstr, newinstr, feature) \ macro
92 * Alternative instructions for different CPU types or capabilities.
103 #define alternative(oldinstr, newinstr, feature) \ macro
104 (asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) : : : "memory"))
H A Dalternative-asm.h24 * Define an alternative between two instructions. If @feature is
29 .macro ALTERNATIVE oldinstr, newinstr, feature
54 * Same as ALTERNATIVE macro above but for two alternatives. If CPU
/linux/Documentation/networking/pse-pd/
H A Dpse-pi.rst32 design. As a result, the complexities of choosing between alternative pin
42 as Alternative A and Alternative B, which are distinguished not only by their
46 Alternative A and B Overview
49 - **Alternative A:** Utilizes RJ45 conductors 1, 2, 3 and 6. In either case of
51 The power delivery's polarity in this alternative can vary based on the MDI
55 - **Alternative B:** Utilizes RJ45 conductors 4, 5, 7 and 8. In case of
58 1G/2G/5G/10GBaseT network. Alternative B includes two configurations with
65 The following table outlines the pin configurations for both Alternative A and
66 Alternative B.
69 | Conductor | Alternative A | Alternative A | Alternative B | Alternative B |
[all …]
/linux/tools/testing/selftests/powerpc/pmu/event_code_tests/
H A Devent_alternatives_tests_p9.c34 * alternative events is handled by respective PMU driver in event_alternatives_tests_p9()
50 * Expected to pass since PM_RUN_CYC_ALT in PMC2 has alternative event in event_alternatives_tests_p9()
63 * Expected to pass since PM_INST_DISP in PMC2 has alternative event in event_alternatives_tests_p9()
76 * Expected to pass since PM_BR_2PATH in PMC2 has alternative event in event_alternatives_tests_p9()
89 * Expected to pass since PM_LD_MISS_L1 in PMC3 has alternative event in event_alternatives_tests_p9()
102 * Expected to pass since PM_RUN_INST_CMPL_ALT in PMC4 has alternative event in event_alternatives_tests_p9()
H A Devent_alternatives_tests_p10.c36 * alternative events is handled by respective PMU driver in event_alternatives_tests_p10()
45 * Test for event alternative for 0x0001e in event_alternatives_tests_p10()
66 * Expected to pass since 0x0001e has alternative event in event_alternatives_tests_p10()
94 * Expected to pass since 0x00020 has alternative event in event_alternatives_tests_p10()
/linux/Documentation/devicetree/bindings/net/pse-pd/
H A Dpse-controller.yaml75 - alternative-a
76 - alternative-b
86 | Conductor | Alternative A | Alternative A | Alternative B | Alternative B |
H A Dti,tps23881.yaml100 pairset-names = "alternative-a", "alternative-b";
109 pairset-names = "alternative-a";
/linux/arch/s390/kernel/
H A Dentry.S15 #include <asm/alternative.h>
37 ALTERNATIVE "nop", ".insn s,0xb2010000,\address", ALT_FACILITY(193)
41 ALTERNATIVE "nop", ".insn s,0xb2000000,\address", ALT_FACILITY(193)
52 ALTERNATIVE "brcl 0,0", __stringify(mvc __PT_LAST_BREAK(8,\reg),__LC_LAST_BREAK(\lowcore)),\
97 ALTERNATIVE "nop", ".insn rrf,0xb2e80000,0,0,12,0", ALT_SPEC(82)
101 ALTERNATIVE "nop", ".insn rrf,0xb2e80000,0,0,13,0", ALT_SPEC(82)
105 ALTERNATIVE "TSTMSK \tif_ptr,\tif_mask; jz .+8; .insn rrf,0xb2e80000,0,0,13,0", \
111 ALTERNATIVE "jz .+8; .insn rrf,0xb2e80000,0,0,12,0", \
167 ALTERNATIVE "nop", "lpp _LPP_OFFSET(%r13)", ALT_FACILITY(40)
493 0: ALTERNATIVE "brcl 0,0", __stringify(lay %r12,__LC_LAST_BREAK_SAVE_AREA(%r13)),\
[all …]
/linux/arch/parisc/kernel/
H A Dpacache.S26 #include <asm/alternative.h>
106 ALTERNATIVE(88b, fitdone, ALT_COND_NO_SPLIT_TLB, INSN_NOP)
244 89: ALTERNATIVE(88b, 89b, ALT_COND_NO_ICACHE, INSN_NOP)
305 89: ALTERNATIVE(88b, 89b, ALT_COND_NO_DCACHE, INSN_NOP)
548 ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
549 ALTERNATIVE(1b, 1b+4, ALT_COND_NO_SMP, INSN_PxTLB)
677 ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
743 ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
775 89: ALTERNATIVE(88b, 89b, ALT_COND_NO_DCACHE, INSN_NOP)
792 ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
[all …]
/linux/tools/arch/x86/lib/
H A Dmemset_64.S8 #include <asm/alternative.h>
23 * The FSRS alternative should be done inline (avoiding the call and
33 ALTERNATIVE "jmp memset_orig", "", X86_FEATURE_FSRS
/linux/arch/s390/kernel/vdso64/
H A Dvgetrandom-chacha.S5 #include <asm/alternative.h>
50 ALTERNATIVE __stringify(VL BEPERM,16,,%r1), "brcl 0,0", ALT_FACILITY(148)
133 ALTERNATIVE \
172 ALTERNATIVE "nopr", "br %r14", ALT_FACILITY(148)
/linux/tools/include/asm/
H A Dalternative.h7 .macro ALTERNATIVE oldinstr, newinstr, feature
15 #define ALTERNATIVE # macro

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