| /linux/drivers/gpu/drm/i915/ |
| H A D | Kconfig.profile | 49 This is adjustable via
64 This is adjustable via
83 This is adjustable via
102 This is adjustable via
120 This is adjustable via
136 This is adjustable via
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| /linux/drivers/clk/zynqmp/ |
| H A D | divider.c | 7 * Adjustable divider clock implementation
16 * DOC: basic adjustable divider clock that cannot gate
21 * rate - rate is adjustable. clk->rate = ceiling(parent->rate / divisor)
32 * struct zynqmp_clk_divider - adjustable divider clock
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| H A D | clk-mux-zynqmp.c | 13 * DOC: basic adjustable multiplexer clock that cannot gate
19 * parent - parent is adjustable through clk_set_parent
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| /linux/include/linux/ |
| H A D | clk-provider.h | 378 * @fixed_rate: non-adjustable clock rate
391 * @fixed_rate: non-adjustable clock rate
403 * @fixed_rate: non-adjustable clock rate
417 * @fixed_rate: non-adjustable clock rate
430 * @fixed_rate: non-adjustable clock rate
444 * @fixed_rate: non-adjustable clock rate
445 * @fixed_accuracy: non-adjustable clock accuracy
460 * @fixed_rate: non-adjustable clock rate
461 * @fixed_accuracy: non-adjustable clock accuracy
475 * @fixed_rate: non-adjustable clock rate
[all …]
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| /linux/drivers/clk/sunxi/ |
| H A D | clk-factors.c | 5 * Adjustable factor-based clock implementation
19 * DOC: basic adjustable factor-based clock
24 * rate - rate is adjustable.
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| /linux/Documentation/devicetree/bindings/regulator/ |
| H A D | richtek,rtq2208.yaml | 82 the range of the regulator's adjustable mode.
196 /* Adjustable LDO VOUT */
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| /linux/drivers/video/backlight/ |
| H A D | Kconfig | 249 If you have a LCD backlight adjustable by PWM, say Y to enable
458 If you have a LCD backlight adjustable by GPIO, say Y to enable
490 If you have a LCD backlight adjustable by LED class driver, say Y
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| /linux/drivers/net/wireless/marvell/mwifiex/ |
| H A D | ioctl.h | 398 #define MWIFIEX_MEF_MAX_BYTESEQ 6 /* non-adjustable */
446 #define MWIFIEX_COALESCE_MAX_BYTESEQ 4 /* non-adjustable */
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| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | realtek,rt1015.yaml | 22 this vlaue is adjustable depending on platform.
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| /linux/drivers/clk/ |
| H A D | clk-mux.c | 18 * DOC: basic adjustable multiplexer clock that cannot gate
24 * parent - parent is adjustable through clk_set_parent
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| H A D | clk-divider.c | 7 * Adjustable divider clock implementation
20 * DOC: basic adjustable divider clock that cannot gate
25 * rate - rate is adjustable. clk->rate = ceiling(parent->rate / divisor)
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| /linux/drivers/clk/at91/ |
| H A D | clk-audio-pll.c | 16 * rate - rate is adjustable.
22 * rate - rate is adjustable.
28 * rate - rate is adjustable.
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| /linux/Documentation/devicetree/bindings/iio/adc/ |
| H A D | richtek,rtq6056.yaml | 20 adjustable conversion time, and averaging function are also built in for
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| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | alphascale,acc.txt | 20 _SYS_ - adjustable clock source. Not all peripheral have _SYS_ clock provider.
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| /linux/Documentation/devicetree/bindings/clock/ti/ |
| H A D | composite.txt | 9 an adjustable clock rate divider, this behaves exactly as [3]
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| /linux/Documentation/input/ |
| H A D | ff.rst | 89 - FF_GAIN gain is adjustable
90 - FF_AUTOCENTER autocenter is adjustable
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| /linux/Documentation/virt/ |
| H A D | guest-halt-polling.rst | 24 Each vcpu has an adjustable guest_halt_poll_ns
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| /linux/Documentation/hwmon/ |
| H A D | adt7462.rst | 29 temperature sensors. Each PWM output is individually adjustable and
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| H A D | adt7470.rst | 29 temperature sensors. Each PWM output is individually adjustable and
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| /linux/drivers/scsi/ |
| H A D | 53c700.h | 200 __u32 dmode_extra; /* adjustable bus settings */
201 __u32 dcntl_extra; /* adjustable bus settings */
202 __u32 ctest7_extra; /* adjustable bus settings */
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| /linux/drivers/interconnect/imx/ |
| H A D | imx.h | 55 * struct imx_icc_node_adj - Describe a dynamic adjustable node
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| /linux/drivers/clk/sprd/ |
| H A D | pll.h | 40 * struct sprd_pll - definition of adjustable pll clock
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| /linux/Documentation/userspace-api/media/v4l/ |
| H A D | ext-ctrls-rf-tuner.rst | 20 tuners does not have much adjustable features.
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| /linux/drivers/clk/meson/ |
| H A D | clk-regmap.h | 60 * struct clk_regmap_div_data - regmap backed adjustable divider specific data
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| /linux/drivers/clk/mxs/ |
| H A D | clk-frac.c | 20 * The clock is an adjustable fractional divider with a busy bit to wait
|