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/linux/arch/riscv/lib/
H A Duaccess.S4 #include <asm/asm-extable.h>
7 #include <asm/alternative-macros.h>
58 * Save the terminal address which will be used to compute the number
65 * a0 - start of uncopied dst
66 * a1 - start of uncopied src
67 * a2 - size
68 * t0 - end of uncopied dst
76 li a3, 9*SZREG-1 /* size must >= (word_copy stride + SZREG-1) */
80 * Copy first bytes until dst is aligned to word boundary.
81 * a0 - start of dst
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/linux/arch/alpha/lib/
H A Dev6-memset.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-memset.S
8 * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com>
13 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
15 * E - either cluster
16 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
17 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
48 * undertake a major re-write to interleave the constant materialization
49 * with other parts of the fall-through code. This is important, even
58 addq $18,$16,$6 # E : max address to write to
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/linux/tools/testing/memblock/tests/
H A Dalloc_helpers_api.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * aligned address:
9 * | +-----------+ |
11 * +----------+-----------+---------+
14 * Aligned min_addr
16 * Expect to allocate a cleared region at the minimal memory address.
28 min_addr = memblock_end_of_DRAM() - SMP_CACHE_BYTES; in alloc_from_simple_generic_check()
35 ASSERT_EQ(rgn->size, size); in alloc_from_simple_generic_check()
36 ASSERT_EQ(rgn->base, min_addr); in alloc_from_simple_generic_check()
47 * A test that tries to allocate a memory region above a certain address.
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/linux/arch/xtensa/lib/
H A Dchecksum.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
29 * This function assumes 2- or 4-byte alignment. Other alignments will fail!
32 /* ONES_ADD converts twos-complement math to ones-complement. */
44 * is aligned on either a 2-byte or 4-byte boundary.
48 bnez a5, 8f /* branch if 2-byte aligned */
49 /* Fall-through on common case, 4-byte alignment */
51 srli a5, a3, 5 /* 32-byte chunks */
57 add a5, a5, a2 /* a5 = end of last 32-byte chunk */
81 extui a5, a3, 2, 3 /* remaining 4-byte chunks */
87 add a5, a5, a2 /* a5 = end of last 4-byte chunk */
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H A Dmemcopy.S2 * arch/xtensa/lib/hal/memcopy.S -- Core HAL library functions
9 * Copyright (C) 2002 - 2012 Tensilica Inc.
24 * 32-bit load and store instructions (as required for these
34 * If source is aligned,
39 * This code tries to use fall-through branches for the common
40 * case of aligned source and destination and multiple
44 * a0/ return address
71 add a7, a3, a4 # a7 = end address for source
89 .Ldst1mod2: # dst is only byte aligned
95 addi a4, a4, -1
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H A Dstrncpy_user.S8 * Returns: -EFAULT if exception before terminator, N if the entire
36 # a0/ return address
60 bbsi.l a3, 0, .Lsrc1mod2 # if only 8-bit aligned
61 bbsi.l a3, 1, .Lsrc2mod4 # if only 16-bit aligned
62 .Lsrcaligned: # return here when src is word-aligned
68 .Lsrc1mod2: # src address is odd
74 addi a4, a4, -1 # decrement len
76 bbci.l a3, 1, .Lsrcaligned # if src is now word-aligned
78 .Lsrc2mod4: # src address is 2 mod 4
80 /* 1-cycle interlock */
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H A Dusercopy.S8 * of the Xtensa link-time HAL, and those files may differ per
11 * could lose the special functionality for accessing user-space
30 * If the destination and source are both aligned,
33 * If destination is aligned and source unaligned,
37 * This code tries to use fall-through braches for the common
38 * case of aligned destinations (except for the branches to
42 * a0/ return address
75 .Ldstaligned: # return here from .Ldstunaligned when dst is aligned
78 movi a8, 3 # if source is also aligned,
89 .Ldst1mod2: # dst is only byte aligned
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/linux/arch/arm/mm/
H A Dtlb-v7.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/tlb-v7.S
5 * Copyright (C) 1997-2002 Russell King
15 #include <asm/asm-offsets.h>
18 #include "proc-macros.S"
20 .arch armv7-a
25 * Invalidate a range of TLB entries in the specified address space.
27 * - start - start address (may not be aligned)
28 * - end - end address (exclusive, may not be aligned)
29 * - vma - vm_area_struct describing address range
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H A Dtlb-v6.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/tlb-v6.S
5 * Copyright (C) 1997-2002 Russell King
13 #include <asm/asm-offsets.h>
17 #include "proc-macros.S"
26 * Invalidate a range of TLB entries in the specified address space.
28 * - start - start address (may not be aligned)
29 * - end - end address (exclusive, may not be aligned)
30 * - vma - vm_area_struct describing address range
33 * - the "Invalidate single entry" instruction will invalidate
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H A Dcache-v4wt.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/cache-v4wt.S
5 * Copyright (C) 1997-2002 Russell king
16 #include "proc-macros.S"
56 * Invalidate all cache entries in a particular address
80 * address space.
82 * - start - start address (inclusive, page aligned)
83 * - end - end address (exclusive, page aligned)
84 * - flags - vma_area_struct flags describing address space
104 * region described by start. If you have non-snooping
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H A Dtlb-v4.S1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1997-2002 Russell King
16 #include <asm/asm-offsets.h>
18 #include "proc-macros.S"
24 * Invalidate a range of TLB entries in the specified user address space.
26 * - start - range start address
27 * - end - range end address
28 * - mm - mm_struct describing address space
33 act_mm r3 @ get current->active_mm
50 * address range.
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/linux/sound/soc/fsl/
H A Dfsl_dma.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * mpc8610-pcm.h - ALSA PCM interface for the Freescale MPC8610 SoC
15 __be32 clndar; /* Current link descriptor address register */
17 __be32 sar; /* Source address register */
19 __be32 dar; /* Destination address register */
21 __be32 enlndar; /* Next link descriptor extended address reg */
22 __be32 nlndar; /* Next link descriptor address register */
25 __be32 clsdar; /* Current list descriptor address register */
26 __be32 enlsdar; /* Next list descriptor extended address reg */
27 __be32 nlsdar; /* Next list descriptor address register */
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/linux/Documentation/arch/sparc/oradax/
H A Ddax-hv-api.txt3 Publication date 2017-09-25 08:21
5 Extracted via "pdftotext -f 547 -l 572 -layout sun4v_20170925.pdf"
16 live-migration and other system management activities.
20 …high speed processoring of database-centric operations. The coprocessors may support one or more of
28 …e Completion Area and, unless execution order is specifically restricted through the use of serial-
45 …device node in the guest MD (Section 8.24.17, “Database Analytics Accelerators (DAX) virtual-device
51 36.1.1.1. "ORCL,sun4v-dax" Device Compatibility
54 • No-op/Sync
81 36.1.1.2. "ORCL,sun4v-dax-fc" Device Compatibility
82 … "ORCL,sun4v-dax-fc" is compatible with the "ORCL,sun4v-dax" interface, and includes additional CCB
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/linux/arch/s390/include/asm/
H A Dqdio.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 #include <asm/dma-types.h>
19 #define QDIO_MAX_BUFFERS_MASK (QDIO_MAX_BUFFERS_PER_Q - 1)
28 * struct qdesfmt0 - queue descriptor, format 0
29 * @sliba: absolute address of storage list information block
30 * @sla: absolute address of storage list
31 * @slsba: absolute address of storage list state block
52 * struct qdr - queue description record (QDR)
59 * @qiba: absolute address of queue information block
90 * struct qib - queue information block (QIB)
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/linux/tools/testing/selftests/mm/
H A Dmremap_test.c1 // SPDX-License-Identifier: GPL-2.0
51 _1KB = 1ULL << 10, /* 1KB -> not page aligned */
88 unsigned long mid = low + (high - low) / 2; in get_sqrt()
95 high = mid - 1; in get_sqrt()
112 -1, 0); in is_remap_region_valid()
154 * Using /proc/self/maps, assert that the specified address range is contained
167 while (getline(&line, &len, maps_fp) != -1) { in is_range_mapped()
168 if (sscanf(line, "%lx-%lx", &first_val, &second_val) != 2) { in is_range_mapped()
193 * Returns the start address of the mapping on success, else returns
216 -1, 0); in get_source_mapping()
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/linux/Documentation/core-api/
H A Dunaligned-memory-access.rst23 from an address that is not evenly divisible by N (i.e. addr % N != 0).
24 For example, reading 4 bytes of data from address 0x10004 is fine, but
25 reading 4 bytes of data from address 0x10005 would be an unaligned memory
32 which will compile to multiple-byte memory access instructions, namely when
40 When accessing N bytes of memory, the base memory address must be evenly
59 - Some architectures are able to perform unaligned memory accesses
61 - Some architectures raise processor exceptions when unaligned accesses
64 - Some architectures raise processor exceptions when unaligned accesses
67 - Some architectures are not capable of unaligned memory access, but will
94 starting at address 0x10000. With a basic level of understanding, it would
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/linux/include/uapi/linux/
H A Dvhost_types.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 /* Userspace interface for in-kernel virtio accelerators. */
26 int fd; /* Pass -1 to unbind from file. */
35 /* Whether log address is valid. If set enables logging. */
40 /* Used structure address. Must be 32 bit aligned */
42 /* Available structure address. Must be 16 bit aligned */
46 * address. Address must be 32 bit aligned. */
125 /* All region addresses and sizes must be 4K aligned. */
137 * Used by QEMU userspace to ensure a consistent vhost-scsi ABI.
139 * ABI Rev 0: July 2012 version starting point for v3.6-rc merge candidate +
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/linux/arch/mips/include/asm/
H A Dmaar.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
14 * platform_maar_init() - perform platform-level MAAR configuration
18 * MAAR pairs as required, from 0 up to the maximum of num_pairs-1, and returns
28 * write_maar_pair() - write to a pair of MAARs
30 * @lower: The lowest address that the MAAR pair will affect. Must be
31 * aligned to a 2^16 byte boundary.
32 * @upper: The highest address that the MAAR pair will affect. Must be
33 * aligned to one byte before a 2^16 byte boundary.
52 * Write the upper address & attributes (both MIPS_MAAR_VL and in write_maar_pair()
65 /* Write the lower address & attributes */ in write_maar_pair()
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/linux/arch/mips/include/asm/octeon/
H A Dcvmx-fau.h7 * Copyright (c) 2003-2008 Cavium Networks
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
119 * Builds a store I/O address for writing to the FAU
124 * - Step by 2 for 16 bit access.
125 * - Step by 4 for 32 bit access.
126 * - Step by 8 for 64 bit access.
127 * Returns Address to store for atomic update
137 * Builds a I/O address for accessing the FAU
141 * - 0 = Don't wait
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/linux/sound/pci/trident/
H A Dtrident_memory.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Trident 4DWave-NX memory page allocation (TLB area)
20 * aligned pages in others
23 (trident)->tlb.entries[page] = cpu_to_le32((addr) & ~(SNDRV_TRIDENT_PAGE_SIZE-1))
25 (dma_addr_t)le32_to_cpu((trident->tl
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/linux/Documentation/virt/kvm/devices/
H A Darm-vgic.rst1 .. SPDX-License-Identifier: GPL-2.0
9 - KVM_DEV_TYPE_ARM_VGIC_V2 ARM Generic Interrupt Controller v2.0
13 controller, requiring emulated user-space devices to inject interrupts to the
18 device and guest ITS devices, see arm-vgic-v3.txt. It is not possible to
26 KVM_VGIC_V2_ADDR_TYPE_DIST (rw, 64-bit)
27 Base address in the guest physical address space of the GIC distributor
29 This address needs to be 4K aligned and the region covers 4 KByte.
31 KVM_VGIC_V2_ADDR_TYPE_CPU (rw, 64-bit)
32 Base address in the guest physical address space of the GIC virtual cpu
34 This address needs to be 4K aligned and the region covers 8 KByte.
[all …]
/linux/drivers/net/ethernet/netronome/nfp/nfpcore/
H A Dnfp_mutex.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 /* Copyright (C) 2015-2018 Netronome Systems, Inc. */
18 unsigned long long address; member
51 nfp_cpp_mutex_validate(u16 interface, int *target, unsigned long long address) in nfp_cpp_mutex_validate() argument
56 return -EINVAL; in nfp_cpp_mutex_validate()
58 /* Address must be 64-bit aligned */ in nfp_cpp_mutex_validate()
59 if (address & 7) in nfp_cpp_mutex_validate()
60 return -EINVAL; in nfp_cpp_mutex_validate()
63 return -EINVAL; in nfp_cpp_mutex_validate()
69 * nfp_cpp_mutex_init() - Initialize a mutex location
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/linux/drivers/net/ethernet/xilinx/
H A Dxilinx_emaclite.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Copyright (c) 2007 - 2013 Xilinx, Inc.
32 #define XEL_MDIOADDR_OFFSET 0x07E4 /* MDIO Address Register */
46 /* MDIO Address Register Bit Masks */
47 #define XEL_MDIOADDR_REGADR_MASK 0x0000001F /* Register Address */
48 #define XEL_MDIOADDR_PHYADR_MASK 0x000003E0 /* PHY Address */
67 #define XEL_TSR_PROGRAM_MASK 0x00000002 /* Program the MAC address */
74 /* Define for programming the MAC address into the EmacLite */
105 * struct net_local - Our private per device data
111 * @base_addr: base address of the Emaclite device
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/linux/arch/sparc/lib/
H A DM7memset.S15 * Fast assembler language version of the following C-program for memset
16 * which represents the `standard' for the C-library.
25 * } while (--n != 0);
34 * For less than 32 bytes stores, align the address on 4 byte boundary.
35 * Then store as many 4-byte chunks, followed by trailing bytes.
37 * For sizes greater than 32 bytes, align the address on 8 byte boundary.
39 * store 8-bytes chunks to align the address on 64 byte boundary
42 * 64-byte cache line to zero which will also clear the
49 * In the main loop, continue pre-setting the first long
56 * store remaining data in 64-byte chunks until less than
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/linux/arch/parisc/lib/
H A Dlusercopy.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (C) 2000-2002 Hewlett-Packard (John Marvin)
6 * Copyright (C) 2000 Richard Hirst <rhirst with parisc-linux.org>
8 * Copyright (C) 2003 Randolph Chung <tausq with parisc-linux.org>
20 * the space id associated with the current users address space.
40 addib,<> -1,%r25,$lclu_loop
58 * - sr1 already contains space of source region
59 * - sr2 already contains space of destination region
62 * - number of bytes that could not be copied.
65 * This code is based on a C-implementation of a copy routine written by
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