| /freebsd/sys/arm/arm/ |
| H A D | blockio.S | 3 /*-
45 * Modified : 22/01/99 -- R.Earnshaw
53 * Read bytes from an I/O address into a block of memory
55 * r0 = address to read from (IO)
56 * r1 = address to write to (memory)
65 subs r2, r2, #4 /* r2 = length - 4 */
68 beq .Lrm1_main /* aligned destination */
106 * Write bytes to an I/O address from a block of memory
108 * r0 = address to write to (IO)
109 * r1 = address to read from (memory)
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| /freebsd/sys/contrib/edk2/Include/Library/ |
| H A D | BaseMemoryLib.h | 4 The Base Memory Library provides optimized implementations for common memory-based operations.
8 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
9 SPDX-License-Identifier: BSD-2-Clause-Patent
23 If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then ASSERT().
24 If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT().
46 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
64 Fills a target buffer with a 16-bit value, and returns the target buffer.
66 This function fills Length bytes of Buffer with the 16-bit value specified by
67 Value, and returns Buffer. Value is repeated every 16-bits in for Length
71 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/Targets/ |
| H A D | Sparc.cpp | 1 //===- Sparc.cpp ----------------------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
15 //===----------------------------------------------------------------------===//
35 if (Ty->isAnyComplexType()) { in classifyReturnType()
57 llvm::Value *Address) const override { in decodeReturnAddress()
59 if (isAggregateTypeForABI(CGF.CurFnInfo->getReturnType())) in decodeReturnAddress()
63 return CGF.Builder.CreateGEP(CGF.Int8Ty, Address, in decodeReturnAddress()
68 llvm::Value *Address) const override { in encodeReturnAddress()
70 if (isAggregateTypeForABI(CGF.CurFnInfo->getReturnType())) in encodeReturnAddress()
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| /freebsd/contrib/llvm-project/lldb/include/lldb/Target/ |
| H A D | MemoryTagMap.h | 1 //===-- MemoryTagMap.h ------------------------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
13 #include "lldb/lldb-private.h"
28 /// Non-null pointer to a memory tag manager.
34 /// Start address of the range to insert tags for.
35 /// This address should be granule aligned and have had
36 /// any non address bits removed.
51 /// The start of the range. This may include non address bits and
52 /// does not have to be granule aligned.
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| /freebsd/contrib/llvm-project/lldb/source/Plugins/ABI/X86/ |
| H A D | ABISysV_i386.h | 1 //===------------------- ABISysV_i386.h -------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
13 #include "lldb/lldb-private.h"
48 // The SysV i386 ABI requires that stack frames be 16 byte aligned.
50 // code, we've seen that the stack pointer is often not aligned properly
52 // early -- before the function which caused the trap.
54 // To work around this, we relax that alignment to be just word-size
55 // (4-bytes).
61 // 32 byte aligned. Decide what to do for 32 byte alignment checking
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| H A D | ABIMacOSX_i386.h | 1 //===-- ABIMacOSX_i386.h --------
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| H A D | ABISysV_x86_64.h | 1 //===-- ABISysV_x86_64.h ----------------------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
43 // The SysV x86_64 ABI requires that stack frames be 16 byte aligned.
45 // code, we've seen that the stack pointer is often not aligned properly
47 // early -- before the function which caused the trap.
49 // To work around this, we relax that alignment to be just word-size
50 // (8-bytes).
55 // Make sure the stack call frame addresses are 8 byte aligned in CallFrameAddressIsValid()
56 if (cfa & (8ull - 1ull)) in CallFrameAddressIsValid()
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| /freebsd/sys/contrib/dev/iwlwifi/ |
| H A D | iwl-fh.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2005-2014, 2018-2021, 2023-2024 Intel Corporation
4 * Copyright (C) 2015-2017 Intel Deutschland GmbH
12 #include "iwl-tran
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| /freebsd/stand/libsa/ |
| H A D | zalloc.c | 33 * LIB/MEMORY/ZALLOC.C - self contained low-overhead memory pool/allocation
44 * The system works best when allocating similarly-sized chunks of
55 * within the specified address range. If the segment could not be
56 * allocated, NULL is returned. WARNING! The address range will be
57 * aligned to an 8 or 16 byte boundry depending on the cpu so if you
58 * give an unaligned address range, unexpected results may occur.
73 * Objects in the pool must be aligned to at least the size of struct MemNode.
74 * They must also be aligned to MALLOCALIGN, which should normally be larger
77 typedef char assert_align[(sizeof(struct MemNode) <= MALLOCALIGN) ? 1 : -1];
82 * znalloc() - allocate memory (without zeroing) from pool. Call reclaim
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| /freebsd/contrib/tcpdump/ |
| H A D | CONTRIBUTING.md | 7 code execution etc) please send an e-mail to security@tcpdump.org, do not use
10 To report a non-security problem (failure to compile, incorrect output in the
15 libpcap. If it does (and it is not a security-related problem, otherwise see
17 [bug tracker](https://github.com/the-tcpdump-group/tcpdump/issues)
21 * tcpdump and libpcap version (`tcpdump --version`)
23 (`uname -a`, compiler name and version, CPU type etc.)
33 [subscribe to the mailing list](https://www.tcpdump.org/#mailing-lists)
42 2) [Fork](https://help.github.com/articles/fork-a-repo/) the Tcpdump
43 [repository](https://github.com/the-tcpdump-group/tcpdump).
53 git remote add upstream https://github.com/the-tcpdump-group/tcpdump
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| /freebsd/contrib/llvm-project/llvm/include/llvm/ExecutionEngine/JITLink/ |
| H A D | aarch64.h | 1 //=== aarch64.h - Generic JITLink aarch64 edge kinds, utilities -*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
24 /// Represents aarch64 fixups and other aarch64-specific edge kinds.
27 /// A plain 64-bit pointer value relocation.
30 /// Fixup <- Target + Addend : uint64
34 /// A plain 32-bit pointer value relocation.
37 /// Fixup <- Target + Addend : uint32
40 /// - The target must reside in the low 32-bits of the address space,
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| /freebsd/contrib/llvm-project/lldb/source/Plugins/Process/Utility/ |
| H A D | MemoryTagManagerAArch64MTE.cpp | 1 //===-- MemoryTagManagerAArch64MTE.cpp --------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
35 return RemoveTagBits(addr1) - RemoveTagBits(addr2); in AddressDiff()
59 new_start -= align_down_amount; in ExpandToGranule()
64 size_t align_up_amount = granule - (new_len % granule); in ExpandToGranule()
75 "End address (0x%" PRIx64 in MakeInvalidRangeErr()
76 ") must be greater than the start address (0x%" PRIx64 ")", in MakeInvalidRangeErr()
85 // We must remove tags here otherwise an address with a higher in MakeTaggedRange()
92 // we must use an untagged address. in MakeTaggedRange()
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| /freebsd/contrib/llvm-project/compiler-rt/lib/xray/ |
| H A D | xray_trampoline_arm.S | 9 @ Word-aligned function entry point
15 @ Assume that "q" part of the floating-point registers is not used
21 PUSH {r1-r3,lr}
22 @ Save floating-point parameters of the instrumented function
23 VPUSH {d0-d7}
24 MOVW r1, #:lower16:_ZN6__xray19XRayPatchedFunctionE - (. + 16)
25 MOVT r1, #:upper16:_ZN6__xray19XRayPatchedFunctionE - (. + 12)
27 @ Handler address is nullptr if handler is not set
36 @ Restore floating-point parameters of the instrumented function
37 VPOP {d0-d7}
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCBranchSelector.cpp | 1 //===-- PPCBranchSelector.cpp - Emit long conditional branches ------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
15 //===----------------------------------------------------------------------===//
31 #define DEBUG_TYPE "ppc-branch-select"
36 "Number of prefixed instructions that have been aligned");
50 // The first block number which has imprecise instruction address.
51 int FirstImpreciseBlock = -1;
73 INITIALIZE_PASS(PPCBSel, "ppc-branch-select", "PowerPC Branch Selector",
76 /// createPPCBranchSelectionPass - returns an instance of the Branch Selection
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| /freebsd/contrib/llvm-project/lldb/source/Breakpoint/ |
| H A D | WatchpointAlgorithms.cpp | 1 //===-- WatchpointAlgorithms.cpp ------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
37 // As a fallback, assume we can watch any power-of-2 in AtomizeWatchpointRequest()
38 // number of bytes up through the size of an address in the target. in AtomizeWatchpointRequest()
68 return 1ULL << (64 - llvm::countl_zero(input)); in bit_ceil()
72 /// into hardware watchpoints, for a target that can watch a power-of-2
73 /// region of memory (1, 2, 4, 8, etc), aligned to that same power-of-2
74 /// memory address.
76 /// If a user asks to watch 4 bytes at address 0x1002 (0x1002-0x1005
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| /freebsd/contrib/llvm-project/lldb/source/Plugins/ABI/PowerPC/ |
| H A D | ABISysV_ppc.h | 1 //===-- ABISysV_ppc.h ----------------------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
13 #include "lldb/lldb-private.h"
44 // The SysV ppc ABI requires that stack frames be 16 byte aligned.
46 // code, we've seen that the stack pointer is often not aligned properly
48 // early -- before the function which caused the trap.
50 // To work around this, we relax that alignment to be just word-size
51 // (8-bytes).
56 // Make sure the stack call frame addresses are 8 byte aligned in CallFrameAddressIsValid()
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| H A D | ABISysV_ppc64.h | 1 //===-- ABISysV_ppc64.h ----------------------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
13 #include "lldb/lldb-private.h"
44 // The SysV ppc64 ABI requires that stack frames be 16 byte aligned.
46 // code, we've seen that the stack pointer is often not aligned properly
48 // early -- before the function which caused the trap.
50 // To work around this, we relax that alignment to be just word-size
51 // (8-bytes).
56 // Make sure the stack call frame addresses are 8 byte aligned in CallFrameAddressIsValid()
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| /freebsd/lib/libsys/ |
| H A D | mmap.2 | 55 Any such extension beyond the end of the mapped object will be zero-filled.
85 is non-zero, it is used as a hint to the system.
86 (As a convenience to the system, the actual address of the region may differ
87 from the address supplied.)
90 is zero, an address will be selected by the system.
91 The actual starting address of the region is returned.
94 deletes any previous mapping in the allocated address range.
102 .Bl -tag -width PROT_WRITE -compact
139 .Bl -tag -width MAP_PREFAULT_READ
141 Request a region in the first 2GB of the current process's address space.
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| /freebsd/sys/riscv/riscv/ |
| H A D | copyinout.S | 1 /*-
2 * Copyright (c) 2015-2018 Ruslan Bukin <br@bsdpad.com>
8 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
54 * copycommon - common copy routine
56 * a0 - Source address
57 * a1 - Destination address
58 * a2 - Size of copy
61 la a6, copyio_fault /* Get the handler address */
66 blt a2, t2, 4f /* Byte-copy if len < XLEN_BYTES */
70 * If they are aligned with each other, we can do word copy.
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| /freebsd/sys/dev/qat/qat_api/common/include/ |
| H A D | lac_buffer_desc.h | 1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
36 * This function will also return the (aligned) physical address
41 * @param[out] pBufferListAlignedPhyAddr The pointer to the aligned physical
42 * address.
43 * @param[in] isPhysicalAddress Type of address
59 * This function will also return the (aligned) physical address
61 * Should be used for CHA-CHA-POLY and GCM algorithms.
65 * @param[out] pBufferListAlignedPhyAddr The pointer to the aligned physical
66 * address.
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| /freebsd/contrib/arm-optimized-routines/string/arm/ |
| H A D | memset.S | 2 * memset - fill memory with a constant
4 * Copyright (c) 2010-2021, Arm Limited.
5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
11 This memset routine is optimised on a Cortex-A9 and should work on
17 .arch armv7-a
19 @ 2011-08-30 david.gilbert@linaro.org
24 #define CHARTSTMASK(c) 1<<(31-(c*8))
30 @ ---------------------------------------------------------------------------
37 @ r0 = address
40 @ returns original address in r0
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| /freebsd/share/man/man9/ |
| H A D | contigmalloc.9 | 63 bytes of contiguous physical memory that is aligned to
73 address range of
75 bytes allocated from the kernel virtual address (KVA) map.
91 .Bl -tag -width indent
123 function returns a kernel virtual address if allocation succeeds,
128 .Bd -literal
134 Ask for 8192 bytes of zero-filled memory residing between physical
135 address 0 and 4194303 inclusive, aligned to a 32K boundary and not
136 crossing a 1M address boundary.
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| /freebsd/sys/dev/qat/qat_api/common/crypto/sym/include/ |
| H A D | lac_sym_hash_precomputes.h | 1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
94 * Must be allocated on an 8-byte aligned memory address.
99 /**< data to be hashed - block size of data for the algorithm */
118 * Must be allocated on an 8-byte aligned memory address.
140 * Must be allocated on an 8-byte aligned memory address.
147 /**< padding to align later structures on minimum 8-Byte address */
163 /**< ASSUMPTION: The above structures are 8 byte aligned if the overall
164 * struct is 8 byte aligned, as there are two 4 byte fields before this
|
| H A D | lac_session.h | 1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
27 * \ref cpaCySymSessionCtxGetSize(). Internally this memory is re-aligned on a
28 * 64 byte boundary for use by the QAT engine. The aligned pointer is saved in
29 * the first bytes (size of void *) of the session memory. This address
33 * <b>LAC Session Init</b>\n The session descriptor is re-aligned and
40 * The address for the session descriptor is got by dereferencing the first
49 * The address for the session descriptor is got by dereferencing the first
59 * - The perform funcion increments the reference count for the session.
60 * - The callback function decrements the reference count for the session.
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | ABIInfoImpl.h | 1 //===- ABIInfoImpl.h --------------------------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
17 /// DefaultABIInfo - The default implementation for ABI specific
19 /// self-consistent and sensible LLVM IR generation, but does not
32 RValue EmitVAArg(CodeGenFunction &CGF, Address VAListAddr, QualType Ty,
45 // other canonical coercions that return a coerced-type of larger size.
47 // Ty - The argument / return value type
48 // Context - The associated ASTContext
49 // LLVMContext - The associated LLVMContext
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