| /linux/drivers/media/usb/dvb-usb/ |
| H A D | vp702x.h | 21 * request: 0xB2; i: 0; v: 0; b[0] = 0, b[1] = subcmd, additional buffer
23 * request: 0xB3; i: 0; v: 0; b[0] = 0xB3, additional buffer */
26 /* additional in buffer:
31 /* additional in buffer:
36 /* additional out buffer:
39 * additional in buffer:
44 /* additional out buffer:
47 * additional in buffer:
53 /* additional in buffer:
58 /* additional in buffer:
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| /linux/security/integrity/evm/ |
| H A D | Kconfig | 28 additional info to the calculation, requires existing EVM
32 bool "Additional SMACK xattrs"
36 Include additional SMACK xattrs for HMAC calculation.
45 additional info to the calculation, requires existing EVM
49 bool "Add additional EVM extended attributes at runtime"
53 Allow userland to provide additional xattrs for HMAC calculation.
55 When this option is enabled, root can add additional xattrs to the
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| /linux/drivers/gpu/drm/xe/regs/ |
| H A D | xe_reg_defs.h | 95 * @...: Additional options like access mode. See struct xe_reg for available
98 * Register field is mandatory, and additional options may be passed as
107 * XE_REG - Create a struct xe_reg from offset and additional flags
109 * @...: Additional options like access mode. See struct xe_reg for available
115 * XE_REG_EXT - Create a struct xe_reg from extension offset and additional
118 * @...: Additional options like access mode. See struct xe_reg for available
125 * XE_REG_MCR - Create a struct xe_reg_mcr from offset and additional flags
127 * @...: Additional options like access mode. See struct xe_reg for available
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| /linux/drivers/usb/storage/ |
| H A D | Kconfig | 37 Say Y here to include additional code to support the power-saving function
83 Say Y here to include additional code to support storage devices
105 Say Y here to include additional code to support the Sandisk SDDR-09
114 Say Y here to include additional code to support the Sandisk SDDR-55
122 Say Y here to include additional code to support the Lexar Jumpshot
130 Say Y here to include additional code to support the Olympus MAUSB-10
142 Say Y here to include additional code to support the Maxtor OneTouch
155 Say Y here to include additional code to support the Rio Karma
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| /linux/fs/ubifs/ |
| H A D | debug.h | 172 /* Additional journal messages */
176 /* Additional TNC messages */
180 /* Additional lprops messages */
182 /* Additional LEB find messages */
184 /* Additional mount messages */
188 /* Additional I/O messages */
190 /* Additional commit messages */
192 /* Additional budgeting messages */
194 /* Additional log messages */
196 /* Additional gc messages */
[all …]
|
| /linux/drivers/gpu/drm/i915/ |
| H A D | Kconfig.debug | 37 bool "Enable additional driver debugging"
118 Enable additional logging that may help track down the cause of
131 Enable additional and verbose debugging output that will spam
145 Enable additional and verbose debugging output that will spam
154 bool "Enable additional driver debugging for fence objects"
167 bool "Enable additional driver debugging for detecting dependency cycles"
179 bool "Enable additional driver debugging for GuC"
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| /linux/include/sound/ |
| H A D | wm8960.h | 23 * hp_cfg[0]: HPSEL[1:0] of R48 (Additional Control 4)
24 * hp_cfg[1]: {HPSWEN:HPSWPOL} of R24 (Additional Control 2).
25 * hp_cfg[2]: {TOCLKSEL:TOEN} of R23 (Additional Control 1).
33 * gpio_cfg[1]: {GPIOPOL:GPIOSEL[2:0]} of R48 (Additional Control 4).
|
| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | wlf,wm8960.yaml | 56 - gpio-cfg[1]: {GPIOPOL:GPIOSEL[2:0]} of R48 (Additional Control 4).
63 - hp-cfg[0]: HPSEL[1:0] of R48 (Additional Control 4).
64 - hp-cfg[1]: {HPSWEN:HPSWPOL} of R24 (Additional Control 2).
65 - hp-cfg[2]: {TOCLKSEL:TOEN} of R23 (Additional Control 1).
70 If present, the LRCM bit of R24 (Additional control 2) gets set,
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| /linux/include/crypto/ |
| H A D | drbg.h | 61 * buffers around or allocate additional memory, the following data structure
176 /* SP800-90A requires 2**35 bytes additional info str / pers str */ in drbg_max_addtl()
197 * crypto_rng_generate() to allow the caller to provide additional data.
202 * @addtl_input additional information string input buffer
203 * @addtllen length of additional information string buffer
220 * crypto_rng_generate() to allow the caller to provide additional data and
226 * @addtl_input additional information string input buffer
227 * @addtllen length of additional information string buffer
252 * @perslen length of additional information string buffer
|
| /linux/tools/perf/pmu-events/arch/x86/amdzen4/ |
| H A D | cache.json | 448 …d by the L2 pipeline which hit in the L2 cache of type L2Stream (fetch additional sequential lines…
466 …pipeline which hit in the L2 cache of type L2Burst (aggressively fetch additional sequential lines…
472 …d by the L2 pipeline which hit in the L2 cache of type L2Stride (fetch additional lines into L2 ca…
478 …d by the L2 pipeline which hit in the L2 cache of type L1Stream (fetch additional sequential lines…
484 …d by the L2 pipeline which hit in the L2 cache of type L1Stride (fetch additional lines into L1 ca…
490 …d by the L2 pipeline which hit in the L2 cache of type L1Region (fetch additional lines into L1 ca…
502 …hich miss the L2 cache and hit in the L3 cache of type L2Stream (fetch additional sequential lines…
520 …e L2 cache and hit in the L3 cache of type L2Burst (aggressively fetch additional sequential lines…
526 …hich miss the L2 cache and hit in the L3 cache of type L2Stride (fetch additional lines into L2 ca…
532 …hich miss the L2 cache and hit in the L3 cache of type L1Stream (fetch additional sequential lines…
[all …]
|
| /linux/arch/x86/include/asm/uv/ |
| H A D | uv_geo.h | 27 /* Additional fields for particular types of hardware */
29 struct geo_common_s common; /* No additional fields needed */
33 struct geo_common_s common; /* No additional fields needed */
37 struct geo_common_s common; /* No additional fields needed */
|
| /linux/include/scsi/fc/ |
| H A D | fc_fcp.h | 42 __u8 fc_flags; /* additional len & flags */
54 __u8 fc_flags; /* additional len & flags */
60 #define FCP_CMND32_ADD_LEN (16 / 4) /* Additional cdb length */
85 * Bits 7:2 are the additional FCP_CDB length / 4.
87 #define FCP_CFL_LEN_MASK 0xfc /* mask for additional length */
88 #define FCP_CFL_LEN_SHIFT 2 /* shift bits for additional length */
|
| /linux/drivers/acpi/acpica/ |
| H A D | exresnte.c | 114 /* Return an additional reference to the object */ in acpi_ex_resolve_node_to_value()
132 /* Return an additional reference to the object */ in acpi_ex_resolve_node_to_value()
147 /* Return an additional reference to the object */ in acpi_ex_resolve_node_to_value()
161 /* Return an additional reference to the object */ in acpi_ex_resolve_node_to_value()
189 /* Return an additional reference to the object */ in acpi_ex_resolve_node_to_value()
211 /* Return an additional reference to the object */ in acpi_ex_resolve_node_to_value()
|
| H A D | utxferror.c | 27 * format - Printf format string + additional args
59 * format - Printf format string + additional args in ACPI_EXPORT_SYMBOL()
101 * format - Printf format string + additional args in ACPI_EXPORT_SYMBOL()
130 * PARAMETERS: format - Printf format string + additional args in ACPI_EXPORT_SYMBOL()
161 * format - Printf format string + additional args in ACPI_EXPORT_SYMBOL()
195 * format - Printf format string + additional args in ACPI_EXPORT_SYMBOL()
238 * format - Printf format string + additional args in ACPI_EXPORT_SYMBOL()
|
| /linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/ |
| H A D | memory.json | 24 "PublicDescription": "Counts the number of memory read and write accesses in a cycle that incurred additional latency, due to the alignment of the address and the size of data being accessed, which results in store crossing a single cache line."
28 "PublicDescription": "Counts the number of memory read accesses in a cycle that incurred additional latency, due to the alignment of the address and size of data being accessed, which results in load crossing a single cache line."
32 "PublicDescription": "Counts the number of memory write access in a cycle that incurred additional latency, due to the alignment of the address and size of data being accessed incurred additional latency."
|
| /linux/tools/perf/pmu-events/arch/powerpc/power10/ |
| H A D | others.json | 45 …port that are either unaligned, or treated as unaligned and require an additional recycle through …
50 …port that are either unaligned, or treated as unaligned and require an additional recycle through …
55 …port that are either unaligned, or treated as unaligned and require an additional recycle through …
60 …port that are either unaligned, or treated as unaligned and require an additional recycle through …
|
| /linux/arch/hexagon/kernel/ |
| H A D | hexagon_ksyms.c | 13 /* Additional functions */
24 /* Additional variables */
34 /* Additional functions */
|
| /linux/tools/perf/pmu-events/arch/x86/jaketown/ |
| H A D | uncore-interconnect.json | 532 …additional ECC data). In half-width (L0p) mode, the fits are only 10 bits, and therefore it take…
542 …additional ECC data). In half-width (L0p) mode, the fits are only 10 bits, and therefore it take…
552 …additional ECC data). In half-width (L0p) mode, the fits are only 10 bits, and therefore it take…
562 …additional ECC data). In half-width (L0p) mode, the fits are only 10 bits, and therefore it take…
572 …additional ECC data). In half-width (L0p) mode, the fits are only 10 bits, and therefore it take…
582 …additional ECC data). In half-width (L0p) mode, the fits are only 10 bits, and therefore it take…
592 …additional ECC data). In half-width (L0p) mode, the fits are only 10 bits, and therefore it take…
602 …additional ECC data). In half-width (L0p) mode, the fits are only 10 bits, and therefore it take…
612 …additional ECC data). In half-width (L0p) mode, the fits are only 10 bits, and therefore it take…
622 …additional ECC data). In half-width (L0p) mode, the fits are only 10 bits, and therefore it take…
[all …]
|
| /linux/Documentation/admin-guide/cifs/ |
| H A D | todo.rst | 33 e) Additional use cases can be optimized to use "compounding" (e.g.
94 v) Additional testing of POSIX Extensions for SMB3.1.1
98 x) Support for additional authentication options (e.g. IAKERB, peer-to-peer
119 3) Additional performance testing and optimization using iozone and similar -
127 against Windows, Samba and Azure currently - to add additional tests and
|
| /linux/tools/scripts/ |
| H A D | Makefile.arch | 16 # Additional ARCH settings for x86
24 # Additional ARCH settings for sparc
32 # Additional ARCH settings for loongarch
|
| /linux/Documentation/ABI/testing/ |
| H A D | evm | 102 validate the EVM signature, and allows additional attributes
104 additional attributes are added (and on files possessing those
105 additional attributes) will only be valid if the same
106 additional attributes are configured on system boot. Writing
|
| /linux/fs/vboxsf/ |
| H A D | shfl_hostintf.h | 139 /** The available additional information in a shfl_fsobjattr object. */
141 /** No additional information is available / requested. */
144 * The additional unix attributes (shfl_fsobjattr::u::unix_attr) are
149 * The additional extended attribute size (shfl_fsobjattr::u::size) is
165 * Additional unix Attributes, these are available when
166 * shfl_fsobjattr.additional == SHFLFSOBJATTRADD_UNIX.
233 /** The additional attributes available. */
234 enum shfl_fsobjattr_add additional; member
237 * Additional attributes.
239 * Unless explicitly specified to an API, the API can provide additional
[all …]
|
| /linux/drivers/net/ethernet/broadcom/bnx2x/ |
| H A D | bnx2x_mfw_req.h | 75 u8 mac_add1[8]; /* Additional Programmed MAC Addr 1. */
76 u8 mac_add2[8]; /* Additional Programmed MAC Addr 2. */
112 u8 mac_add1[8]; /* Additional Programmed MAC Addr 1. */
113 u8 mac_add2[8]; /* Additional Programmed MAC Addr 2. */
136 u8 mac_add1[8]; /* Additional Programmed MAC Addr 1. */
|
| /linux/drivers/gpu/drm/xe/ |
| H A D | xe_assert.h | 25 * performance as this additional code will be always present.
27 * To allow annotate functions with additional detailed debug checks to assert
99 * xe_assert() uses &drm_WARN to emit a warning and print additional information
133 * xe_tile_assert() uses &drm_WARN to emit a warning and print additional
157 * xe_gt_assert() uses &drm_WARN to emit a warning and print additional
|
| /linux/tools/perf/pmu-events/arch/arm64/ |
| H A D | common-and-microarch.json | 309 "PublicDescription": "Level 1 data cache long-latency read miss. The counter counts each memory read access counted by L1D_CACHE that incurs additional latency because it returns data from outside the Level 1 data or unified cache of this processing element.",
387 "PublicDescription": "Level 1 instruction cache long-latency read miss. If the L1I_CACHE_RD event is implemented, the counter counts each access counted by L1I_CACHE_RD that incurs additional latency because it returns instructions from outside of the Level 1 instruction cache of this PE. If the L1I_CACHE_RD event is not implemented, the counter counts each access counted by L1I_CACHE that incurs additional latency because it returns instructions from outside the Level 1 instruction cache of this PE. The event indicates to software that the access missed in the Level 1 instruction cache and might have a significant performance impact due to the additional latency, compared to the latency of an access that hits in the Level 1 instruction cache.",
393 "PublicDescription": "Level 2 data cache long-latency read miss. The counter counts each memory read access counted by L2D_CACHE that incurs additional latency because it returns data from outside the Level 2 data or unified cache of this processing element. The event indicates to software that the access missed in the Level 2 data or unified cache and might have a significant performance impact compared to the latency of an access that hits in the Level 2 data or unified cache.",
399 "PublicDescription": "Level 3 data cache long-latency read miss. The counter counts each memory read access counted by L3D_CACHE that incurs additional latency because it returns data from outside the Level 3 data or unified cache of this processing element. The event indicates to software that the access missed in the Level 3 data or unified cache and might have a significant performance impact compared to the latency of an access that hits in the Level 3 data or unified cache.",
477 "PublicDescription": "Access with additional latency from alignment",
480 "BriefDescription": "Access with additional latency from alignment"
483 "PublicDescription": "Load with additional latency from alignment",
486 "BriefDescription": "Load with additional latenc
[all...] |