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/linux/drivers/comedi/drivers/
H A Dpcmuio.c20 * (in the 96-DIO version) WS16C48 ASIC HighDensity I/O Chips (HDIO). This
37 * 96 channel version) or just 1 ASIC (for 48-channel version). Then, use
56 * subdev 0, channels 0-24 (first 24 channels of 1st ASIC)
57 * subdev 2, channels 0-24 (first 24 channels of 2nd ASIC)
61 * [1] - IRQ (for first ASIC, or first 24 channels)
62 * [2] - IRQ (for second ASIC, pcmuio96 only - IRQ for chans 48-72
129 int asic) in pcmuio_asic_iobase() argument
131 return dev->iobase + (asic * PCMUIO_ASIC_IOSIZE); in pcmuio_asic_iobase()
137 * subdevice 0 and 1 are handled by the first asic in pcmuio_subdevice_to_asic()
138 * subdevice 2 and 3 are handled by the second asic in pcmuio_subdevice_to_asic()
[all …]
/linux/drivers/infiniband/hw/hfi1/
H A Dchip_registers.h11 #define ASIC (CORE + 0x000000400000) macro
372 #define ASIC_CFG_DRV_STR (ASIC + 0x000000000048)
373 #define ASIC_CFG_MUTEX (ASIC + 0x000000000040)
374 #define ASIC_CFG_SBUS_EXECUTE (ASIC + 0x000000000008)
377 #define ASIC_CFG_SBUS_REQUEST (ASIC + 0x000000000000)
382 #define ASIC_CFG_SCRATCH (ASIC + 0x000000000020)
386 #define ASIC_CFG_THERM_POLL_EN (ASIC + 0x000000000050)
387 #define ASIC_EEP_ADDR_CMD (ASIC + 0x000000000308)
389 #define ASIC_EEP_CTL_STAT (ASIC + 0x000000000300)
393 #define ASIC_EEP_DATA (ASIC + 0x000000000310)
[all …]
/linux/drivers/media/usb/gspca/stv06xx/
H A Dstv06xx.h8 * P/N 861037: Sensor HDCS1000 ASIC STV0600
9 * P/N 861050-0010: Sensor HDCS1000 ASIC STV0600
10 * P/N 861050-0020: Sensor Photobit PB100 ASIC STV0600-1 - QuickCam Express
11 * P/N 861055: Sensor ST VV6410 ASIC STV0610 - LEGO cam
12 * P/N 861075-0040: Sensor HDCS1000 ASIC
13 * P/N 961179-0700: Sensor ST VV6410 ASIC STV0602 - Dexxa WebCam USB
14 * P/N 861040-0000: Sensor ST VV6410 ASIC STV0610 - QuickCam Web
31 /* Control registers of the STV0600 ASIC */
H A Dstv06xx_sensor.h8 * P/N 861037: Sensor HDCS1000 ASIC STV0600
9 * P/N 861050-0010: Sensor HDCS1000 ASIC STV0600
10 * P/N 861050-0020: Sensor Photobit PB100 ASIC STV0600-1 - QuickCam Express
11 * P/N 861055: Sensor ST VV6410 ASIC STV0610 - LEGO cam
12 * P/N 861075-0040: Sensor HDCS1000 ASIC
13 * P/N 961179-0700: Sensor ST VV6410 ASIC STV0602 - Dexxa WebCam USB
14 * P/N 861040-0000: Sensor ST VV6410 ASIC STV0610 - QuickCam Web
H A Dstv06xx_pb0100.h8 * P/N 861037: Sensor HDCS1000 ASIC STV0600
9 * P/N 861050-0010: Sensor HDCS1000 ASIC STV0600
10 * P/N 861050-0020: Sensor Photobit PB100 ASIC STV0600-1 - QuickCam Express
11 * P/N 861055: Sensor ST VV6410 ASIC STV0610 - LEGO cam
12 * P/N 861075-0040: Sensor HDCS1000 ASIC
13 * P/N 961179-0700: Sensor ST VV6410 ASIC STV0602 - Dexxa WebCam USB
14 * P/N 861040-0000: Sensor ST VV6410 ASIC STV0610 - QuickCam Web
H A Dstv06xx_hdcs.h9 * P/N 861037: Sensor HDCS1000 ASIC STV0600
10 * P/N 861050-0010: Sensor HDCS1000 ASIC STV0600
11 * P/N 861050-0020: Sensor Photobit PB100 ASIC STV0600-1 - QuickCam Express
12 * P/N 861055: Sensor ST VV6410 ASIC STV0610 - LEGO cam
13 * P/N 861075-0040: Sensor HDCS1000 ASIC
14 * P/N 961179-0700: Sensor ST VV6410 ASIC STV0602 - Dexxa WebCam USB
15 * P/N 861040-0000: Sensor ST VV6410 ASIC STV0610 - QuickCam Web
H A Dstv06xx_vv6410.c8 * P/N 861037: Sensor HDCS1000 ASIC STV0600
9 * P/N 861050-0010: Sensor HDCS1000 ASIC STV0600
10 * P/N 861050-0020: Sensor Photobit PB100 ASIC STV0600-1 - QuickCam Express
11 * P/N 861055: Sensor ST VV6410 ASIC STV0610 - LEGO cam
12 * P/N 861075-0040: Sensor HDCS1000 ASIC
13 * P/N 961179-0700: Sensor ST VV6410 ASIC STV0602 - Dexxa WebCam USB
14 * P/N 861040-0000: Sensor ST VV6410 ASIC STV0610 - QuickCam Web
H A Dstv06xx_vv6410.h8 * P/N 861037: Sensor HDCS1000 ASIC STV0600
9 * P/N 861050-0010: Sensor HDCS1000 ASIC STV0600
10 * P/N 861050-0020: Sensor Photobit PB100 ASIC STV0600-1 - QuickCam Express
11 * P/N 861055: Sensor ST VV6410 ASIC STV0610 - LEGO cam
12 * P/N 861075-0040: Sensor HDCS1000 ASIC
13 * P/N 961179-0700: Sensor ST VV6410 ASIC STV0602 - Dexxa WebCam USB
14 * P/N 861040-0000: Sensor ST VV6410 ASIC STV0610 - QuickCam Web
/linux/arch/mips/dec/
H A Dsetup.c78 * MEMORY CPU CPU CPU ASIC CPU CPU
79 * RTC CPU CPU CPU ASIC CPU CPU
80 * DMA - - - ASIC ASIC ASIC
81 * SERIAL0 CPU CPU CSR ASIC ASIC ASIC
82 * SERIAL1 - - - ASIC - ASIC
83 * SCSI CPU CPU CSR ASIC ASIC ASIC
84 * ETHERNET CPU * CSR ASIC ASIC ASIC
85 * other - - - ASIC - -
86 * TC2 - - CSR CPU ASIC ASIC
87 * TC1 - - CSR CPU ASIC ASIC
[all …]
H A Dioasic-irq.c3 * DEC I/O ASIC interrupts.
43 .name = "IO-ASIC",
60 .name = "IO-ASIC-DMA",
68 * I/O ASIC implements two kinds of DMA interrupts, informational and
82 * ASIC is cascaded to, are level-triggered it is recommended that error
H A Dint-handler.S91 * 5 TurboChannel Slot 3 (ASIC)
104 * 5 TurboChannel (ASIC)
114 * 2 System Board (ASIC)
249 FEXPORT(asic_all_int) # various I/O ASIC junk
258 FEXPORT(asic_dma_int) # I/O ASIC DMA events
311 ASM_PANIC("Unimplemented asic interrupt! ASIC ISR: 0x%08x");
/linux/Documentation/networking/devlink/
H A Dionic.rst24 * - ``asic.id``
26 - The ASIC type for this device
27 * - ``asic.rev``
29 - The revision of the ASIC for this device
H A Dbnxt.rst61 * - ``asic.id``
63 - ASIC design identifier
64 * - ``asic.rev``
66 - ASIC design revision
H A Ddevlink-dpipe.rst17 API (DPIPE) is aimed at providing the user visibility into the ASIC's
27 control path of the whole networking stack to a switch ASIC. Due to
78 ASIC. Thus it is tied to the top of the ``devlink`` infrastructure.
111 and specific ASIC metadata. The protocol headers should be declared in the
112 ``devlink`` core API. On the other hand ASIC meta data is driver specific
117 In order to provide further visibility some ASIC metadata fields could be
162 Mellanox Spectrum ASIC. The blocks are described in the order they appear in
/linux/arch/mips/sni/
H A Dpcimt.c56 unsigned int asic; in sni_pcimt_detect() local
64 asic = csmsr & 0x80; in sni_pcimt_detect()
65 asic = (csmsr & 0x08) ? asic : !asic; in sni_pcimt_detect()
66 p += sprintf(p, ", ASIC PCI Rev %s", asic ? "1.0" : "1.1"); in sni_pcimt_detect()
220 * hwint0 should deal with MP agent, ASIC PCI, EISA NMI and debug
241 * Note: ASIC PCI's builtin interrupt acknowledge feature is in pcimt_hwint1()
/linux/Documentation/ABI/testing/
H A Dsysfs-driver-habanalabs25 only for the Gaudi ASIC family
32 This property is valid only for the Gaudi ASIC family
99 This property is valid only for the Goya ASIC family
111 Goya ASIC family
118 fabric. This property is valid only for the Goya ASIC family
143 Goya ASIC family
150 engine. This property is valid only for the Goya ASIC family
183 the Goya ASIC family
246 Goya ASIC family
253 engines. This property is valid only for the Goya ASIC family
/linux/arch/mips/include/asm/dec/
H A Dkn05.h7 * KN04-CA) and DECsystem 5900/260 (KN05) R4k CPU card MB ASIC
23 * The oncard MB (Memory Buffer) ASIC provides an additional address
25 * passed to the I/O ASIC's decoder like with the KN03 or KN02-BA/CA.
31 #define KN4K_IOCTL (1*IOASIC_SLOT_SIZE) /* I/O ASIC */
48 * MB ASIC interrupt bits.
54 #define KN4K_MB_INR_TC 0 /* I/O ASIC cascade */
H A Dioasic_ints.h6 * Definitions for the interrupt related bits in the I/O ASIC
23 * The upper 16 bits are a part of the I/O ASIC's internal DMA engine
24 * and thus are common to all I/O ASIC machines. The exception is
66 #define IO_IRQ_BASE 8 /* first IRQ assigned to I/O ASIC */
67 #define IO_IRQ_LINES 32 /* number of I/O ASIC interrupts */
H A Dioasic_addrs.h6 * Definitions for the address map in the JUNKIO Asic
24 * Address ranges decoded by the I/O ASIC for onboard devices.
27 #define IOASIC_IOCTL (1*IOASIC_SLOT_SIZE) /* I/O ASIC */
48 * Offsets for I/O ASIC registers
109 * I/O ASIC's internal DMA engine and thus are common to all I/O ASIC
/linux/Documentation/networking/device_drivers/ethernet/amd/
H A Dpds_core.rst37 asic.id 0x0
38 asic.rev 0x0
69 * - ``asic.id``
71 - The ASIC type for this device
72 * - ``asic.rev``
74 - The revision of the ASIC for this device
/linux/drivers/gpu/drm/radeon/
H A Dradeon_asic.c166 rdev->asic->gart.tlb_flush = &rv370_pcie_gart_tlb_flush; in radeon_agp_disable()
167 rdev->asic->gart.get_page_entry = &rv370_pcie_gart_get_page_entry; in radeon_agp_disable()
168 rdev->asic->gart.set_page = &rv370_pcie_gart_set_page; in radeon_agp_disable()
172 rdev->asic->gart.tlb_flush = &r100_pci_gart_tlb_flush; in radeon_agp_disable()
173 rdev->asic->gart.get_page_entry = &r100_pci_gart_get_page_entry; in radeon_agp_disable()
174 rdev->asic->gart.set_page = &r100_pci_gart_set_page; in radeon_agp_disable()
180 * ASIC
2309 * radeon_asic_init - register asic specific callbacks
2313 * Registers the appropriate asic specific callbacks for each
2337 rdev->asic = &r100_asic; in radeon_asic_init()
[all …]
/linux/drivers/atm/
H A Dtonga.h15 #define SEPROM_MAGIC 0x0c /* obscure required pattern (ASIC only) */
16 #define SEPROM_DATA 0x02 /* serial EEPROM data (ASIC only) */
17 #define SEPROM_CLK 0x01 /* serial EEPROM clock (ASIC only) */
/linux/arch/mips/kernel/
H A Dcsrc-ioasic.c3 * DEC I/O ASIC's counter clocksource
53 /* An early revision of the I/O ASIC didn't have the counter. */ in dec_ioasic_clocksource_init()
57 printk(KERN_INFO "I/O ASIC clock frequency %dHz\n", freq); in dec_ioasic_clocksource_init()
/linux/Documentation/ABI/stable/
H A Dsysfs-driver-mlxreg-io5 Description: This file shows ASIC health status. The possible values are:
6 0 - health failed, 2 - health OK, 3 - ASIC in booting state.
94 auxiliary outage or power refresh, ASIC thermal shutdown, halt,
140 Factor mezzanine, reset requested from ASIC, reset caused by BIOS
177 Description: This file allows to retain ASIC up during PCIe root complex
297 Description: These files clear line card reset bit enforced by ASIC, when it
298 sets it due to some abnormal ASIC behavior.
352 Description: This file allows to unlock ASIC after thermal shutdown event.
353 When system thermal shutdown is enforced by ASIC, ASIC is
362 ASIC from locking - is full system power cycle through the
[all …]
/linux/drivers/parisc/
H A Dgsc.c169 .name = "GSC-ASIC",
190 void gsc_asic_assign_irq(struct gsc_asic *asic, int local_irq, int *irqp) in gsc_asic_assign_irq() argument
192 int irq = asic->global_irq[local_irq]; in gsc_asic_assign_irq()
195 irq = gsc_assign_irq(&gsc_asic_interrupt_type, asic); in gsc_asic_assign_irq()
199 asic->global_irq[local_irq] = irq; in gsc_asic_assign_irq()

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