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/freebsd/sys/contrib/device-tree/Bindings/arm/cirrus/
H A Dcirrus,ep9301.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The EP93xx SoC is a ARMv4T-based with 200 MHz ARM9 CPU.
13 - Alexander Sverdlin <alexander.sverdlin@gmail.com>
14 - Nikita Shubin <nikita.shubin@maquefel.me>
21 - description: The TS-7250 is a compact, full-featured Single Board
22 Computer (SBC) based upon the Cirrus EP9302 ARM9 CPU
24 - const: technologic,ts7250
25 - const: cirrus,ep9301
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/freebsd/contrib/llvm-project/clang/lib/Basic/Targets/
H A DARM.h1 //===--- ARM.h - Declare ARM target feature support -------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
60 llvm::ARM::ArchKind ArchKind = llvm::ARM::ArchKind::ARMV4T;
102 LDREX_B = (1 << 0), /// byte (8-bit)
103 LDREX_H = (1 << 1), /// half (16-bit)
104 LDREX_W = (1 << 2), /// word (32-bit)
105 LDREX_D = (1 << 3), /// double (64-bit)
112 HW_FP_HP = (1 << 1), /// half (16-bit)
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H A DARM.cpp1 //===--- ARM.cpp - Implement ARM target feature support -------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
47 ? "E-m:o-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64" in setABIAAPCS()
48 : "e-m:o-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64", in setABIAAPCS()
53 "-m:w" in setABIAAPCS()
54 "-p:32:32" in setABIAAPCS()
55 "-Fi8" in setABIAAPCS()
56 "-i64:64" in setABIAAPCS()
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/freebsd/contrib/llvm-project/llvm/lib/TargetParser/
H A DARMTargetParser.cpp1 //===-- ARMTargetParser - Parser for ARM target features --------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
46 case ArchKind::ARMV4T: in parseArchVersion()
130 case ARM::ArchKind::ARMV4T: in getProfileKind()
165 // We have to specify the + and - versions of the name in full so in getFPUFeatures()
172 {"+vfp2", "-vfp2", FPUVersion::VFPV2, FPURestriction::D16}, in getFPUFeatures()
173 {"+vfp2sp", "-vfp2sp", FPUVersion::VFPV2, FPURestriction::SP_D16}, in getFPUFeatures()
174 {"+vfp3", "-vfp3", FPUVersion::VFPV3, FPURestriction::None}, in getFPUFeatures()
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/freebsd/sys/arm/arm/
H A Dcpuinfo.c1 /*-
118 /* ARMv4T CPU */ in cpuinfo_init()
127 /* non ARM -> must be new id scheme */ in cpuinfo_init()
136 /* CP15 c0,c0 regs 0-7 exist on all CPUs (although aliased with MIDR) */ in cpuinfo_init()
161 /* Not yet - CBAR only exist on ARM SMP Cortex A CPUs in cpuinfo_init()
203 cpuinfo.dcache_line_mask = cpuinfo.dcache_line_size - 1; in cpuinfo_init()
204 cpuinfo.icache_line_mask = cpuinfo.icache_line_size - 1; in cpuinfo_init()
280 * Enable snoop-delayed exclusive handling in cpuinfo_get_actlr_modifier()
372 return (-1); in apply_bp_hardening()
392 * This means that full BP hardening depends on updated u-boot/firmware in handle_bp_hardening()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMSubtarget.h1 //===-- ARMSubtarget.h - Define Subtarget for the ARM ----------*- C++ -*--===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
75 /// is not 64-bit aligned.
90 /// ARMProcFamily - ARM processor family: Cortex-A8, Cortex-A9, and others.
93 /// ARMProcClass - ARM processor class: None, AClass, RClass or MClass.
96 /// ARMArch - ARM architecture
97 ARMArchEnum ARMArch = ARMv4t;
99 /// UseMulOps - True if non-microcoded fused integer multiply-add and
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H A DThumb1FrameLowering.cpp1 //===- Thumb1FrameLowering.cpp - Thumb1 Frame Information -----------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
59 if (CFSize >= ((1 << 8) - 1) * 4 / 2) // Half of imm8 * 4 in hasReservedCallFrame()
123 // ADJCALLSTACKDOWN -> sub, sp, sp, amount in eliminateCallFramePseudoInstr()
124 // ADJCALLSTACKUP -> add, sp, sp, amount in eliminateCallFramePseudoInstr()
137 emitCallSPUpdate(MBB, I, TII, dl, *RegInfo, -Amount); in eliminateCallFramePseudoInstr()
158 unsigned ArgRegsSaveSize = AFI->getArgRegsSaveSize(); in emitPrologue()
168 Register FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue()
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H A DARMInstrInfo.td1 //===- ARMInstrInfo.td - Target Description for ARM Target -*- tablegen -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 //===----------------------------------------------------------------------===//
27 def SDT_ARMcall : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
85 // SDTBinaryArithWithFlagsInOut - RES1, CPSR = op LHS, RHS, CPSR
257 // VDUPLANE can produce a quad-register result from a double-register source,
313 // reinterprets the _register_ format - and in big-endian, the memory and
318 // whereas 'bitconvert' will map it to the high byte in big-endian mode,
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/freebsd/contrib/llvm-project/clang/lib/Driver/ToolChains/
H A DDarwin.cpp1 //===--- Darwin.cpp - Darwin Tool and ToolChain Implementations -*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
43 // See arch(3) and llvm-gcc's driver-driver.c. We don't implement support for in getArchTypeForMachOArchName()
48 // historically the driver accepts this and also ties its -march= in getArchTypeForMachOArchName()
61 .Cases("arm", "armv4t", "armv5", "armv6", "armv6m", llvm::Triple::arm) in getArchTypeForMachOArchName()
86 // Don't reject these -version-min= if we have the appropriate triple. in setTripleTypeForMachOArchName()
89 A->ignoreTargetSpecific(); in setTripleTypeForMachOArchName()
92 A->ignoreTargetSpecific(); in setTripleTypeForMachOArchName()
95 A->ignoreTargetSpecific(); in setTripleTypeForMachOArchName()
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/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM/
H A DEmulateInstructionARM.cpp1 //===-- EmulateInstructionARM.cpp -----------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
234 // FPA Registers 0-7 in LLDB_PLUGIN_DEFINE_ADV()
260 // Intel wireless MMX general purpose registers 0 - 7 XScale accumulator in LLDB_PLUGIN_DEFINE_ADV()
261 // register 0 - 7 (they do overlap with wCGR0 - wCGR7) in LLDB_PLUGIN_DEFINE_ADV()
287 // Intel wireless MMX data registers 0 - 15 in LLDB_PLUGIN_DEFINE_ADV()
423 // Intel wireless MMX control register in co-processor 0 - 7 in LLDB_PLUGIN_DEFINE_ADV()
449 // VFP-v3/Neon in LLDB_PLUGIN_DEFINE_ADV()
547 // NEON 128-bit vector registers (overlays the d registers) in LLDB_PLUGIN_DEFINE_ADV()
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/freebsd/contrib/llvm-project/lld/ELF/
H A DThunks.cpp1 //===- Thunks.cpp --------------------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===---------------------------------------------------------------------===//
13 // such as MIPS PIC and non-PIC or ARM non-Thumb and Thumb functions.
19 // i386 and x86-64 don't need thunks.
21 //===---------------------------------------------------------------------===//
122 // Base class for Thumb-2 thunks.
124 // This class is similar to ARMThunk, but it uses the Thumb-2 B.W instruction
188 // Implementations of Thunks for Arm v6-M. Only Thumb instructions are permitted
225 // ARMV5LongLdrPcThunk can be used for both Arm->Arm and Arm->Thumb calls. v4
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/freebsd/contrib/llvm-project/llvm/lib/Object/
H A DMachOObjectFile.cpp1 //===- MachOObjectFile.cpp - Mach-O object file binding -------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
87 return malformedError("Structure read out-of-range"); in getStructOrErr()
195 if (CmdOrErr->cmdsize + Ptr > Obj.getData().end()) in getLoadCommandInfo()
198 if (CmdOrErr->cmdsize < 8) in getLoadCommandInfo()
245 // This is used to check for overlapping of Mach-O elements.
299 S.nsects * SectionSize > Load.C.cmdsize - SegmentLoadSize) in parseSegmentLoadCommand()
780 return malformedError("LC_ID_DYLIB load command in non-dynamic library " in checkDylibIdCommand()
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/freebsd/contrib/llvm-project/lld/ELF/Arch/
H A DARM.cpp1 //===- ARM.cpp ------------------------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
80 // Set the EF_ARM_BE8 flag in the ELF header, if ELF file is big-endian in calcEFlags()
81 // with BE-8 code. in calcEFlags()
84 if (config->armVFPArgs == ARMVFPArgKind::Base || in calcEFlags()
85 config->armVFPArgs == ARMVFPArgKind::Default) in calcEFlags()
87 else if (config->armVFPArgs == ARMVFPArgKind::VFP) in calcEFlags()
90 if (!config->isLE && config->armBe8) in calcEFlags()
125 // (S + A) - GOT_ORG in getRelExpr()
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