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/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dmediatek,apmixedsys.yaml4 $id: http://devicetree.org/schemas/clock/mediatek,apmixedsys.yaml#
14 The Mediatek apmixedsys controller provides PLLs to the system.
16 and <dt-bindings/clock/mediatek,mt*-apmixedsys.h>.
22 - mediatek,mt6797-apmixedsys
23 - mediatek,mt7622-apmixedsys
24 - mediatek,mt7981-apmixedsys
25 - mediatek,mt7986-apmixedsys
26 - mediatek,mt7988-apmixedsys
27 - mediatek,mt8135-apmixedsys
28 - mediatek,mt8173-apmixedsys
[all …]
H A Dmediatek,mt8195-sys-clock.yaml20 The apmixedsys provides most of PLLs which generated from SoC 26m.
30 - mediatek,mt8195-apmixedsys
65 apmixedsys: syscon@1000c000 {
66 compatible = "mediatek,mt8195-apmixedsys", "syscon";
H A Dmediatek,mt8192-sys-clock.yaml23 - mediatek,mt8192-apmixedsys
64 apmixedsys: syscon@1000c000 {
65 compatible = "mediatek,mt8192-apmixedsys", "syscon";
H A Dmediatek,mt8365-sys-clock.yaml13 The apmixedsys module provides most of PLLs which generated from SoC 26m.
23 - mediatek,mt8365-apmixedsys
H A Dmediatek,mt8186-sys-clock.yaml20 The apmixedsys provides most of PLLs which generated from SoC 26m.
33 - mediatek,mt8186-apmixedsys
H A Dmediatek,mt8188-sys-clock.yaml20 The apmixedsys provides most of PLLs which generated from SoC 26m.
30 - mediatek,mt8188-apmixedsys
/freebsd/sys/contrib/device-tree/Bindings/arm/mediatek/
H A Dmediatek,apmixedsys.txt1 Mediatek apmixedsys controller
4 The Mediatek apmixedsys controller provides the PLLs to the system.
9 - "mediatek,mt2701-apmixedsys"
10 - "mediatek,mt2712-apmixedsys", "syscon"
11 - "mediatek,mt6765-apmixedsys", "syscon"
12 - "mediatek,mt6779-apmixedsys", "syscon"
13 - "mediatek,mt6797-apmixedsys"
14 - "mediatek,mt7622-apmixedsys"
15 - "mediatek,mt7623-apmixedsys", "mediatek,mt2701-apmixedsys"
16 - "mediatek,mt7629-apmixedsys"
[all …]
H A Dmediatek,mt8195-sys-clock.yaml20 The apmixedsys provides most of PLLs which generated from SoC 26m.
30 - mediatek,mt8195-apmixedsys
65 apmixedsys: syscon@1000c000 {
66 compatible = "mediatek,mt8195-apmixedsys", "syscon";
H A Dmediatek,mt8192-sys-clock.yaml23 - mediatek,mt8192-apmixedsys
64 apmixedsys: syscon@1000c000 {
65 compatible = "mediatek,mt8192-apmixedsys", "syscon";
H A Dmediatek,mt8186-sys-clock.yaml20 The apmixedsys provides most of PLLs which generated from SoC 26m.
33 - mediatek,mt8186-apmixedsys
/freebsd/sys/contrib/device-tree/Bindings/thermal/
H A Dmediatek,thermal.yaml15 controls a mux in the apmixedsys register space via AHB bus accesses, so a
16 phandle to the APMIXEDSYS is also needed.
61 mediatek,apmixedsys:
63 description: A phandle to the APMIXEDSYS controller
84 - mediatek,apmixedsys
102 mediatek,apmixedsys = <&apmixedsys>;
H A Dmediatek-thermal.txt7 apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
28 - mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
49 mediatek,apmixedsys = <&apmixedsys>;
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dmt8186-afe-pcm.yaml32 mediatek,apmixedsys:
34 description: The phandle of the mediatek apmixedsys controller
105 - mediatek,apmixedsys
124 mediatek,apmixedsys = <&apmixedsys>;
133 <&apmixedsys 12>, //CLK_APMIXED_APLL1
135 <&apmixedsys 13>, //CLK_APMIXED_APLL2
H A Dmt8192-afe-pcm.yaml30 mediatek,apmixedsys:
32 description: The phandle of the mediatek apmixedsys controller
66 - mediatek,apmixedsys
88 mediatek,apmixedsys = <&apmixedsys>;
/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dmediatek,vcodec-decoder.yaml173 clocks = <&apmixedsys CLK_APMIXED_VCODECPLL>,
178 <&apmixedsys CLK_APMIXED_VENCPLL>,
192 <&apmixedsys CLK_APMIXED_VCODECPLL>,
193 <&apmixedsys CLK_APMIXED_VENCPLL>;
H A Dmediatek-vcodec.txt62 clocks = <&apmixedsys CLK_APMIXED_VCODECPLL>,
67 <&apmixedsys CLK_APMIXED_VENCPLL>,
81 <&apmixedsys CLK_APMIXED_VCODECPLL>,
82 <&apmixedsys CLK_APMIXED_VENCPLL>;
/freebsd/sys/contrib/device-tree/Bindings/cpufreq/
H A Dcpufreq-mediatek.txt71 <&apmixedsys CLK_APMIXED_MAINPLL>;
193 <&apmixedsys CLK_APMIXED_MAINPLL>;
205 <&apmixedsys CLK_APMIXED_MAINPLL>;
217 <&apmixedsys CLK_APMIXED_MAINPLL>;
229 <&apmixedsys CLK_APMIXED_MAINPLL>;
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt7986a.dtsi170 apmixedsys: apmixedsys@1001e000 { label
171 compatible = "mediatek,mt7986-apmixedsys";
243 assigned-clock-parents = <&apmixedsys CLK_APMIXED_NET2PLL>;
341 mediatek,apmixedsys = <&apmixedsys>;
383 assigned-clock-parents = <&apmixedsys CLK_APMIXED_MPLL>,
554 assigned-clock-parents = <&apmixedsys CLK_APMIXED_NET2PLL>,
555 <&apmixedsys CLK_APMIXED_SGMPLL>;
H A Dmt8173.dtsi160 <&apmixedsys CLK_APMIXED_MAINPLL>;
175 <&apmixedsys CLK_APMIXED_MAINPLL>;
190 <&apmixedsys CLK_APMIXED_MAINPLL>;
205 <&apmixedsys CLK_APMIXED_MAINPLL>;
615 apmixedsys: clock-controller@10209000 { label
616 compatible = "mediatek,mt8173-apmixedsys";
624 clocks = <&apmixedsys CLK_APMIXED_HDMI_REF>;
794 mediatek,apmixedsys = <&apmixedsys>;
982 clocks = <&apmixedsys CLK_APMIXED_REF2USB_TX>;
998 clocks = <&apmixedsys CLK_APMIXED_REF2USB_TX>;
[all …]
H A Dmt8167.dtsi32 apmixedsys: apmixedsys@10018000 { label
33 compatible = "mediatek,mt8167-apmixedsys", "syscon";
H A Dmt8186.dtsi34 clocks = <&apmixedsys CLK_APMIXED_TVDPLL>;
42 <&apmixedsys CLK_APMIXED_MAINPLL>;
381 <&apmixedsys CLK_APMIXED_MAINPLL>;
405 <&apmixedsys CLK_APMIXED_MAINPLL>;
429 <&apmixedsys CLK_APMIXED_MAINPLL>;
453 <&apmixedsys CLK_APMIXED_MAINPLL>;
477 <&apmixedsys CLK_APMIXED_MAINPLL>;
501 <&apmixedsys CLK_APMIXED_MAINPLL>;
525 <&apmixedsys CLK_APMIXED_MAINPLL>;
549 <&apmixedsys CLK_APMIXED_MAINPLL>;
[all …]
H A Dmt7622.dtsi76 <&apmixedsys CLK_APMIXED_MAIN_CORE_EN>;
91 <&apmixedsys CLK_APMIXED_MAIN_CORE_EN>;
286 apmixedsys: clock-controller@10209000 { label
287 compatible = "mediatek,mt7622-apmixedsys";
517 mediatek,apmixedsys = <&apmixedsys>;
980 <&apmixedsys CLK_APMIXED_ETH2PLL>;
/freebsd/sys/contrib/device-tree/src/arm/mediatek/
H A Dmt7623.dtsi81 <&apmixedsys CLK_APMIXED_MAINPLL>;
93 <&apmixedsys CLK_APMIXED_MAINPLL>;
105 <&apmixedsys CLK_APMIXED_MAINPLL>;
117 <&apmixedsys CLK_APMIXED_MAINPLL>;
340 apmixedsys: syscon@10209000 { label
341 compatible = "mediatek,mt7623-apmixedsys",
342 "mediatek,mt2701-apmixedsys",
505 mediatek,apmixedsys = <&apmixedsys>;
971 <&apmixedsys CLK_APMIXED_TRGPLL>;
H A Dmt8135.dtsi200 apmixedsys: apmixedsys@10209000 { label
201 compatible = "mediatek,mt8135-apmixedsys";
H A Dmt7629.dtsi123 apmixedsys: syscon@10209000 { label
124 compatible = "mediatek,mt7629-apmixedsys", "syscon";
458 <&apmixedsys CLK_APMIXED_SGMIPLL>,
459 <&apmixedsys CLK_APMIXED_ETH2PLL>;

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