| /freebsd/sys/contrib/device-tree/Bindings/arm/mediatek/ |
| H A D | mediatek,apmixedsys.txt | 1 Mediatek apmixedsys controller
4 The Mediatek apmixedsys controller provides the PLLs to the system.
9 - "mediatek,mt2701-apmixedsys"
10 - "mediatek,mt2712-apmixedsys", "syscon"
11 - "mediatek,mt6765-apmixedsys", "syscon"
12 - "mediatek,mt6779-apmixedsys", "syscon"
13 - "mediatek,mt6797-apmixedsys"
14 - "mediatek,mt7622-apmixedsys"
15 - "mediatek,mt7623-apmixedsys", "mediatek,mt2701-apmixedsys"
16 - "mediatek,mt7629-apmixedsys"
[all …]
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| H A D | mediatek,mt8195-sys-clock.yaml | 20 The apmixedsys provides most of PLLs which generated from SoC 26m.
30 - mediatek,mt8195-apmixedsys
65 apmixedsys: syscon@1000c000 {
66 compatible = "mediatek,mt8195-apmixedsys", "syscon";
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| H A D | mediatek,mt8192-sys-clock.yaml | 23 - mediatek,mt8192-apmixedsys
64 apmixedsys: syscon@1000c000 {
65 compatible = "mediatek,mt8192-apmixedsys", "syscon";
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| H A D | mediatek,mt8186-sys-clock.yaml | 20 The apmixedsys provides most of PLLs which generated from SoC 26m.
33 - mediatek,mt8186-apmixedsys
|
| /freebsd/sys/contrib/device-tree/Bindings/clock/ |
| H A D | mediatek,apmixedsys.yaml | 4 $id: http://devicetree.org/schemas/clock/mediatek,apmixedsys.yaml#
14 The Mediatek apmixedsys controller provides PLLs to the system.
21 - mediatek,mt6797-apmixedsys
22 - mediatek,mt7622-apmixedsys
23 - mediatek,mt7981-apmixedsys
24 - mediatek,mt7986-apmixedsys
25 - mediatek,mt7988-apmixedsys
26 - mediatek,mt8135-apmixedsys
27 - mediatek,mt8173-apmixedsys
28 - mediatek,mt8516-apmixedsys
[all …]
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| H A D | mediatek,mt8195-sys-clock.yaml | 20 The apmixedsys provides most of PLLs which generated from SoC 26m.
30 - mediatek,mt8195-apmixedsys
65 apmixedsys: syscon@1000c000 {
66 compatible = "mediatek,mt8195-apmixedsys", "syscon";
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| H A D | mediatek,mt8192-sys-clock.yaml | 23 - mediatek,mt8192-apmixedsys
64 apmixedsys: syscon@1000c000 {
65 compatible = "mediatek,mt8192-apmixedsys", "syscon";
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| H A D | mediatek,mt8365-sys-clock.yaml | 13 The apmixedsys module provides most of PLLs which generated from SoC 26m.
23 - mediatek,mt8365-apmixedsys
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| H A D | mediatek,mt8186-sys-clock.yaml | 20 The apmixedsys provides most of PLLs which generated from SoC 26m.
33 - mediatek,mt8186-apmixedsys
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| H A D | mediatek,mt8188-sys-clock.yaml | 20 The apmixedsys provides most of PLLs which generated from SoC 26m.
30 - mediatek,mt8188-apmixedsys
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| /freebsd/sys/contrib/device-tree/Bindings/thermal/ |
| H A D | mediatek-thermal.txt | 7 apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
28 - mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
49 mediatek,apmixedsys = <&apmixedsys>;
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| /freebsd/sys/contrib/device-tree/Bindings/sound/ |
| H A D | mt8186-afe-pcm.yaml | 28 mediatek,apmixedsys:
30 description: The phandle of the mediatek apmixedsys controller
101 - mediatek,apmixedsys
120 mediatek,apmixedsys = <&apmixedsys>;
129 <&apmixedsys 12>, //CLK_APMIXED_APLL1
131 <&apmixedsys 13>, //CLK_APMIXED_APLL2
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| H A D | mt8192-afe-pcm.yaml | 26 mediatek,apmixedsys:
28 description: The phandle of the mediatek apmixedsys controller
62 - mediatek,apmixedsys
84 mediatek,apmixedsys = <&apmixedsys>;
|
| /freebsd/sys/contrib/device-tree/Bindings/media/ |
| H A D | mediatek,vcodec-decoder.yaml | 174 clocks = <&apmixedsys CLK_APMIXED_VCODECPLL>,
179 <&apmixedsys CLK_APMIXED_VENCPLL>,
193 <&apmixedsys CLK_APMIXED_VCODECPLL>,
194 <&apmixedsys CLK_APMIXED_VENCPLL>;
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| H A D | mediatek-vcodec.txt | 62 clocks = <&apmixedsys CLK_APMIXED_VCODECPLL>,
67 <&apmixedsys CLK_APMIXED_VENCPLL>,
81 <&apmixedsys CLK_APMIXED_VCODECPLL>,
82 <&apmixedsys CLK_APMIXED_VENCPLL>;
|
| /freebsd/sys/contrib/device-tree/Bindings/cpufreq/ |
| H A D | cpufreq-mediatek.txt | 71 <&apmixedsys CLK_APMIXED_MAINPLL>;
193 <&apmixedsys CLK_APMIXED_MAINPLL>;
205 <&apmixedsys CLK_APMIXED_MAINPLL>;
217 <&apmixedsys CLK_APMIXED_MAINPLL>;
229 <&apmixedsys CLK_APMIXED_MAINPLL>;
|
| /freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
| H A D | mt7986a.dtsi | 170 apmixedsys: apmixedsys@1001e000 { label
171 compatible = "mediatek,mt7986-apmixedsys";
243 assigned-clock-parents = <&apmixedsys CLK_APMIXED_NET2PLL>;
341 mediatek,apmixedsys = <&apmixedsys>;
383 assigned-clock-parents = <&apmixedsys CLK_APMIXED_MPLL>,
554 assigned-clock-parents = <&apmixedsys CLK_APMIXED_NET2PLL>,
555 <&apmixedsys CLK_APMIXED_SGMPLL>;
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| H A D | mt8173.dtsi | 160 <&apmixedsys CLK_APMIXED_MAINPLL>;
175 <&apmixedsys CLK_APMIXED_MAINPLL>;
190 <&apmixedsys CLK_APMIXED_MAINPLL>;
205 <&apmixedsys CLK_APMIXED_MAINPLL>;
607 apmixedsys: clock-controller@10209000 { label
608 compatible = "mediatek,mt8173-apmixedsys";
616 clocks = <&apmixedsys CLK_APMIXED_HDMI_REF>;
786 mediatek,apmixedsys = <&apmixedsys>;
973 clocks = <&apmixedsys CLK_APMIXED_REF2USB_TX>;
989 clocks = <&apmixedsys CLK_APMIXED_REF2USB_TX>;
[all …]
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| H A D | mt8167.dtsi | 32 apmixedsys: apmixedsys@10018000 { label
33 compatible = "mediatek,mt8167-apmixedsys", "syscon";
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| H A D | mt8186.dtsi | 35 <&apmixedsys CLK_APMIXED_MAINPLL>;
374 <&apmixedsys CLK_APMIXED_MAINPLL>;
398 <&apmixedsys CLK_APMIXED_MAINPLL>;
422 <&apmixedsys CLK_APMIXED_MAINPLL>;
446 <&apmixedsys CLK_APMIXED_MAINPLL>;
470 <&apmixedsys CLK_APMIXED_MAINPLL>;
494 <&apmixedsys CLK_APMIXED_MAINPLL>;
518 <&apmixedsys CLK_APMIXED_MAINPLL>;
542 <&apmixedsys CLK_APMIXED_MAINPLL>;
1099 apmixedsys: syscon@1000c000 { label
[all …]
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| H A D | mt7622.dtsi | 76 <&apmixedsys CLK_APMIXED_MAIN_CORE_EN>;
91 <&apmixedsys CLK_APMIXED_MAIN_CORE_EN>;
286 apmixedsys: clock-controller@10209000 { label
287 compatible = "mediatek,mt7622-apmixedsys";
517 mediatek,apmixedsys = <&apmixedsys>;
980 <&apmixedsys CLK_APMIXED_ETH2PLL>;
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| H A D | mt6795-sony-xperia-m5.dts | 131 clocks = <&apmixedsys CLK_APMIXED_MAINPLL>, <&apmixedsys CLK_APMIXED_MPLL>,
132 <&apmixedsys CLK_APMIXED_MSDCPLL>;
|
| /freebsd/sys/contrib/device-tree/src/arm/mediatek/ |
| H A D | mt7623.dtsi | 81 <&apmixedsys CLK_APMIXED_MAINPLL>;
93 <&apmixedsys CLK_APMIXED_MAINPLL>;
105 <&apmixedsys CLK_APMIXED_MAINPLL>;
117 <&apmixedsys CLK_APMIXED_MAINPLL>;
340 apmixedsys: syscon@10209000 { label
341 compatible = "mediatek,mt7623-apmixedsys",
342 "mediatek,mt2701-apmixedsys",
505 mediatek,apmixedsys = <&apmixedsys>;
971 <&apmixedsys CLK_APMIXED_TRGPLL>;
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| H A D | mt8135.dtsi | 200 apmixedsys: apmixedsys@10209000 { label
201 compatible = "mediatek,mt8135-apmixedsys";
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| H A D | mt7629.dtsi | 123 apmixedsys: syscon@10209000 { label
124 compatible = "mediatek,mt7629-apmixedsys", "syscon";
458 <&apmixedsys CLK_APMIXED_SGMIPLL>,
459 <&apmixedsys CLK_APMIXED_ETH2PLL>;
|