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/linux/drivers/net/ethernet/ti/
H A Dcpsw_ale.c26 /* ALE Registers */
37 /* ALE NetCP NU switch specific Registers */
70 * struct ale_entry_fld - The ALE tbl entry field description
89 * struct cpsw_ale_dev_id - The ALE version/SoC specific configuration
90 * @dev_id: ALE version/SoC id
91 * @features: features supported by ALE
92 * @tbl_entries: number of ALE entries
95 * @nu_switch_ale: NU Switch ALE
96 * @vlan_entry_tbl: ALE vlan entry fields description tbl
259 static int cpsw_ale_entry_get_fld(struct cpsw_ale *ale, in cpsw_ale_entry_get_fld() argument
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H A Dcpsw_ale.h20 /* NU Switch has specific handling as number of bits in ALE entries
21 * are different than other versions of ALE. Also there are specific
93 /* These bits are different on NetCP NU Switch ALE */
141 /* ALE unicast entry flags - passed into cpsw_ale_add_ucast() */
161 void cpsw_ale_start(struct cpsw_ale *ale);
162 void cpsw_ale_stop(struct cpsw_ale *ale);
164 int cpsw_ale_flush_multicast(struct cpsw_ale *ale, int port_mask, int vid);
165 int cpsw_ale_add_ucast(struct cpsw_ale *ale, const u8 *addr, int port,
167 int cpsw_ale_del_ucast(struct cpsw_ale *ale, const u8 *addr, int port,
169 int cpsw_ale_add_mcast(struct cpsw_ale *ale, const u8 *addr, int port_mask,
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H A Dcpsw_new.c104 cpsw_ale_control_set(cpsw->ale, HOST_PORT_NUM, in cpsw_set_promiscious()
110 cpsw_ale_control_set(cpsw->ale, HOST_PORT_NUM, in cpsw_set_promiscious()
139 ret = cpsw_ale_add_mcast(cpsw->ale, addr, mask, flags, vid, 0); in cpsw_set_mc()
141 ret = cpsw_ale_del_mcast(cpsw->ale, addr, 0, flags, vid); in cpsw_set_mc()
265 cpsw_ale_set_allmulti(cpsw->ale, IFF_ALLMULTI, priv->emac_port); in cpsw_ndo_set_rx_mode_work()
273 cpsw_ale_set_allmulti(cpsw->ale, in cpsw_ndo_set_rx_mode_work()
436 ret = cpsw_ale_add_vlan(cpsw->ale, vid, port_mask, 0, port_mask, in cpsw_add_vlan_ale_entry()
441 ret = cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, in cpsw_add_vlan_ale_entry()
446 ret = cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast, in cpsw_add_vlan_ale_entry()
453 cpsw_ale_del_ucast(cpsw->ale, priv->mac_addr, in cpsw_add_vlan_ale_entry()
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H A Dcpsw.c56 MODULE_PARM_DESC(ale_ageout, "cpsw ale ageout interval (seconds)");
97 struct cpsw_ale *ale = cpsw->ale; in cpsw_set_promiscious() local
118 cpsw_ale_control_set(ale, 0, ALE_BYPASS, 1); in cpsw_set_promiscious()
123 cpsw_ale_control_set(ale, 0, ALE_BYPASS, 0); in cpsw_set_promiscious()
132 cpsw_ale_control_set(ale, i, in cpsw_set_promiscious()
134 cpsw_ale_control_set(ale, i, in cpsw_set_promiscious()
139 cpsw_ale_control_set(ale, 0, ALE_AGEOUT, 1); in cpsw_set_promiscious()
142 if (cpsw_ale_control_get(ale, 0, ALE_AGEOUT)) in cpsw_set_promiscious()
145 cpsw_ale_control_set(ale, 0, ALE_AGEOUT, 1); in cpsw_set_promiscious()
147 /* Clear all mcast from ALE */ in cpsw_set_promiscious()
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H A Dcpsw_switchdev.c51 ret = cpsw_ale_control_set(cpsw->ale, priv->emac_port, in cpsw_port_stp_state_set()
53 dev_dbg(priv->dev, "ale state: %u\n", cpsw_state); in cpsw_port_stp_state_set()
73 cpsw_ale_set_unreg_mcast(cpsw->ale, BIT(priv->emac_port), in cpsw_port_attr_br_flags_set()
192 ret = cpsw_ale_vlan_add_modify(cpsw->ale, vid, port_mask, untag_mask, in cpsw_port_vlan_add()
200 cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, in cpsw_port_vlan_add()
225 ret = cpsw_ale_vlan_del_modify(cpsw->ale, vid, port_mask); in cpsw_port_vlan_del()
233 cpsw_ale_del_ucast(cpsw->ale, priv->mac_addr, in cpsw_port_vlan_del()
242 cpsw_ale_del_mcast(cpsw->ale, priv->ndev->broadcast, in cpsw_port_vlan_del()
278 err = cpsw_ale_add_mcast(cpsw->ale, mdb->addr, port_mask, in cpsw_port_mdb_add()
301 err = cpsw_ale_del_mcast(cpsw->ale, mdb->addr, del_mask, in cpsw_port_mdb_del()
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H A Dam65-cpsw-switchdev.c49 ret = cpsw_ale_control_set(cpsw->ale, port->port_id, in am65_cpsw_port_stp_state_set()
51 netdev_dbg(port->ndev, "ale state: %u\n", cpsw_state); in am65_cpsw_port_stp_state_set()
71 cpsw_ale_set_unreg_mcast(cpsw->ale, BIT(port->port_id), in am65_cpsw_port_attr_br_flags_set()
176 ret = cpsw_ale_vlan_add_modify(cpsw->ale, vid, port_mask, untag_mask, in am65_cpsw_port_vlan_add()
184 cpsw_ale_add_ucast(cpsw->ale, port->slave.mac_addr, in am65_cpsw_port_vlan_add()
210 ret = cpsw_ale_del_vlan(cpsw->ale, vid, port_mask); in am65_cpsw_port_vlan_del()
218 cpsw_ale_del_ucast(cpsw->ale, port->slave.mac_addr, in am65_cpsw_port_vlan_del()
227 cpsw_ale_del_mcast(cpsw->ale, port->ndev->broadcast, port_mask, in am65_cpsw_port_vlan_del()
270 err = cpsw_ale_add_mcast(cpsw->ale, mdb->addr, port_mask, in am65_cpsw_port_mdb_add()
293 cpsw_ale_del_mcast(cpsw->ale, mdb->addr, del_mask, in am65_cpsw_port_mdb_del()
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H A Dam65-cpsw-nuss.c322 ret = cpsw_ale_vlan_add_modify(common->ale, vid, port_mask, in am65_cpsw_nuss_ndo_slave_add_vid()
347 ret = cpsw_ale_del_vlan(common->ale, vid, in am65_cpsw_nuss_ndo_slave_kill_vid()
366 cpsw_ale_control_set(common->ale, port->port_id, in am65_cpsw_slave_set_promisc()
371 cpsw_ale_control_set(common->ale, port->port_id, in am65_cpsw_slave_set_promisc()
391 cpsw_ale_set_allmulti(common->ale, in am65_cpsw_nuss_ndo_slave_set_rx_mode()
395 /* Clear all mcast from ALE */ in am65_cpsw_nuss_ndo_slave_set_rx_mode()
396 cpsw_ale_flush_multicast(common->ale, port_mask, -1); in am65_cpsw_nuss_ndo_slave_set_rx_mode()
401 /* program multicast address list into ALE register */ in am65_cpsw_nuss_ndo_slave_set_rx_mode()
403 cpsw_ale_add_mcast(common->ale, ha->addr, in am65_cpsw_nuss_ndo_slave_set_rx_mode()
906 cpsw_ale_start(common->ale); in am65_cpsw_nuss_common_open()
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/linux/drivers/isdn/hardware/mISDN/
H A DmISDNinfineon.c724 hw->isac.a.io.ale = (u32)hw->cfg.start + DIVA_ISAC_ALE; in setup_io()
727 hw->hscx.a.io.ale = (u32)hw->cfg.start + DIVA_HSCX_ALE; in setup_io()
750 hw->isac.a.io.ale = (u32)hw->cfg.start + TIGER_IPAC_ALE; in setup_io()
753 hw->hscx.a.io.ale = (u32)hw->cfg.start + TIGER_IPAC_ALE; in setup_io()
765 hw->isac.a.io.ale = (u32)hw->addr.start; in setup_io()
768 hw->hscx.a.io.ale = (u32)hw->addr.start; in setup_io()
775 hw->isac.a.io.ale = (u32)hw->addr.start + NICCY_ISAC_ALE; in setup_io()
778 hw->hscx.a.io.ale = (u32)hw->addr.start + NICCY_HSCX_ALE; in setup_io()
784 hw->isac.a.io.ale = (u32)hw->addr.start; in setup_io()
785 hw->isac.a.io.port = hw->isac.a.io.ale + 4; in setup_io()
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H A Diohelper.h22 u32 ale; member
46 outb(off, hw->ap.ale); \
51 outb(off, hw->ap.ale); \
56 outb(off, hw->ap.ale); \
61 outb(off, hw->ap.ale); \
/linux/Documentation/devicetree/bindings/mtd/
H A Dorion-nand.txt10 - ale : Address line number connected to ALE. Default is 1
24 ale = <1>;
H A Dgpio-control-nand.txt15 GPIO references is: RDY, nCE, ALE, CLE, and nWP. nCE and nWP are optional.
40 <&banka 3 0>, /* ALE */
H A Datmel-nand.txt169 atmel,nand-addr-offset = <21>; /* ale */
192 atmel,nand-addr-offset = <21>; /* ale */
/linux/Documentation/devicetree/bindings/bus/
H A Dts-nbus.txt15 - ts,ale-gpios : The GPIO pin connected to the ale line on the FPGA
42 ts,ale-gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
/linux/drivers/mtd/nand/raw/
H A Dgpio.c38 struct gpio_desc *ale; member
93 gpiod_set_value(gpiomtd->ale, 1); in gpio_nand_exec_instr()
98 gpiod_set_value(gpiomtd->ale, 0); in gpio_nand_exec_instr()
330 gpiomtd->ale = devm_gpiod_get(dev, "ale", GPIOD_OUT_LOW); in gpio_nand_probe()
331 if (IS_ERR(gpiomtd->ale)) { in gpio_nand_probe()
332 ret = PTR_ERR(gpiomtd->ale); in gpio_nand_probe()
H A Dorion_nand.c42 offs = (1 << board->ale); in orion_nand_cmd_ctrl()
135 if (!of_property_read_u32(pdev->dev.of_node, "ale", &val)) in orion_nand_probe()
136 board->ale = (u8)val; in orion_nand_probe()
138 board->ale = 1; in orion_nand_probe()
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dmvebu-devbus.txt53 ALE[0] to the cycle that the first read data is sampled
85 - devbus,ale-wr-ps: Defines the time delay from the ALE[0] negation cycle
152 devbus,ale-wr-ps = <60000>;
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dlantiq,pinctrl-xway.txt56 ebu wait, nand ale, nand cs1, nand cle, spi_di, spi_do, spi_clk, spi_cs1,
67 ebu cs1, ebu wait, nand ale, nand cs1, nand cle, nand rdy, nand rd,
79 ebu cs1, ebu wait, nand ale, nand cs1, nand cle, nand rdy, nand rd,
93 exin0, exin1, exin2, exin4, nand ale, nand cs0, nand cs1, nand cle,
/linux/include/linux/platform_data/
H A Dmtd-orion_nand.h16 u8 ale; /* address line number connected to ALE */ member
/linux/arch/loongarch/kernel/
H A Dgenex.S94 BUILD_HANDLER ale ale badv
/linux/arch/arm/boot/dts/marvell/
H A Dorion5x-rd88f5182-nas.dts56 devbus,ale-wr-ps = <90000>;
78 devbus,ale-wr-ps = <90000>;
/linux/arch/arm/boot/compressed/
H A Dhead-sharpsl.S137 orr r3, r3, #4 @ SET ALE
141 bic r3, r3, #4 @ CLR ALE
/linux/Documentation/devicetree/bindings/mips/cavium/
H A Dbootbus.txt62 - cavium,ale-mode: Optional. If present, ALE mode is selected.
/linux/include/linux/mtd/
H A Drawnand.h33 * Constants for hardware specific CLE/ALE/NCE function
42 /* Select the address latch by setting ALE to high */
402 * @tALH_min: ALE hold time
403 * @tADL_min: ALE to data loading time
404 * @tALS_min: ALE setup time
405 * @tAR_min: ALE to RE# delay
496 * @tADL_min: ALE to data loading time
499 * @tCALH_min: W/R_n, CLE and ALE hold time
500 * @tCALS_min: W/R_n, CLE and ALE setup time
1144 * @cmd_ctrl: hardware specific function for controlling ALE/CLE/nCE. Also used
/linux/drivers/net/ethernet/amd/
H A Da2065.h84 #define LE_C3_ACON 0x0002 /* ALE Control
85 (on for active low ALE) */
/linux/arch/mips/include/asm/octeon/
H A Dcvmx-mio-defs.h496 uint64_t ale:1; member
512 uint64_t ale:1;
520 uint64_t ale:1; member
536 uint64_t ale:1;
543 uint64_t ale:1; member
557 uint64_t ale:1;
565 uint64_t ale:1; member
581 uint64_t ale:1;
601 uint64_t ale:1; member
609 uint64_t ale:1;
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