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/linux/arch/arm/boot/dts/marvell/
H A Darmada-xp-lenovo-ix4-300d.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for Lenovo Iomega ix4-300d
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include "armada-xp-mv78230.dtsi"
15 model = "Lenovo Iomega ix4-300d";
16 compatible = "lenovo,ix4-300d", "marvell,armadaxp-mv78230",
17 "marvell,armadaxp", "marvell,armada-370-xp";
20 stdout-path = "serial0:115200n8";
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/linux/drivers/gpu/drm/radeon/
H A Dpptable.h35 UCHAR ucFanMinRPM; // Fan Minimum RPM (hundreds) -- for display purposes only.
36 UCHAR ucFanMaxRPM; // Fan Maximum RPM (hundreds) -- for display purposes only.
37 UCHAR ucReserved; // ----
71 #define ATOM_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL 0x89 // ADT7473 Fan Control + Internal…
77 UCHAR ucClockStateIndices[]; // variable-sized
135 …GOTO_BOOT_ON_ALERT 0x2000 // Go to boot state on alerts, e.g. on an AC->DC transition.
136 …IT_FOR_VBLANK_ON_ALERT 0x4000 // Do NOT wait for VBLANK during an alert (e.g. AC->DC transition).
161 // offset from start of this table to array of ASIC-specific structures,
247 #define ATOM_PPLIB_CLASSIFICATION2_MVC 0x0004 //Multi-View Codec (BD-3D)
257 // lanes - 1: 1, 2, 4, 8, 12, 16 permitted by PCIE spec
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H A Dradeon_atombios.c2 * Copyright 2007-8 Advanced Micro Devices, Inc.
36 #include "atom-bits.h"
52 if ((rdev->family == CHIP_R420) || in radeon_lookup_i2c_gpio_quirks()
53 (rdev->family == CHIP_R423) || in radeon_lookup_i2c_gpio_quirks()
54 (rdev->family == CHIP_RV410)) { in radeon_lookup_i2c_gpio_quirks()
55 if ((le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0018) || in radeon_lookup_i2c_gpio_quirks()
56 (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0019) || in radeon_lookup_i2c_gpio_quirks()
57 (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x001a)) { in radeon_lookup_i2c_gpio_quirks()
58 gpio->ucClkMaskShift = 0x19; in radeon_lookup_i2c_gpio_quirks()
59 gpio->ucDataMaskShift = 0x18; in radeon_lookup_i2c_gpio_quirks()
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/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dpptable_v1_0.h49 #define ATOM_TONGA_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL 0x89 /* ADT7473 Fan Control + In…
245 ULONG ulDClk; /* UVD D-clock */
246 ULONG ulVClk; /* UVD V-clock */
354 UCHAR ucFanMinRPM; /* Fan Minimum RPM (hundreds) -- for display purposes only. */
355 UCHAR ucFanMaxRPM; /* Fan Maximum RPM (hundreds) -- for display purposes only. */
362 UCHAR ucFlag; /* 2 bits indicates memory p-states */