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/linux/drivers/iio/adc/
H A DKconfig3 # ADC drivers
25 tristate "Analog Devices AD4000 ADC Driver"
31 SPI analog to digital converters (ADC).
37 tristate "Analog Device AD4130 ADC Driver"
46 to digital converters (ADC).
52 tristate "Analog Device AD4695 ADC Driver"
59 analog to digital converters (ADC).
68 tristate "Analog Devices AD7091R5 ADC Driver"
73 Say yes here to build support for Analog Devices AD7091R-5 ADC.
76 tristate "Analog Devices AD7091R8 ADC Driver"
[all …]
H A Dti-adc12138.c3 * ADC12130/ADC12132/ADC12138 12-bit plus sign ADC driver
52 * Maximum size needed: 16x 2 bytes ADC data + 8 bytes timestamp.
128 static int adc12138_mode_programming(struct adc12138 *adc, u8 mode, in adc12138_mode_programming() argument
132 .tx_buf = adc->tx_buf, in adc12138_mode_programming()
133 .rx_buf = adc->rx_buf, in adc12138_mode_programming()
139 if (adc->id != adc12138) in adc12138_mode_programming()
142 adc->tx_buf[0] = mode; in adc12138_mode_programming()
144 ret = spi_sync_transfer(adc->spi, &xfer, 1); in adc12138_mode_programming()
148 memcpy(rx_buf, adc->rx_buf, len); in adc12138_mode_programming()
153 static int adc12138_read_status(struct adc12138 *adc) in adc12138_read_status() argument
[all …]
H A Dstm32-dfsdm-adc.c3 * This file is the ADC part of the STM32 DFSDM driver
11 #include <linux/iio/adc/stm32-dfsdm-adc.h>
79 /* ADC specific */
318 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); in stm32_dfsdm_compute_all_osrs() local
319 struct stm32_dfsdm_filter *fl = &adc->dfsdm->fl_list[adc->fl_id]; in stm32_dfsdm_compute_all_osrs()
339 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); in stm32_dfsdm_start_channel() local
340 struct regmap *regmap = adc->dfsdm->regmap; in stm32_dfsdm_start_channel()
345 for_each_set_bit(bit, &adc->smask, sizeof(adc->smask) * BITS_PER_BYTE) { in stm32_dfsdm_start_channel()
359 struct stm32_dfsdm_adc *adc = iio_priv(indio_dev); in stm32_dfsdm_stop_channel() local
360 struct regmap *regmap = adc->dfsdm->regmap; in stm32_dfsdm_stop_channel()
[all …]
H A Dingenic-adc.c3 * ADC driver for the Ingenic JZ47xx SoCs
6 * based on drivers/mfd/jz4740-adc.c
9 #include <dt-bindings/iio/adc/ingenic,adc.h>
102 int (*init_clk_div)(struct device *dev, struct ingenic_adc *adc);
116 struct ingenic_adc *adc = iio_priv(iio_dev); in ingenic_adc_set_adcmd() local
118 mutex_lock(&adc->lock); in ingenic_adc_set_adcmd()
121 readl(adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
128 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
134 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
142 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
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H A Dmcp3911.c106 int (*config)(struct mcp3911 *adc, bool external_vref);
107 int (*get_osr)(struct mcp3911 *adc, u32 *val);
108 int (*set_osr)(struct mcp3911 *adc, u32 val);
109 int (*enable_offset)(struct mcp3911 *adc, bool enable);
110 int (*get_offset)(struct mcp3911 *adc, int channel, int *val);
111 int (*set_offset)(struct mcp3911 *adc, int channel, int val);
112 int (*set_scale)(struct mcp3911 *adc, int channel, u32 val);
132 static int mcp3911_read(struct mcp3911 *adc, u8 reg, u32 *val, u8 len) in mcp3911_read() argument
136 reg = MCP3911_REG_READ(reg, adc->dev_addr); in mcp3911_read()
137 ret = spi_write_then_read(adc in mcp3911_read()
148 mcp3911_write(struct mcp3911 * adc,u8 reg,u32 val,u8 len) mcp3911_write() argument
159 mcp3911_update(struct mcp3911 * adc,u8 reg,u32 mask,u32 val,u8 len) mcp3911_update() argument
173 mcp3910_enable_offset(struct mcp3911 * adc,bool enable) mcp3910_enable_offset() argument
181 mcp3910_get_offset(struct mcp3911 * adc,int channel,int * val) mcp3910_get_offset() argument
186 mcp3910_set_offset(struct mcp3911 * adc,int channel,int val) mcp3910_set_offset() argument
197 mcp3911_enable_offset(struct mcp3911 * adc,bool enable) mcp3911_enable_offset() argument
205 mcp3911_get_offset(struct mcp3911 * adc,int channel,int * val) mcp3911_get_offset() argument
210 mcp3911_set_offset(struct mcp3911 * adc,int channel,int val) mcp3911_set_offset() argument
221 mcp3910_get_osr(struct mcp3911 * adc,u32 * val) mcp3910_get_osr() argument
235 mcp3910_set_osr(struct mcp3911 * adc,u32 val) mcp3910_set_osr() argument
243 mcp3911_set_osr(struct mcp3911 * adc,u32 val) mcp3911_set_osr() argument
251 mcp3911_get_osr(struct mcp3911 * adc,u32 * val) mcp3911_get_osr() argument
265 mcp3910_set_scale(struct mcp3911 * adc,int channel,u32 val) mcp3910_set_scale() argument
272 mcp3911_set_scale(struct mcp3911 * adc,int channel,u32 val) mcp3911_set_scale() argument
318 struct mcp3911 *adc = iio_priv(indio_dev); mcp3911_read_raw() local
356 struct mcp3911 *adc = iio_priv(indio_dev); mcp3911_write_raw() local
490 struct mcp3911 *adc = iio_priv(indio_dev); mcp3911_trigger_handler() local
534 mcp3911_config(struct mcp3911 * adc,bool external_vref) mcp3911_config() argument
600 mcp3910_config(struct mcp3911 * adc,bool external_vref) mcp3910_config() argument
669 struct mcp3911 *adc = iio_trigger_get_drvdata(trig); mcp3911_set_trigger_state() local
688 struct mcp3911 *adc; mcp3911_probe() local
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H A Dmcp3564.c3 * IIO driver for MCP356X/MCP356XR and MCP346X/MCP346XR series ADC chip family
14 …MCP3461-2-4-Two-Four-Eight-Channel-153.6-ksps-Low-Noise-16-Bit-Delta-Sigma-ADC-Data-Sheet-20006180…
64 * ADC Output Data Format 32-bit (25-bit right justified data + Channel ID):
65 * CHID[3:0] + SGN extension (4 bits) + 24-bit ADC data.
70 * ADC Output Data Format 32-bit (25-bit right justified data):
71 * SGN extension (8-bit) + 24-bit ADC data.
76 * ADC Output Data Format 32-bit (24-bit left justified data):
77 * 24-bit ADC data + 0x00 (8-bit).
78 * It does not allow overrange (ADC code locked to 0xFFFFFF or 0x800000).
82 * ADC Output Data Format 24-bit (default ADC coding):
[all …]
H A Dlpc18xx_adc.c3 * IIO ADC driver for NXP LPC18xx ADC
26 /* LPC18XX ADC registers and bits */
69 static int lpc18xx_adc_read_chan(struct lpc18xx_adc *adc, unsigned int ch) in lpc18xx_adc_read_chan() argument
74 reg = adc->cr_reg | BIT(ch) | LPC18XX_ADC_CR_START_NOW; in lpc18xx_adc_read_chan()
75 writel(reg, adc->base + LPC18XX_ADC_CR); in lpc18xx_adc_read_chan()
77 ret = readl_poll_timeout(adc->base + LPC18XX_ADC_GDR, reg, in lpc18xx_adc_read_chan()
80 dev_warn(adc->dev, "adc read timed out\n"); in lpc18xx_adc_read_chan()
91 struct lpc18xx_adc *adc = iio_priv(indio_dev); in lpc18xx_adc_read_raw() local
95 mutex_lock(&adc->lock); in lpc18xx_adc_read_raw()
96 *val = lpc18xx_adc_read_chan(adc, chan->channel); in lpc18xx_adc_read_raw()
[all …]
H A Dti-adc084s021.c5 * Driver for Texas Instruments' ADC084S021 ADC chip.
68 * adc084s021_adc_conversion() - Read an ADC channel and return its value.
70 * @adc: The ADC SPI data.
73 static int adc084s021_adc_conversion(struct adc084s021 *adc, __be16 *data) in adc084s021_adc_conversion() argument
75 int n_words = (adc->spi_trans.len >> 1) - 1; /* Discard first word */ in adc084s021_adc_conversion()
79 ret = spi_sync(adc->spi, &adc->message); in adc084s021_adc_conversion()
84 *(data + i) = adc->rx_buf[i + 1]; in adc084s021_adc_conversion()
93 struct adc084s021 *adc in adc084s021_read_raw() local
148 struct adc084s021 *adc = iio_priv(indio_dev); adc084s021_buffer_trigger_handler() local
165 struct adc084s021 *adc = iio_priv(indio_dev); adc084s021_buffer_preenable() local
181 struct adc084s021 *adc = iio_priv(indio_dev); adc084s021_buffer_postdisable() local
200 struct adc084s021 *adc; adc084s021_probe() local
[all...]
H A Dti-adc0832.c3 * ADC0831/ADC0832/ADC0834/ADC0838 8-bit ADC driver
33 * Max size needed: 16x 1 byte ADC data + 8 bytes timestamp
120 static int adc0831_adc_conversion(struct adc0832 *adc) in adc0831_adc_conversion() argument
122 struct spi_device *spi = adc->spi; in adc0831_adc_conversion()
125 ret = spi_read(spi, &adc->rx_buf, 2); in adc0831_adc_conversion()
132 return (adc->rx_buf[0] << 2 & 0xff) | (adc->rx_buf[1] >> 6); in adc0831_adc_conversion()
135 static int adc0832_adc_conversion(struct adc0832 *adc, int channel, in adc0832_adc_conversion() argument
138 struct spi_device *spi = adc->spi; in adc0832_adc_conversion()
140 .tx_buf = adc->tx_buf, in adc0832_adc_conversion()
141 .rx_buf = adc->rx_buf, in adc0832_adc_conversion()
[all …]
H A Dmax1241.c3 * MAX1241 low-power, 12-bit serial ADC
41 static int max1241_read(struct max1241 *adc) in max1241_read() argument
57 .rx_buf = &adc->data, in max1241_read()
62 return spi_sync_transfer(adc->spi, xfers, ARRAY_SIZE(xfers)); in max1241_read()
70 struct max1241 *adc = iio_priv(indio_dev); in max1241_read_raw() local
74 mutex_lock(&adc->lock); in max1241_read_raw()
76 if (adc->shutdown) { in max1241_read_raw()
77 gpiod_set_value(adc->shutdown, 0); in max1241_read_raw()
79 ret = max1241_read(adc); in max1241_read_raw()
80 gpiod_set_value(adc->shutdown, 1); in max1241_read_raw()
[all …]
H A Dmcp320x.c8 * Driver for following ADC chips from Microchip Technology's:
72 * struct mcp320x - Microchip SPI ADC instance
74 * @msg: SPI message to select a channel and receive a value from the ADC
80 * @chip_info: ADC properties
120 static int mcp320x_adc_conversion(struct mcp320x *adc, u8 channel, in mcp320x_adc_conversion() argument
125 if (adc->chip_info->conv_time) { in mcp320x_adc_conversion()
126 ret = spi_sync(adc->spi, &adc->start_conv_msg); in mcp320x_adc_conversion()
130 usleep_range(adc->chip_info->conv_time, in mcp320x_adc_conversion()
131 adc->chip_info->conv_time + 100); in mcp320x_adc_conversion()
134 memset(&adc->rx_buf, 0, sizeof(adc->rx_buf)); in mcp320x_adc_conversion()
[all …]
H A Dti-ads8344.c3 * ADS8344 16-bit 8-Channel ADC driver
26 * Lock protecting access to adc->tx_buff and rx_buff,
76 static int ads8344_adc_conversion(struct ads8344 *adc, int channel, in ads8344_adc_conversion() argument
79 struct spi_device *spi = adc->spi; in ads8344_adc_conversion()
82 adc->tx_buf = ADS8344_START; in ads8344_adc_conversion()
84 adc->tx_buf |= ADS8344_SINGLE_END; in ads8344_adc_conversion()
85 adc->tx_buf |= ADS8344_CHANNEL(channel); in ads8344_adc_conversion()
86 adc->tx_buf |= ADS8344_CLOCK_INTERNAL; in ads8344_adc_conversion()
88 ret = spi_write(spi, &adc->tx_buf, 1); in ads8344_adc_conversion()
94 ret = spi_read(spi, adc->rx_buf, sizeof(adc->rx_buf)); in ads8344_adc_conversion()
[all …]
H A Dmcp3422.c95 static int mcp3422_update_config(struct mcp3422 *adc, u8 newconfig) in mcp3422_update_config() argument
99 ret = i2c_master_send(adc->i2c, &newconfig, 1); in mcp3422_update_config()
101 adc->config = newconfig; in mcp3422_update_config()
108 static int mcp3422_read(struct mcp3422 *adc, int *value, u8 *config) in mcp3422_read() argument
111 u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config); in mcp3422_read()
116 ret = i2c_master_recv(adc->i2c, buf, 4); in mcp3422_read()
120 ret = i2c_master_recv(adc->i2c, buf, 3); in mcp3422_read()
130 static int mcp3422_read_channel(struct mcp3422 *adc, in mcp3422_read_channel() argument
137 mutex_lock(&adc->lock); in mcp3422_read_channel()
139 if (req_channel != MCP3422_CHANNEL(adc->config)) { in mcp3422_read_channel()
[all …]
/linux/drivers/mfd/
H A Dpcf50633-adc.c2 /* NXP PCF50633 ADC Driver
11 * NOTE: This driver does not yet support subtractive ADC mode, which means
23 #include <linux/mfd/pcf50633/adc.h>
62 /* start ADC conversion on selected channel */ in adc_setup()
69 struct pcf50633_adc *adc = __to_adc(pcf); in trigger_next_adc_job_if_any() local
72 head = adc->queue_head; in trigger_next_adc_job_if_any()
74 if (!adc->queue[head]) in trigger_next_adc_job_if_any()
77 adc_setup(pcf, adc->queue[head]->mux, adc->queue[head]->avg); in trigger_next_adc_job_if_any()
83 struct pcf50633_adc *adc = __to_adc(pcf); in adc_enqueue_request() local
86 mutex_lock(&adc->queue_mutex); in adc_enqueue_request()
[all …]
/linux/Documentation/devicetree/bindings/iio/adc/
H A Dst,stm32-adc.yaml4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#
7 title: STMicroelectronics STM32 ADC
10 STM32 ADC is a successive approximation analog-to-digital converter.
12 in single, continuous, scan or discontinuous mode. Result of the ADC is
19 Each STM32 ADC block can have up to 3 ADC instances.
27 - st,stm32f4-adc-core
28 - st,stm32h7-adc-core
29 - st,stm32mp1-adc-core
30 - st,stm32mp13-adc-core
37 One or more interrupts for ADC block, depending on part used:
[all …]
H A Dsamsung,exynos-adc.yaml4 $id: http://devicetree.org/schemas/iio/adc/samsung,exynos-adc.yaml#
7 title: Samsung Exynos Analog to Digital Converter (ADC)
16 - samsung,exynos-adc-v1 # Exynos5250
17 - samsung,exynos-adc-v2
18 - samsung,exynos3250-adc
19 - samsung,exynos4212-adc # Exynos4212 and Exynos4412
20 - samsung,exynos7-adc
21 - samsung,s3c2410-adc
22 - samsung,s3c2416-adc
23 - samsung,s3c2440-adc
[all …]
H A Datmel,sama9260-adc.yaml4 $id: http://devicetree.org/schemas/iio/adc/atmel,sama9260-adc.yaml#
7 title: AT91 sama9260 and similar Analog to Digital Converter (ADC)
15 - atmel,at91sam9260-adc
16 - atmel,at91sam9rl-adc
17 - atmel,at91sam9g45-adc
18 - atmel,at91sam9x5-adc
19 - atmel,at91sama5d3-adc
36 atmel,adc-channels-used:
40 atmel,adc-startup-time:
43 Startup Time of the ADC in microseconds as defined in the datasheet
[all …]
H A Dqcom,pm8018-adc.yaml4 $id: http://devicetree.org/schemas/iio/adc/qcom,pm8018-adc.yaml#
13 The Qualcomm PM8xxx PMICs contain a HK/XO ADC (Housekeeping/Crystal
14 oscillator ADC) encompassing PM8018, PM8038, PM8058 and PM8921.
19 - qcom,pm8018-adc
20 - qcom,pm8038-adc
21 - qcom,pm8058-adc
22 - qcom,pm8921-adc
27 ADC base address in the PMIC, typically 0x197.
62 - adc-channel@c
63 - adc-channel@d
[all …]
H A Dti,am3359-adc.yaml4 $id: http://devicetree.org/schemas/iio/adc/ti,am3359-adc.yaml#
7 title: TI AM3359 ADC
16 - ti,am3359-adc
17 - ti,am4372-adc
20 - ti,am654-adc
21 - const: ti,am3359-adc
26 ti,adc-channels:
27 description: List of analog inputs available for ADC. AIN0 = 0, AIN1 = 1 and
34 description: List of open delays for each channel of ADC in the order of
35 ti,adc-channels. The value corresponds to the number of ADC clock cycles
[all …]
H A Dst,stm32-dfsdm-adc.yaml4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
7 title: STMicroelectronics STM32 DFSDM ADC device driver
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
85 - st,stm32-dfsdm-adc
95 st,adc-channels:
97 List of single-ended channels muxed for this ADC.
99 - For st,stm32-dfsdm-adc: up to 8 channels numbered from 0 to 7.
107 st,adc-channel-names:
129 st,adc-channel-types:
141 st,adc-channel-clk-src:
[all …]
H A Dingenic,adc.yaml5 $id: http://devicetree.org/schemas/iio/adc/ingenic,adc.yaml#
8 title: Ingenic JZ47xx ADC controller IIO
14 Industrial I/O subsystem bindings for ADC controller found in
17 ADC clients must use the format described in
19 giving a phandle and IIO specifier pair ("io-channels") to the ADC controller.
24 - ingenic,jz4725b-adc
25 - ingenic,jz4740-adc
26 - ingenic,jz4760-adc
27 - ingenic,jz4760b-adc
28 - ingenic,jz4770-adc
[all …]
/linux/drivers/hwmon/
H A Dadcxx.c11 * ADC<bb><c>S<sss>, where
18 * http://www.national.com/ds/DC/ADC<bb><c>S<sss>.pdf
52 struct adcxx *adc = spi_get_drvdata(spi); in adcxx_show() local
58 if (mutex_lock_interruptible(&adc->lock)) in adcxx_show()
61 if (adc->channels == 1) { in adcxx_show()
77 value = value * adc->reference >> 12; in adcxx_show()
80 mutex_unlock(&adc->lock); in adcxx_show()
95 struct adcxx *adc = spi_get_drvdata(spi); in adcxx_max_show() local
98 if (mutex_lock_interruptible(&adc->lock)) in adcxx_max_show()
101 reference = adc->reference; in adcxx_max_show()
[all …]
/linux/sound/soc/codecs/
H A Drt5665.c955 SOC_DAPM_ENUM("IF1_1 01 ADC Swap Mux", rt5665_if1_1_01_adc_enum);
958 SOC_DAPM_ENUM("IF1_1 23 ADC Swap Mux", rt5665_if1_1_23_adc_enum);
961 SOC_DAPM_ENUM("IF1_1 45 ADC Swap Mux", rt5665_if1_1_45_adc_enum);
964 SOC_DAPM_ENUM("IF1_1 67 ADC Swap Mux", rt5665_if1_1_67_adc_enum);
967 SOC_DAPM_ENUM("IF1_2 01 ADC Swap Mux", rt5665_if1_2_01_adc_enum);
982 SOC_DAPM_ENUM("IF2_1 ADC Swap Source", rt5665_if2_1_adc_enum);
988 SOC_DAPM_ENUM("IF2_2 ADC Swap Source", rt5665_if2_2_adc_enum);
994 SOC_DAPM_ENUM("IF3 ADC Swap Source", rt5665_if3_adc_enum);
1432 /* ADC Digital Volume Control */
1433 SOC_DOUBLE("STO1 ADC Capture Switch", RT5665_STO1_ADC_DIG_VOL,
[all …]
H A Drt5670.c710 /* ADC Digital Volume Control */
711 SOC_DOUBLE("ADC Capture Switch", RT5670_STO1_ADC_DIG_VOL,
713 SOC_DOUBLE_TLV("ADC Capture Volume", RT5670_STO1_ADC_DIG_VOL,
717 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5670_MONO_ADC_DIG_VOL,
721 /* ADC Boost Volume Control */
722 SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
726 SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
730 SOC_ENUM("ADC IF2 Data Switch", rt5670_if2_adc_enum),
993 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
999 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
[all …]
H A Drt5677.c1022 /* ADC Digital Volume Control */
1031 SOC_DOUBLE("Mono ADC Capture Switch", RT5677_MONO_ADC_DIG_VOL,
1046 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5677_MONO_ADC_DIG_VOL,
1054 /* ADC Boost Volume Control */
1055 SOC_DOUBLE_TLV("STO1 ADC Boost Volume", RT5677_STO1_2_ADC_BST,
1058 SOC_DOUBLE_TLV("STO2 ADC Boost Volume", RT5677_STO1_2_ADC_BST,
1061 SOC_DOUBLE_TLV("STO3 ADC Boost Volume", RT5677_STO3_4_ADC_BST,
1064 SOC_DOUBLE_TLV("STO4 ADC Boost Volume", RT5677_STO3_4_ADC_BST,
1067 SOC_DOUBLE_TLV("Mono ADC Boost Volume", RT5677_ADC_BST_CTRL2,
1533 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5677_ADC_IF_DSP_DAC1_MIXER,
[all …]

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