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/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu_v13_0_6_pmfw.h49 /*8*/ FEATURE_DPM_XGMI = 8,
166 uint64_t GfxclkFrequencyAcc[8];
186 uint64_t XgmiReadBandwidthAcc[8];
187 uint64_t XgmiWriteBandwidthAcc[8];
209 uint32_t GfxclkFrequency[8];
213 uint64_t PublicSerialNumber_XCD[8];
217 uint64_t XgmiReadDataSizeAcc[8];//in KByte
218 uint64_t XgmiWriteDataSizeAcc[8];//in KByte
237 uint32_t GfxBusy[8];
238 uint64_t GfxBusyAcc[8];
[all …]
/linux/Documentation/devicetree/bindings/mips/img/
H A Dxilfpga.txt21 - 8Kbyte RAM at 0x1000_0000
28 - 8Kbyte BootRAM at 0x1FC0_0000
/linux/Documentation/admin-guide/auxdisplay/
H A Dcfag12864b.rst38 :Pages: 8 each controller
41 :Memory size: 2 * 8 * 64 * 1 = 1024 bytes = 1 Kbyte
60 Data 4 ( 6)------------------------------( 8) Data 4
62 Data 6 ( 8)------------------------------(10) Data 6
87 It has a size of 1024 bytes = 1 Kbyte.
/linux/arch/microblaze/kernel/
H A Dvmlinux.lds.S47 . = ALIGN (8) ;
51 . = _fdt_start + 0x10000; /* Pad up to 64kbyte */
66 . = ALIGN(8);
77 . = ALIGN(8);
/linux/Documentation/virt/kvm/devices/
H A Darm-vgic.rst29 This address needs to be 4K aligned and the region covers 4 KByte.
34 This address needs to be 4K aligned and the region covers 8 KByte.
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v10_3_0_cleaner_shader.asm54 s_mov_b32 s2, 0x00000038 // Loop 64/8=8 times (loop unrolled for performance)
69 s_sub_u32 s2, s2, 8
81 …v_mul_u32_u24 v1, 0x00000008, v1 // * 8, so each thread is a double-dword address (8byte)
85 // Each FirstWave of WorkGroup clears 64kbyte block
H A Dgfx_v10_1_10_cleaner_shader.asm55 s_mov_b32 s2, 0x00000038 // Loop 64/8=8 times (loop unrolled for performance)
70 s_sub_u32 s2, s2, 8
82 …v_mul_u32_u24 v1, 0x00000008, v1 // * 8, so each thread is a double-dword address (8byte)
86 // Each FirstWave of WorkGroup clears 64kbyte block
H A Dgfx_v9_4_3_cleaner_shader.asm60 s_mov_b32 s2, 0x00000078 // Loop 128/8=16 times (loop unrolled for performance)
74 s_sub_u32 s2, s2, 8
91 …v_mul_u32_u24 v1, 0x00000008, v1 // * 8, so each thread is a double-dword address (8byt…
95 // Each FirstWave of WorkGroup clears 64kbyte block
/linux/drivers/media/platform/via/
H A Dvia-camera.h21 #define VCR_TSC_COUNT 0x07fff0 /* KByte or packet count */
32 #define VCR_CI_CCIR601_8 0 /* CCIR601 input stream, 8 bit */
33 #define VCR_CI_CCIR656_8 0x00000010 /* ... CCIR656, 8 bit */
87 #define VCR_VS_STRIDE 0x00001ff0 /* Stride (8-byte units) */
/linux/Documentation/networking/
H A Deql.rst194 (Hereafter known as the 8-hour PPP Hate Festival). Perhaps later this
235 From bentson@grieg.seaslug.org Wed Feb 8 19:08:09 1995
264 a 486DX2/66 with a Cyclom-8Ys and a 486SLC/40 with a Cyclom-16Y.
372 transfer of up to 7.5 Kbyte/s on one go, but averaged around
373 6.4 Kbyte/s, which I think is pretty cool. :)
/linux/include/video/
H A Dsticore.h11 #define STI_REGION_MAX 8 /* hardcoded STI constants */
61 u32 offset : 14; /* offset in 4kbyte page */
66 u32 length : 14; /* length in 4kbyte page */
/linux/include/uapi/linux/
H A Dpci_regs.h71 #define PCI_CLASS_REVISION 0x08 /* High 24 bits are class, low 8 revision */
76 #define PCI_CACHE_LINE_SIZE 0x0c /* 8 bits */
77 #define PCI_LATENCY_TIMER 0x0d /* 8 bits */
78 #define PCI_HEADER_TYPE 0x0e /* 8 bits */
85 #define PCI_BIST 0x0f /* 8 bits */
125 #define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
126 #define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
127 #define PCI_MIN_GNT 0x3e /* 8 bits */
128 #define PCI_MAX_LAT 0x3f /* 8 bits */
268 #define PCI_PM_SIZEOF 8
[all …]
/linux/drivers/scsi/
H A Dsr_ioctl.c51 cgc.cmd[8] = 12; /* LSB of length */ in sr_read_tochdr()
86 cgc.cmd[8] = 12; /* LSB of length */ in sr_read_tocentry()
103 tocentry->cdte_addr.lba = (((((buffer[8] << 8) + buffer[9]) << 8) in sr_read_tocentry()
104 + buffer[10]) << 8) + buffer[11]; in sr_read_tocentry()
154 cgc.cmd[8] = trk1_te.cdte_addr.msf.frame; in sr_fake_playtrkind()
174 cgc.cmd[8] = ti->cdti_ind1; in sr_play_trkind()
406 cgc.cmd[8] = 24; in sr_get_mcn()
439 speed *= 177; /* Nx to kbyte/s */ in sr_select_speed()
443 cgc.cmd[2] = (speed >> 8) & 0xff; /* MSB for speed (in kbytes/sec) */ in sr_select_speed()
501 cgc.cmd[4] = (unsigned char) (lba >> 8) & 0xff; in sr_read_cd()
[all …]
/linux/drivers/misc/eeprom/
H A Dat25.c36 #define FM25_SN_LEN 8 /* serial number length */
84 if (off < BIT(at25->addrlen * 8)) in at25_instr()
356 case 8: in at25_fw_to_chip()
419 if (id[8]) { in at25_fram_to_chip()
494 /* For now we only support 8/16/24 bit addressing */ in at25_probe()
528 (at25->chip.byte_len < 1024) ? "Byte" : "KByte", in at25_probe()
/linux/include/linux/
H A Dhyperv.h169 * If the requested ring buffer size is at least 8 times the size of the
174 * The factor of 8 is somewhat arbitrary. The goal is to prevent adding a
178 * on ARM64 with 64 Kbyte page size, we don't want to take 64 Kbytes for the
179 * header from a 128 Kbyte allocation, leaving only 64 Kbytes for the ring.
184 ((payload_sz) >= 8 * sizeof(struct hv_ring_buffer) ? \
254 * 2 . 4 (Windows 8, WS2012)
407 ((struct vmpacket_descriptor)__packet)->offset8 * 8)
411 ((struct vmpacket_descriptor)__packet)->offset8) * 8)
446 CHANNELMSG_GPADL_HEADER = 8,
586 #define GPADL_TYPE_TRANSACTION 8
[all …]
/linux/arch/arm/mm/
H A DKconfig36 A 32-bit RISC processor with 8kByte Cache, Write Buffer and
53 A 32-bit RISC processor with 8KB cache or 4KB variants,
774 Support for the BE-8 (big-endian) mode on ARMv6 and ARMv7 processors.
/linux/drivers/net/wireless/intel/iwlegacy/
H A D4965.h234 * degrees Kelvin = ((97 * 259 * (R4 - R2) / (R3 - R1)) / 100) + 8
238 * Celsius (273 degrees Kelvin). The 8 (3 percent of 273) compensates for
245 #define TEMPERATURE_CALIB_KELVIN_OFFSET 8
310 * If setting up txpowers for MIMO rates (rate idxes 8-15, 24-31),
440 * 8) If setting up txpowers for MIMO rates (rate idxes 8-15, 24-31),
555 * 8 98 0x3d
653 * -8 117 0x3F
669 * 8 110 0x3A
868 #define IL49_NUM_AMPDU_QUEUES 8
931 * Driver must allocate a 4KByte buffer that is used by 4965 for keeping the
[all …]
/linux/drivers/net/ethernet/sgi/
H A Dioc3-eth.c72 /* Every RX buffer starts with 8 byte descriptor data */
231 writel((dev->dev_addr[5] << 8) | in __ioc3_set_mac_address()
236 (dev->dev_addr[1] << 8) | in __ioc3_set_mac_address()
351 csum += 0xffff ^ (u16)((cp[1] << 8) | cp[0]); in ioc3_tcpudp_checksum()
352 csum += 0xffff ^ (u16)((cp[3] << 8) | cp[2]); in ioc3_tcpudp_checksum()
354 csum += 0xffff ^ (u16)((cp[0] << 8) | cp[1]); in ioc3_tcpudp_checksum()
355 csum += 0xffff ^ (u16)((cp[2] << 8) | cp[3]); in ioc3_tcpudp_checksum()
947 netdev_info(dev, "IOC3 SSRAM has %d kbyte.\n", in ioc3eth_probe()
/linux/tools/testing/selftests/net/mptcp/
H A Dmptcp_connect.c277 socklen_t buflen = 8; in sock_test_tcpulp()
278 char buf[8] = ""; in sock_test_tcpulp()
517 xerror("tcp_inq %u is larger than one kbyte\n", inq); in process_cmsg()
/linux/drivers/gpu/drm/i915/display/
H A Dintel_fb.c39 * us a ratio of one byte in the CCS for each 8x16 pixels in the
44 .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, },
46 .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, },
48 .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, .has_alpha = true, },
50 .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, .has_alpha = true, },
52 .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, },
54 .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, },
56 .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, .has_alpha = true, },
58 .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, .has_alpha = true, },
94 .char_per_block = { 8, 1 }, .block_w = { 1, 1 }, .block_h = { 1, 1 },
[all …]
/linux/arch/x86/mm/pat/
H A Dset_memory.c75 #define CPA_NO_CHECK_ALIAS 8 /* Do not search for aliases */
123 seq_printf(m, "DirectMap4k: %8lu kB\n", in arch_report_meminfo()
126 seq_printf(m, "DirectMap2M: %8lu kB\n", in arch_report_meminfo()
129 seq_printf(m, "DirectMap4M: %8lu kB\n", in arch_report_meminfo()
133 seq_printf(m, "DirectMap1G: %8lu kB\n", in arch_report_meminfo()
605 pr_warn("CPA %8s %10s: 0x%016lx - 0x%016lx PFN %lx req %016llx prevent %016llx\n", in check_conflict()
1208 * translations for a 4-KByte range of linear addresses. This in __split_large_page()
/linux/drivers/net/ethernet/sfc/siena/
H A Dmcdi_pcol.h21 #define MC_FW_STATE_SCHED (8)
68 * 0 7 8 16 20 22 23 24 31
99 #define MCDI_HEADER_DATALEN_LBN 8
100 #define MCDI_HEADER_DATALEN_WIDTH 8
112 #define MCDI_HEADER_XFLAGS_WIDTH 8
142 * 0 8 16 24 32
153 * 0 7 8
301 /* We define 8 "escape" commands to allow
372 #define MCDI_EVENT_LEN 8
389 #define MCDI_EVENT_CMDDONE_SEQ_WIDTH 8
[all …]
/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc.h126 // for example, 1080p -> 8K is 4.0, or 4000 raw value
134 // for example, 8K -> 1080p is 0.25, or 250 raw value
1351 #define MATRIX_9C__DIM_128_ALIGNED_LEN 16 // 9+8 : 9 * 8 + 7 * 8 = 72 + 56 = 128 % 128 = 0
1352 #define MATRIX_17C__DIM_128_ALIGNED_LEN 32 //17+15: 17 * 8 + 15 * 8 = 136 + 120 = 256 % 128 = 0
1353 #define MATRIX_33C__DIM_128_ALIGNED_LEN 64 //17+47: 17 * 8 + 47 * 8 = 136 + 376 = 512 % 128 = 0
2215 * for 8b/10b SST.
2217 * return - min hblank size in bytes, 0 if 8b/10b SST.
2513 * @req_bw: The requested bw in Kbyte to allocated
2550 // 8 byte port ID -> ELD.PortID
3133 /* OTG DRR (Dynamic Refresh Rate) Control - 8 fields */
/linux/drivers/net/fddi/
H A Ddefxx.c454 bar_lo <<= 8; in dfx_get_bars()
456 bar_lo <<= 8; in dfx_get_bars()
458 bar_lo <<= 8; in dfx_get_bars()
461 bar_hi <<= 8; in dfx_get_bars()
463 bar_hi <<= 8; in dfx_get_bars()
465 bar_hi <<= 8; in dfx_get_bars()
980 /* Ensure that the burst size is set to 8 longwords or less */ in dfx_bus_config_check()
1070 bp->req_ttrt = 8 * 12500; /* 8ms in 80 nanosec units */ in dfx_driver_init()
1153 * To guarantee the 8K alignment required for the descriptor block, 8K - 1 in dfx_driver_init()
1155 * is now 8K aligned. By carving up the memory in a specific order, in dfx_driver_init()
[all …]
/linux/drivers/block/drbd/
H A Ddrbd_main.c526 * The header size is a multiple of 8, so any payload following the header is
533 BUILD_BUG_ON(!IS_ALIGNED(sizeof(struct p_header100), 8)); in drbd_header_size()
538 BUILD_BUG_ON(!IS_ALIGNED(sizeof(struct p_header80), 8)); in drbd_header_size()
839 return _drbd_send_uuids(peer_device, 8); in drbd_send_uuids_skip_initial_sync()
1169 dcbp_set_pad_bits(p, (8 - bs.cur.bit) & 0x7); in fill_bitmap_rle_bits()
2657 * Setting the max_hw_sectors to an odd value of 8kibyte here. in drbd_create_device()
2661 .max_hw_sectors = DRBD_MAX_BIO_SIZE_SAFE >> 8, in drbd_create_device()
2935 /* aligned 4kByte */
2955 u8 reserved_u8[4096 - (7*8 + 10*4)];
3044 al_stripe_size_4k = MD_32kB_SECT/8; in check_activity_log_stripe_size()
[all …]

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