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/linux/drivers/pinctrl/samsung/
H A Dpinctrl-exynos-arm.c1 // SPDX-License-Identifier: GPL-2.0+
20 #include <linux/soc/samsung/exynos-regs-pmu.h>
22 #include "pinctrl-samsung.h"
23 #include "pinctrl-exynos.h"
49 unsigned int *pud_val = drvdata->pud_val; in s5pv210_pud_value_init()
58 void __iomem *clk_base = (void __iomem *)drvdata->retention_ctrl->priv; in s5pv210_retention_disable()
75 ctrl = devm_kzalloc(drvdata->dev, sizeof(*ctrl), GFP_KERNEL); in s5pv210_retention_init()
77 return ERR_PTR(-ENOMEM); in s5pv210_retention_init()
79 np = of_find_compatible_node(NULL, NULL, "samsung,s5pv210-clock"); in s5pv210_retention_init()
83 return ERR_PTR(-ENODEV); in s5pv210_retention_init()
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dsama5d3_lcd.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * sama5d3_lcd.dtsi - Device Tree Include file for SAMA5D3 SoC with
9 #include <dt-bindings/pinctrl/at91.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
16 compatible = "atmel,sama5d3-hlcdc";
20 clock-names = "periph_clk","sys_clk", "slow_clk";
23 hlcdc-display-controller {
24 compatible = "atmel,hlcdc-display-controller";
25 #address-cells = <1>;
26 #size-cells = <0>;
[all …]
H A Dat91sam9x5_lcd.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9x5_lcd.dtsi - Device Tree Include file for AT91SAM9x5 SoC with an
9 #include <dt-bindings/pinctrl/at91.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
16 compatible = "atmel,at91sam9x5-hlcdc";
20 clock-names = "periph_clk","sys_clk", "slow_clk";
23 hlcdc-display-controller {
24 compatible = "atmel,hlcdc-display-controller";
25 #address-cells = <1>;
26 #size-cells = <0>;
[all …]
/linux/drivers/gpio/
H A Dgpio-zynqmp-modepin.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for the ps-mode pin configuration.
16 #include <linux/firmware/xlnx-zynqmp.h>
18 /* 4-bit boot mode pins */
22 * modepin_gpio_get_value - Get the state of the specified pin of GPIO device
24 * @pin: gpio pin number within the device
26 * This function reads the state of the specified pin of the GPIO device.
28 * Return: 0 if the pin is low, 1 if pin is high, -EINVAL wrong pin configured
31 static int modepin_gpio_get_value(struct gpio_chip *chip, unsigned int pin) in modepin_gpio_get_value() argument
40 /* When [0:3] corresponding bit is set, then read output bit [8:11], in modepin_gpio_get_value()
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H A Dgpiolib-acpi-quirks.c1 // SPDX-License-Identifier: GPL-2.0
17 #include "gpiolib-acpi.h"
19 static int run_edge_events_on_boot = -1;
22 "Run edge _AEI event-handlers at boot: 0=no, 1=yes, -1=auto");
27 "controller@pin combos on which to ignore the ACPI wake flag "
28 "ignore_wake=controller@pin[,controller@pin[,...]]");
33 "controller@pin combos on which to ignore interrupt "
34 "ignore_interrupt=controller@pin[,controller@pin[,...]]");
77 unsigned int pin; in acpi_gpio_in_ignore_list() local
98 len = pin_str - controller; in acpi_gpio_in_ignore_list()
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H A Dgpio-sama5d2-piobu.c1 // SPDX-License-Identifier: GPL-2.0
20 #define PIOBU_NUM 8
37 #define PIOBU_DIRECTION BIT(8)
38 #define PIOBU_OUT BIT(8)
53 * sama5d2_piobu_setup_pin() - prepares a pin for set_direction call
55 * Do not consider pin for tamper detection (normal and backup modes)
56 * Do not consider pin as tamper wakeup interrupt source
58 static int sama5d2_piobu_setup_pin(struct gpio_chip *chip, unsigned int pin) in sama5d2_piobu_setup_pin() argument
63 unsigned int mask = BIT(PIOBU_DET_OFFSET + pin); in sama5d2_piobu_setup_pin()
65 ret = regmap_update_bits(piobu->regmap, PIOBU_BMPR, mask, 0); in sama5d2_piobu_setup_pin()
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/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-lenovo-hr630.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2019-present Lenovo
8 /dts-v1/;
10 #include "aspeed-g5.dtsi"
11 #include <dt-bindings/gpio/aspeed-gpio.h>
15 compatible = "lenovo,hr630-bmc", "aspeed,ast2500";
29 stdout-path = &uart5;
38 reserved-memory {
39 #address-cells = <1>;
40 #size-cells = <1>;
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/linux/Documentation/driver-api/
H A Dpin-control.rst2 PINCTRL (PIN CONTROL) subsystem
5 This document outlines the pin control subsystem in Linux
9 - Enumerating and naming controllable pins
11 - Multiplexing of pins, pads, fingers (etc) see below for details
13 - Configuration of pins, pads, fingers (etc), such as software-controlled
14 biasing and driving mode specific pins, such as pull-up, pull-down, open drain,
17 Top-level interface
22 - A PIN CONTROLLER is a piece of hardware, usually a set of registers, that
26 - PINS are equal to pads, fingers, balls or whatever packaging input or
28 in the range 0..maxpin. This numberspace is local to each PIN CONTROLLER, so
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/linux/arch/arm/boot/dts/samsung/
H A Dexynos3250-artik5.dtsi1 // SPDX-License-Identifier: GPL-2.0
13 #include <dt-bindings/clock/samsung,s2mps11.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
26 stdout-path = &serial_2;
35 compatible = "samsung,secure-firmware";
39 thermal-zones {
40 cpu_thermal: cpu-thermal {
41 cooling-maps {
44 cooling-device = <&cpu0 5 5>,
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H A Ds5pv210-aries.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
32 reserved-memory {
33 #address-cells = <1>;
34 #size-cells = <1>;
38 compatible = "shared-dma-pool";
39 no-map;
44 compatible = "shared-dma-pool";
[all …]
H A Dexynos4210-i9100.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4210 based Galaxy S2 (GT-I9100 version) device tree
11 /dts-v1/;
13 #include "exynos4412-ppmu-common.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/linux-event-codes.h>
19 model = "Samsung Galaxy S2 (GT-I9100)";
21 chassis-type = "handset";
35 stdout-path = "serial2:115200n8";
38 vemmc_reg: regulator-0 {
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H A Ds3c64xx-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 * - pin control-related definitions
8 * Samsung's S3C64xx SoCs pin banks, pin-mux and pin-config options are
12 #include "s3c64xx-pinctrl.h"
16 * Pin banks
19 gpa: gpa-gpio-bank {
20 gpio-controller;
21 #gpio-cells = <2>;
22 interrupt-controller;
23 #interrupt-cells = <2>;
[all …]
H A Dexynos5250-spring.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/clock/samsung,s2mps11.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/input/input.h>
19 chassis-type = "laptop";
33 stdout-path = "serial3:115200n8";
36 gpio-keys {
37 compatible = "gpio-keys";
[all …]
H A Dexynos5250-snow-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/maxim,max77686.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/sound/samsung-i2s.h>
30 stdout-path = "serial3:115200n8";
33 gpio-keys {
34 compatible = "gpio-keys";
35 pinctrl-names = "default";
[all …]
H A Dexynos5422-odroidxu3-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3/XU3-Lite/XU4 boards common device tree source
12 #include <dt-bindings/input/input.h>
13 #include "exynos5422-odroid-core.dtsi"
20 gpio-keys {
21 compatible = "gpio-keys";
22 pinctrl-names = "default";
23 pinctrl-0 = <&power_key>;
25 power-key {
28 * pin (active high) of the S2MPS11 PMIC, which acts
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dsunplus,sp7021-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/pinctrl/sunplus,sp7021-pinctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Sunplus SP7021 Pin Controller
11 - Dvorkin Dmitry <dvorkin@tibbo.com>
12 - Wells Lu <wellslutw@gmail.com>
15 The Sunplus SP7021 pin controller is used to control SoC pins. Please
16 refer to pinctrl-bindings.txt in this directory for details of the common
23 (1) function-group pins:
[all …]
/linux/drivers/net/dsa/mv88e6xxx/
H A Dglobal2_scratch.c1 // SPDX-License-Identifier: GPL-2.0-or-later
22 reg << 8); in mv88e6xxx_g2_scratch_read()
38 u16 value = (reg << 8) | data; in mv88e6xxx_g2_scratch_write()
45 * mv88e6xxx_g2_scratch_get_bit - get a bit
55 int reg = base_reg + (offset / 8); in mv88e6xxx_g2_scratch_get_bit()
70 * mv88e6xxx_g2_scratch_set_bit - set (or clear) a bit
82 int reg = base_reg + (offset / 8); in mv88e6xxx_g2_scratch_set_bit()
100 * mv88e6352_g2_scratch_gpio_get_data - get data on gpio pin
102 * @pin: gpio index
107 unsigned int pin) in mv88e6352_g2_scratch_gpio_get_data() argument
[all …]
/linux/drivers/pinctrl/
H A Dpinctrl-lpc18xx.c18 #include <linux/pinctrl/pinconf-generic.h>
24 #include "pinctrl-utils.h"
32 /* LPC18XX SCU pin register definitions */
40 #define LPC18XX_SCU_PIN_EHD_POS 8
50 #define LPC18XX_SCU_I2C0_SDA_SHIFT 8
52 #define LPC18XX_SCU_FUNC_PER_PIN 8
54 /* LPC18XX SCU pin interrupt select registers */
61 #define LPC18XX_GPIO_PIN_INT_MAX 8
64 ((val) << (((n) % LPC18XX_SCU_IRQ_PER_PINTSEL) * 8))
66 /* LPC18xx pin types */
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/linux/arch/arm64/boot/dts/actions/
H A Ds900-bubblegum-96.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
11 compatible = "ucrobotics,bubblegum-96", "actions,s900";
12 model = "Bubblegum-96";
22 stdout-path = "serial5:115200n8";
31 vcc_3v1: vcc-3v1 {
32 compatible = "regulator-fixed";
33 regulator-name = "fixed-3.1V";
34 regulator-min-microvolt = <3100000>;
35 regulator-max-microvolt = <3100000>;
[all …]
/linux/drivers/pinctrl/uniphier/
H A Dpinctrl-uniphier-core.c1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright (C) 2015-2017 Socionext Inc.
13 #include <linux/pinctrl/pinconf-generic.h>
19 #include "../pinctrl-utils.h"
20 #include "pinctrl-uniphier.h"
49 return priv->socdata->groups_count; in uniphier_pctl_get_groups_count()
57 return priv->socdata->groups[selector].name; in uniphier_pctl_get_group_name()
67 *pins = priv->socdata->groups[selector].pins; in uniphier_pctl_get_group_pins()
68 *num_pins = priv->socdata->groups[selector].num_pins; in uniphier_pctl_get_group_pins()
80 switch (uniphier_pin_get_pull_dir(desc->drv_data)) { in uniphier_pctl_pin_dbg_show()
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/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/
H A Dpincfg.txt1 * Pin configuration nodes
4 - pio-map : array of pin configurations. Each pin is defined by 6
5 integers. The six numbers are respectively: port, pin, dir,
7 - port : port number of the pin; 0-6 represent port A-G in UM.
8 - pin : pin number in the port.
9 - dir : direction of the pin, should encode as follows:
11 0 = The pin is disabled
12 1 = The pin is an output
13 2 = The pin is an input
14 3 = The pin is I/O
[all …]
/linux/drivers/pinctrl/bcm/
H A Dpinctrl-ns2-mux.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * corresponding mfio pin group is selected as gpio.
16 #include <linux/pinctrl/pinconf-generic.h>
22 #include "../pinctrl-utils.h"
87 * Northstar2 mux function and supported pin groups
133 * Pin configuration info
139 * @pull_shift: pull-up/pull-down control bit shift in the register
152 * Description of a pin in Northstar2
154 * @pin: pin number
155 * @name: pin name
[all …]
/linux/Documentation/input/devices/
H A Djoystick-parport.rst3 .. _joystick-parport:
9 :Copyright: |copy| 1998-2000 Vojtech Pavlik <vojtech@ucw.cz>
10 :Copyright: |copy| 1998 Andree Borrmann <a.borrmann@tu-bs.de>
18 Any information in this file is provided as-is, without any guarantee that
36 Many console and 8-bit computer gamepads and joysticks are supported. The
40 ------------
59 for your pads, use either keyboard or joystick port, and make a pass-through
64 some data pin. For most gamepad and parport implementations only one pin is
65 needed, and I'd recommend pin 9 for that, the highest data bit. On the other
67 port, anything between and including pin 4 and pin 9 will work::
[all …]
/linux/Documentation/devicetree/bindings/iio/adc/
H A Dadi,ad7606.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
14 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7605-4.pdf
15 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606_7606-6_7606-4.pdf
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7606B.pdf
17 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606c-16.pdf
18 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606c-18.pdf
19 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7607.pdf
[all …]
H A Dadi,ad4170-4.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/adi,ad4170-4.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices AD4170-4 and similar Analog to Digital Converters
10 - Marcelo Schmitt <marcelo.schmitt@analog.com>
13 Analog Devices AD4170-4 series of Sigma-delta Analog to Digital Converters.
15 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4170-4.pdf
16 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4190-4.pdf
17 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4195-4.pdf
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