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/linux/include/linux/mfd/
H A Dmotorola-cpcap.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * Copyright (C) 2007-2009 Motorola, Inc.
46 #define CPCAP_REG_ASSIGN6 0x0044 /* Resource Assignment 6 */
90 #define CPCAP_REG_S6C 0x062c /* Switcher 6 Control */
151 #define CPCAP_REG_ADCD6 0x0c20 /* A/D Converter Data 6 */
186 #define CPCAP_REG_OWDC 0x0eb0 /* One Wire Device Control */
199 #define CPCAP_REG_GPIO6 0x0ee4 /* GPIO 6 Control */
212 #define CPCAP_REG_OW1C 0x1200 /* One Wire 1 Command */
213 #define CPCAP_REG_OW1D 0x1204 /* One Wire 1 Data */
214 #define CPCAP_REG_OW1I 0x1208 /* One Wire 1 Interrupt */
[all …]
/linux/tools/testing/selftests/drivers/net/hw/
H A Dtso.py2 # SPDX-License-Identifier: GPL-2.0
40 listen_cmd = f"socat -{ipver} -t 2 -u TCP-LISTEN:{port},reuseport /dev/null,ignoreeof"
76 ksft_ge(qstat_new['tx-hw-gso-packet
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/linux/include/linux/platform_data/
H A Dusb-omap1.h15 * - "A" connector (rectagular)
17 * - "B" connector (squarish) or "Mini-B"
19 * - "Mini-AB" connector (very similar to Mini-B)
24 u8 otg; /* port number, 1-based: usb1 == 2 */
35 * 2 == usb0-only, using internal transceiver
36 * 3 == 3 wire bidirectional
37 * 4 == 4 wire bidirectional
38 * 6 == 6 wire unidirectional (or TLL)
/linux/Documentation/devicetree/bindings/input/touchscreen/
H A Dti,am3359-tsc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/input/touchscreen/ti,am3359-tsc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Miquel Raynal <miquel.raynal@bootlin.com>
14 const: ti,am3359-tsc
17 description: Wires refer to application modes i.e. 4/5/8 wire touchscreen
22 ti,x-plate-resistance:
26 ti,coordinate-readouts:
34 maximum: 6
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/linux/drivers/w1/masters/
H A Dsgi_w1.c1 // SPDX-License-Identifier: GPL-2.0
3 * sgi_w1.c - w1 master driver for one wire support in SGI ASICs
13 #include <linux/platform_data/sgi-w1.h>
41 * reset the device on the One Wire interface
49 writel(MCR_PACK(520, 65), dev->mcr); in sgi_w1_reset_bus()
50 ret = sgi_w1_wait(dev->mcr); in sgi_w1_reset_bus()
56 * this is the low level routine to read/write a bit on the One Wire
66 writel(MCR_PACK(6, 13), dev->mcr); in sgi_w1_touch_bit()
68 writel(MCR_PACK(80, 30), dev->mcr); in sgi_w1_touch_bit()
70 ret = sgi_w1_wait(dev->mcr); in sgi_w1_touch_bit()
[all …]
H A Dmxc_w1.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2005-2008 Freescale Semiconductor, Inc. All Rights Reserved.
22 # define MXC_W1_CONTROL_WR(x) BIT(5 - (x))
23 # define MXC_W1_CONTROL_PST BIT(6)
37 * reset the device on the One Wire interface
45 writeb(MXC_W1_CONTROL_RPP, dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_reset_bus()
53 u8 ctrl = readb(dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_reset_bus()
55 /* PST bit is valid after the RPP bit is self-cleared */ in mxc_w1_ds2_reset_bus()
64 * this is the low level routine to read/write a bit on the One Wire
73 writeb(MXC_W1_CONTROL_WR(bit), dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_touch_bit()
[all …]
/linux/fs/smb/server/
H A Dunicode.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 * cifs_mapchar() - convert a host-endian char to proper char in codepage
19 * @from: host-endian source string
73 len = cp->uni2char(src_char, target, NLS_MAX_CHARSET_SIZE); in cifs_mapchar()
81 if (strcmp(cp->charset, "utf8")) in cifs_mapchar()
83 len = utf16s_to_utf8s(from, 3, UTF16_LITTLE_ENDIAN, target, 6); in cifs_mapchar()
95 * smb_utf16_bytes() - compute converted string length
137 * smb_from_utf16() - convert utf16le string to local charset
145 * Convert a little-endian utf16le string (as sent by the server) to a string
153 * Note that some windows versions actually send multiword UTF-16 characters
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/linux/Documentation/devicetree/bindings/clock/
H A Dti,lmk04832.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liam Beguin <liambeguin@gmail.com>
21 - ti,lmk04832
26 '#address-cells':
29 '#size-cells':
32 '#clock-cells':
35 spi-max-frequency:
40 - description: PLL2 reference clock.
[all …]
/linux/arch/sh/include/mach-common/mach/
H A Dhighlander.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 #define PA_SDPOW (-1)
62 #define PA_SMCR (PA_BCR+0x0600) /* 2-wire Serial control */
63 #define PA_SMSMADR (PA_BCR+0x0602) /* 2-wire Serial Slave control */
64 #define PA_SMMR (PA_BCR+0x0604) /* 2-wire Serial Mode control */
65 #define PA_SMSADR1 (PA_BCR+0x0606) /* 2-wire Serial Address1 control */
66 #define PA_SMTRDR1 (PA_BCR+0x0646) /* 2-wire Serial Data1 control */
75 #define PA_POFF (-1)
114 #define PA_SMCR (PA_BCR+0x0500) /* 2-wire Serial control */
115 #define PA_SMSMADR (PA_BCR+0x0502) /* 2-wire Serial Slave control */
[all …]
/linux/Documentation/hwmon/
H A Dasc7621.rst20 Andigilog has both the PECI and pre-PECI versions of the Heceta-6, as
21 Intel calls them. Heceta-6e has high frequency PWM and Heceta-6p has
23 Heceta-6e part and aSC7621 is the Heceta-6p part. They are both in
28 have used registers below 20h for vendor-specific functions in addition
29 to those in the Intel-specified vendor range.
32 The fan speed control uses this finer value to produce a "step-less" fan
33 PWM output. These two bytes are "read-locked" to guarantee that once a
34 high or low byte is read, the other byte is locked-in until after the
37 sheet says 10-bits of resolution, although you may find the lower bits
47 We offer GPIO features on the former VID pins. These are open-drain
[all …]
H A Dlm85.rst52 Datasheet: http://www.smsc.com/media/Downloads_Public/discontinued/6d100.pdf
79 - Philip Pokorny <ppokorny@penguincomputing.com>,
80 - Frodo Looijaard <frodol@dds.nl>,
81 - Richard Barrington <rich_b_nz@clear.net.nz>,
82 - Margit Schubert-While <margitsw@t-online.de>,
83 - Justin Thiessen <jthiessen@penguincomputing.com>
86 -----------
92 The LM85 uses the 2-wire interface compatible with the SMBUS 2.0
94 temperatures and five (5) voltages. It has four (4) 16-bit counters for
127 ----------------
[all …]
H A Dmax31790.rst10 Addresses scanned: -
18 -----------
24 through the I2C interface. The outputs drive "4-wire" fans directly,
28 Tachometer inputs monitor fan tachometer logic outputs for precise (+/-1%)
35 -------------
38 fan[1-12]_input RO fan tachometer speed in RPM
39 fan[1-12]_fault RO fan experienced fault
40 fan[1-6]_target RW desired fan speed in RPM
41 fan[1-6]_enable RW enable or disable the tachometer input
42 pwm[1-6]_enable RW regulator mode, 0=disabled (duty cycle=0%), 1=manual mode, 2=rpm mode
[all …]
/linux/sound/ppc/
H A Dsnd_ps3_reg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
39 * three wire serial
73 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
75 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
81 #define PS3_AUDIO_INTR_0_CHAN6 PS3_AUDIO_INTR_0_CHAN(6)
96 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
98 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
106 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
108 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
125 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
[all …]
/linux/Documentation/devicetree/bindings/iio/addac/
H A Dadi,ad74115.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Cosmin Tanislav <cosmin.tanislav@analog.com>
13 The AD74115H is a single-channel software configurable input/output
17 chip solution with an SPI interface. The device features a 16-bit ADC and a
18 14-bit DAC.
25 - adi,ad74115h
30 spi-max-frequency:
33 spi-cpol: true
[all …]
/linux/drivers/media/dvb-frontends/
H A Dmxl5xx_defs.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * Copyright (c) 2011-2013 MaxLinear, Inc. All rights reserved
29 /* Firmware-Host Command IDs */
31 /* --Device command IDs-- */
37 /* Host-used CMD, not used by firmware */
44 /* --Tuner command IDs-- */
45 MXL_HYDRA_TUNER_TUNE_CMD = 6,
48 /* --Demod command IDs-- */
63 /* --- ABORT channel tune */
66 /* --SWM/FSK command IDs-- */
[all …]
/linux/fs/smb/client/
H A Dcifs_unicode.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MAP_SFM_CHR) in cifs_remap()
21 else if (cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MAP_SPECIAL_CHR) in cifs_remap()
29 /* Convert character using the SFU - "Services for Unix" remapping range */
63 /* Convert character using the SFM - "Services for Mac" remapping range */
68 *target = src_char - 0xF000; in convert_sfm_char()
107 * cifs_mapchar - convert a host-endian char to proper char in codepage
108 * @target - where converted character should be copied
109 * @src_char - 2 byte host-endian source character
110 * @cp - codepage to which character should be converted
[all …]
/linux/Documentation/spi/
H A Dspi-lm70llp.rst2 spi_lm70llp : LM70-LLP parport-to-SPI adapter
15 -----------
27 --------------------
28 The schematic for this particular board (the LM70EVAL-LLP) is
39 D0 2 - -
40 D1 3 --> V+ 5
41 D2 4 --> V+ 5
42 D3 5 --> V+ 5
43 D4 6 --> V+ 5
44 D5 7 --> nCS 8
[all …]
/linux/drivers/iommu/
H A Dirq_remapping.c1 // SPDX-License-Identifier: GPL-2.0-only
35 * With interrupt-remapping, for now we will use virtual wire A in irq_remapping_restore_boot_irq_mode()
36 * mode, as virtual wire B is little complex (need to configure in irq_remapping_restore_boot_irq_mode()
37 * both IOAPIC RTE as well as interrupt-remapping table entry). in irq_remapping_restore_boot_irq_mode()
60 return -EINVAL; in setup_irqremap()
73 else if (!strncmp(str, "nopost", 6)) in setup_irqremap()
96 return (remap_ops->capability & (1 << cap)); in irq_remapping_cap()
103 return -ENOSYS; in irq_remapping_prepare()
115 return -ENOSYS; in irq_remapping_prepare()
124 if (!remap_ops->enable) in irq_remapping_enable()
[all …]
/linux/include/scsi/fc/
H A Dfc_fc2.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Maintained at www.Open-FCoE.org
21 * This format is set by the FC-FS standard and is sent over the wire.
47 * ssb_s_stat - flags from FC-FS-2 T11/1619-D Rev 0.90.
62 #define SSB_ST_P_RJT (1 << 6) /* P_RJT transmitted */
70 * This format is set by the FC-FS standard and is sent over the wire.
92 * esb_e_stat - flags from FC-FS-2 T11/1619-D Rev 0.90.
/linux/arch/arm/boot/dts/st/
H A Dste-nomadik-nhk15.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include "ste-nomadik-stn8815.dtsi"
13 compatible = "st,nomadik-nhk-15";
22 stmpe-i2c0 = &stmpe0;
23 stmpe-i2c1 = &stmpe1;
71 disable-sxtalo;
72 disable-mxtalo;
[all …]
/linux/include/uapi/linux/
H A Dnetfilter_bridge.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
5 /* bridge-specific defines for netfilter.
27 /* Packets about to hit the wire. */
31 #define NF_BR_NUMHOOKS 6
35 NF_BR_PRI_NAT_DST_BRIDGED = -300,
36 NF_BR_PRI_FILTER_BRIDGED = -200,
H A Dnetfilter_ipv6.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 /* IPv6-specific defines for netfilter.
3 * (C)1998 Rusty Russell -- This code is GPL.
6 * it's amazing what adding a bunch of 6s can do =8^)
28 /* Packets about to hit the wire. */
36 NF_IP6_PRI_RAW_BEFORE_DEFRAG = -450,
37 NF_IP6_PRI_CONNTRACK_DEFRAG = -400,
38 NF_IP6_PRI_RAW = -300,
39 NF_IP6_PRI_SELINUX_FIRST = -225,
40 NF_IP6_PRI_CONNTRACK = -200,
[all …]
/linux/arch/arm/mach-omap1/
H A Dusb.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 #include <linux/dma-map-ops.h>
15 #include <linux/soc/ti/omap1-io.h>
24 /* These routines should handle the standard chip-specific modes
27 * Some board-*.c files will need to set up additional mux options,
32 * - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
33 * - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
34 * - 5912 OSK UDC, with *nonstandard* A-to-A cable
35 * - 1510 Innovator UDC with bundled usb0 cable
36 * - 1510 Innovator OHCI with bundled usb1/usb2 cable
[all …]
/linux/drivers/tty/serial/8250/
H A D8250_ni.c1 // SPDX-License-Identifier: GPL-2.0+
7 * for RS-485 transceiver control. This driver implements support for the
10 * Copyright 2012-2023 National Instruments Corporation
31 /* TFS - TX FIFO Size */
33 /* RFS - RX FIFO Size */
36 /* PMR - Port Mode Register */
38 /* PMR[1:0] - Port Capabilities */
41 #define NI16550_PMR_CAP_RS232 FIELD_PREP(NI16550_PMR_CAP_MASK, 1) /* RS-232 capable */
42 #define NI16550_PMR_CAP_RS485 FIELD_PREP(NI16550_PMR_CAP_MASK, 2) /* RS-485 capable */
43 #define NI16550_PMR_CAP_DUAL FIELD_PREP(NI16550_PMR_CAP_MASK, 3) /* dual-port */
[all …]
/linux/drivers/w1/slaves/
H A Dw1_ds2780.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * 1-Wire implementation for the ds2780 chip
7 * Author: Clifton Barnes <cabarnes@indesign-llc.com>
9 * Based on w1-ds2760 driver
51 /* Register 0x1C - 0x1E Reserved */
54 /* Register 0x20 - 0x2F User EEPROM */
56 /* Register 0x30 - 0x5F Reserved */
88 /* Register 0x7D - 0xFF Reserved */
95 #define DS2780_STATUS_REG_AEF (1 << 6)
105 #define DS2780_CONTROL_REG_UVEN (1 << 6)
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