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Searched +full:5 +full:e01000 (Results 1 – 12 of 12) sorted by relevance

/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,sm6115-dpu.yaml61 display-controller@5e01000 {
H A Dqcom,qcm2290-dpu.yaml59 display-controller@5e01000 {
H A Dqcom,qcm2290-mdss.yaml89 display-subsystem@5e00000 {
114 display-controller@5e01000 {
146 dsi@5e94000 {
198 dsi0_phy: phy@5e94400 {
H A Dqcom,sm6125-mdss.yaml84 display-subsystem@5e00000 {
108 display-controller@5e01000 {
150 dsi@5e94000 {
202 phy@5e94400 {
H A Dqcom,sm6115-mdss.yaml86 display-subsystem@5e00000 {
105 display-controller@5e01000 {
138 dsi@5e94000 {
187 dsi0_phy: phy@5e94400 {
H A Dqcom,sm6375-mdss.yaml84 display-subsystem@5e00000 {
105 display-controller@5e01000 {
148 dsi@5e94000 {
201 mdss_dsi0_phy: phy@5e94400 {
/linux/arch/arm64/boot/dts/qcom/
H A Dsm6125.dtsi333 cont_splash_mem: memory@5c000000 {
338 dfps_data_mem: memory@5cf00000 {
343 cdsp_sec_mem: memory@5f800000 {
348 qseecom_mem: memory@5e400000 {
1222 mdss: display-subsystem@5e00000 {
1248 mdss_mdp: display-controller@5e01000 {
1319 mdss_dsi0: dsi@5e94000 {
1387 mdss_dsi0_phy: phy@5e94400 {
1411 dispcc: clock-controller@5f00000 {
1565 frame-number = <5>;
H A Dqcm2290.dtsi283 <5 296>, /* Soundwire master_irq */
356 cont_splash_memory: framebuffer@5c000000 {
361 dfps_data_memory: dpfs-data@5cf00000 {
765 bits = <5 8>;
801 opp-5 {
1314 dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>,
1315 <&gpi_dma0 1 5 QCOM_GPI_I2C>;
1339 dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>,
1340 <&gpi_dma0 1 5 QCOM_GPI_SPI>;
1582 mdss: display-subsystem@5e00000 {
[all …]
H A Dsm6115.dtsi508 cont_splash_memory: memory@5c000000 {
513 dfps_data_memory: memory@5cf00000 {
566 qcom,remote-pid = <5>;
964 bits = <5 8>;
1007 opp-5 {
1568 dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>,
1569 <&gpi_dma0 1 5 QCOM_GPI_I2C>;
1593 dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>,
1594 <&gpi_dma0 1 5 QCOM_GPI_SPI>;
1825 mdss: display-subsystem@5e00000 {
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8188.dtsi379 opp-915000000-5 {
394 opp-950000000-5 {
1635 i2c4: i2c@11e01000 {
H A Dmt8192.dtsi1314 imp_iic_wrap_w: clock-controller@11e01000 {
1760 mediatek,larb-id = <5>;
H A Dmt8195.dtsi610 "vppsys0-4", "vppsys0-5", "vppsys0-6", "vppsys0-7",
647 "vdosys0-4", "vdosys0-5";
1653 bits = <0 5>;
1657 bits = <5 5>;
1665 bits = <0 5>;
1669 bits = <5 5>;
1677 bits = <0 5>;
1681 bits = <5 5>;
1685 bits = <2 5>;
1689 bits = <7 5>;
[all …]