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/linux/arch/arm64/tools/
H A Dsysreg95 Res0 5:1
106 Field 5:4 BANK
110 Sysreg MDSTEPOP_EL1 2 0 0 5 2
127 0b00 TRAP_RW
132 0b00 TRAP_RW
137 0b00 TRAP_RW
142 0b00 TRAP_RW
147 0b00 TRAP_RW
152 0b00 TRAP_RW
157 0b00 TRAP_RW
[all …]
/linux/include/linux/irqchip/
H A Darm-gic-v5.h35 #define GICV5_NON_CACHE 0b00
39 #define GICV5_NON_SHARE 0b00
80 #define GICV5_IRS_IDR2_LPI BIT(5)
104 #define GICV5_IRS_CR1_IC GENMASK(5, 4)
130 #define GICV5_IRS_IST_CFGR_L2SZ GENMASK(6, 5)
136 #define GICV5_IRS_IST_CFGR_ISTSZ_4 0b00
140 #define GICV5_IRS_IST_CFGR_L2SZ_4K 0b00
173 #define GICV5_ITS_IDR1_DEVICEID_BITS GENMASK(5, 0)
179 #define GICV5_ITS_IDR2_XDMN_EVENTs GENMASK(6, 5)
187 #define GICV5_ITS_CR1_IC GENMASK(5, 4)
[all …]
/linux/drivers/zorro/
H A Dzorro.ids43 5a00 A2065 [Ethernet Card]
107 0b00 2400zi [Modem]
319 0b00 Picasso II/II+ RAM [Graphics Card]
360 0b00 Piccolo SD64 [Graphics Card]
414 2140 Phase 5
419 0b00 Blizzard 1230-II/Fastlane Z3/CyberSCSI/CyberStorm060 [Accelerator and/or SCSI Host Adapter]
474 2b00 SRAM [RAM Expansion]
/linux/arch/arm/boot/dts/ti/omap/
H A Domap3430es1-clocks.dtsi33 gfx_cg1_ck: gfx_cg1_ck@b00 {
41 gfx_cg2_ck: gfx_cg2_ck@b00 {
64 fshostusb_fck: clock-fshostusb-fck@5 {
65 reg = <5>;
153 usb_l4_gate_ick: clock-usb-l4-gate-ick@5 {
154 reg = <5>;
H A Domap36xx-am35xx-omap3430es2plus-clocks.dtsi21 clock-div = <5>;
43 sgx_gate_fck: sgx_gate_fck@b00 {
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,spmi-clkdiv.yaml56 clock-controller@5b00 {
/linux/include/uapi/linux/
H A Dcciss_defs.h61 BYTE Mode:2; /* b00 */
69 BYTE Dev:5;
/linux/drivers/usb/host/
H A Docteon-hcd.h201 * * 3'b001: 5 bits
593 * - 2'b00: IN/OUT token
650 * * 5'h0: Non-Periodic TxFIFO flush
651 * * 5'h1: Periodic TxFIFO 1 flush in Device mode or Periodic
653 * * 5'h2: Periodic TxFIFO 2 flush in Device mode
655 * * 5'hF: Periodic TxFIFO 15 flush in Device mode
656 * * 5'h10: Flush all the Periodic and Non-Periodic TxFIFOs in the
746 __BITFIELD_FIELD(u32 txfnum : 5,
807 * * 2'b00: DATA0
1002 * * 2'b00: Reserved. This field yields undefined results.
[all …]
/linux/Documentation/admin-guide/perf/
H A Dhisi-pcie-pmu.rst89 $# perf stat -e hisi_pcie0_core0/rx_mwr_latency,port=0x1/ sleep 5
101 $# perf stat -e hisi_pcie0_core0/rx_mrd_flux,bdf=0x3900/ sleep 5
116 $# perf stat -e hisi_pcie0_core0/rx_mrd_flux,port=0xffff,trig_len=0x4,trig_mode=1/ sleep 5
130 $# perf stat -e hisi_pcie0_core0/rx_mrd_flux,port=0xffff,thr_len=0x4,thr_mode=1/ sleep 5
137 - 2'b00: Reserved (Do not use this since the behaviour is undefined)
148 $# perf stat -e hisi_pcie0_core0/rx_mrd_flux,port=0xffff,len_mode=0x1/ sleep 5
H A Dhisi-pmu.rst56 $# perf stat -a -e hisi_sccl3_l3c0/rd_hit_cpipe/ sleep 5
57 $# perf stat -a -e hisi_sccl3_l3c0/config=0x02/ sleep 5
65 $# perf stat -a -e hisi_sccl3_l3c0/config=0x02,tt_core=0x3/ sleep 5
79 $# perf stat -a -e hisi_sccl3_l3c0/config=0x02,tt_req=0x4/ sleep 5
83 3. Datasrc allows the user to check where the data comes from. It is 5 bits.
86 - 5'b00001: comes from L3C in this die;
87 - 5'b01000: comes from L3C in the cross-die;
88 - 5'b01001: comes from L3C which is in another socket;
89 - 5'b01110: comes from the local DDR;
90 - 5'b01111: comes from the cross-die DDR;
[all …]
/linux/arch/powerpc/boot/dts/
H A Dtqm5200.dts81 gpio_simple: gpio@b00 {
99 3 4 0 3 5 0 3 6 0 3 7 0
131 interrupts = <2 5 0>;
140 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
H A Dcharon.dts84 gpio_simple: gpio@b00 {
103 3 4 0 3 5 0 3 6 0 3 7 0
129 interrupts = <2 5 0>;
138 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
H A Dlite5200.dts114 interrupts = <1 5 0 1 6 0>;
129 gpio@b00 {
161 3 4 0 3 5 0 3 6 0 3 7 0
213 // cell-index = <5>;
222 interrupts = <2 5 0>;
231 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
H A Dmpc5200b.dtsi123 interrupts = <1 5 0 1 6 0>;
138 gpio_simple: gpio@b00 {
172 3 4 0 3 5 0 3 6 0 3 7 0
222 interrupts = <2 5 0>;
230 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
/linux/Documentation/devicetree/bindings/usb/
H A Dam33xx-usb.txt119 &cppi41dma 4 0 &cppi41dma 5 0
127 &cppi41dma 5 1 &cppi41dma 6 1
141 usb1_phy: usb-phy@47401b00 {
/linux/Documentation/arch/m68k/
H A Dbuddha-driver.rst54 $b00-$bff IDE-Select 3 (Port 1, Register set 1)
59 $d00-$dff IDE-Select 5 (Port 3, Register set 1,
131 only the upper three bits are used (Bits 7 to 5). Bit 4
137 The values in this table have to be shifted 5 bits to the
138 left and or'd with $1f (this sets the lower 5 bits).
144 (exactly 70,5 at 14,18 Mhz on PAL systems).
158 355ns Select (5 clock cycles), IOR/IOW after 101ns (1 clock cycle)
161 355ns Select (5 clock cycles), IOR/IOW after 172ns (2 clock cycles)
163 value 5
164 355ns Select (5 clock cycles), IOR/IOW after 243ns (3 clock cycles)
[all …]
/linux/arch/powerpc/boot/dts/fsl/
H A Dp2020ds.dtsi123 nand@5,0 {
155 interrupts = <5 1 0 0>;
159 interrupts = <5 1 0 0>;
186 fsl,tclk-period = <5>;
239 // IDSEL 0x11 func 5 - PCI slot 1
317 compatible = "pnpPNP,b00";
/linux/drivers/iio/accel/
H A Dadxl367.c27 #define ADXL367_STATUS_INACT_MASK BIT(5)
55 #define ADXL367_THRESH_VAL_L_MASK GENMASK(5, 0)
69 #define ADXL367_ACT_LINKLOOP_MASK GENMASK(5, 4)
85 #define ADXL367_INT_INACT_MASK BIT(5)
109 ADXL367_FIFO_MODE_DISABLED = 0b00,
129 ADXL367_OP_STANDBY = 0b00,
138 ADXL367_ACT_DISABLED = 0b00,
/linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dctxnv40.c62 #define CP_FLAG_USER_SAVE ((0 * 32) + 5)
74 #define CP_FLAG_AUTO_LOAD ((3 * 32) + 5)
132 return 5; in nv40_gr_vs_count()
181 cp_ctx(ctx, 0x40057c, 5); in nv40_gr_construct_general()
190 cp_ctx(ctx, 0x400828, 5); in nv40_gr_construct_general()
191 cp_ctx(ctx, 0x400840, 5); in nv40_gr_construct_general()
292 cp_ctx(ctx, 0x4019ac, 5); in nv40_gr_construct_state3d()
330 cp_ctx(ctx, 0x401b18, device->chipset == 0x40 ? 6 : 5); in nv40_gr_construct_state3d()
566 b1_offset = 0x4400/4; /* 0b00 */ in nv40_gr_construct_shader()
570 b1_offset = 0x3f40/4; /* 0b00 : 0a40 */ in nv40_gr_construct_shader()
/linux/drivers/net/ethernet/sun/
H A Dcassini.h45 * DEFAULT: 0x0, SIZE: 5 bits
178 * DEFAULT: 0bxx000, SIZE: 5 bits
233 0b00: RD_PCI_WAT
237 0b00: AD_IDL_RX
242 0b00: WR_PCI_WAT
461 0b00: tx mac req,
533 * 5 TX_COMPLETE_3_LSB
619 #define RX_CFG_COMP_RING_SHIFT 5
659 0b00 = 2k, 0b01 = 4k
671 0b00 = 1k, 0b01 = 2k
[all …]
/linux/arch/arm/boot/dts/socionext/
H A Duniphier-ld4.dtsi114 serial3: serial@54006b00 {
162 clocks = <&peri_clk 5>;
163 resets = <&peri_rst 5>;
242 dmac: dma-controller@5a000000 {
257 sd: mmc@5a400000 {
277 emmc: mmc@5a500000 {
295 usb0: usb@5a800100 {
309 usb1: usb@5a810100 {
323 usb2: usb@5a820100 {
337 syscon@5f800000 {
[all …]
H A Duniphier-sld8.dtsi114 serial3: serial@54006b00 {
166 clocks = <&peri_clk 5>;
167 resets = <&peri_rst 5>;
246 dmac: dma-controller@5a000000 {
261 sd: mmc@5a400000 {
282 emmc: mmc@5a500000 {
300 usb0: usb@5a800100 {
314 usb1: usb@5a810100 {
328 usb2: usb@5a820100 {
342 syscon@5f800000 {
[all …]
/linux/arch/powerpc/include/asm/book3s/64/
H A Dradix.h72 * 0b00......+------------------+
161 " andc %1,%0,%5 \n" in __radix_pte_update()
341 * bits 4 - 5 of rts -> bits 62 - 63 of unsigned long in radix__get_tree_size()
343 rts_field = (0x5UL << 5); /* 6 - 8 bits */ in radix__get_tree_size()
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-msm8926-htc-memul.dts51 unknown@5b00000 {
203 firmware-name = "qcom/msm8926/memul/mba.b00", "qcom/msm8926/memul/modem.mdt";
/linux/drivers/net/ethernet/intel/ice/
H A Dice_protocol_type.h8 /* Each recipe can match up to 5 different fields. Fields to match can be meta-
10 * Therefore, up to 5 recipes can provide intermediate results to another one
12 * results to recipe 5. Note that one of the fields in one of the recipes must
15 #define ICE_NUM_WORDS_RECIPE 5
20 #define ICE_MAX_CHAIN_RECIPE 5
25 /* A recipe can have max 5 words, and 5 recipes can be chained together (using
27 * can be programmed for lookup is 5 * 5 (not including intermediate results).
252 * B = Destination TC of the packet. The TC is relative to a port (5b).
365 * * b00 - normal

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