Searched +full:5 +full:vdc (Results 1 – 10 of 10) sorted by relevance
15 of 5VDC/12VDC burshless fans with built-in tachometers.
45 gpios = <&pm6125_gpios 5 GPIO_ACTIVE_LOW>;127 vdc_12v: regulator-vdc-12v {137 vdc_1v2: regulator-vdc-1v2 {148 vdc_3v3: regulator-vdc-3v3 {158 /* 5V supply stepped down from the barrel jack input */159 vdc_5v: regulator-vdc-5v {170 vdc_vbat_som: regulator-vdc-vbat {
126 vdc_12v: regulator-vdc-12v {136 vdc_1v2: regulator-vdc-1v2 {147 vdc_3v3: regulator-vdc-3v3 {157 /* 5V supply stepped down from the barrel jack input */158 vdc_5v: regulator-vdc-5v {169 vdc_vbat_som: regulator-vdc-vbat {
87 gpios = <&pm8998_gpios 5 GPIO_ACTIVE_HIGH>;244 vdc_3v3: vdc-3v3-regulator {253 vdc_5v: vdc-5v-regulator {702 led@5 {703 reg = <5>;
252 vdc_3v3: vdc-3v3-regulator {261 vdc_5v: vdc-5v-regulator {620 reset-gpios = <&pm8150l_gpios 5 GPIO_ACTIVE_HIGH>;
44 * to the different groups of PowerVR 5-series chip designs282 DRM_DEBUG_KMS("Found aux vdc"); in psb_driver_load()284 /* Couldn't find the aux vdc so map to primary vdc */ in psb_driver_load()
87 /* VDC registers and bits */98 #define _PSB_VSYNC_PIPEB_FLAG (1<<5)130 #define GPIO_CLOCK_PULLUP_DISABLE (1 << 5)183 #define KSEL_BYPASS_19 5409 uint8_t __iomem *aux_reg; /* Auxillary vdc pipe regs */
94 [MSTP74] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR7, 4, 0), /* VDC */120 CLKDEV_ICK_ID("fck", "sh-sci.5", &mstp_clks[MSTP77]),
36 * 5 110Hz 750uV 22.956 #define MPC624_DIO 5 /* read/write to/from digital I/O ports */60 #define MPC624_ADBUSY BIT(5)210 * We always write 0 to GNSWA bit, so the channel range is +-/10.1Vdc in mpc624_ai_insn_read()264 case 5: in mpc624_attach()
647 <https://vdc.epson.com/>1215 Voodoo3 or VSA-100 (aka Voodoo4/5) chips. Say Y if you have