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/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dmicrochip,sparx5-serdes.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/microchip,sparx5-serdes.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Steen Hegelund <steen.hegelund@microchip.com>
21 * Rx built-in fault detector (loss-of-lock/loss-of-signal)
22 * Adjustable tx de-emphasis (FFE)
31 The SERDES6G is a high-speed SERDES interface, which can operate at
34 * 100 Mbps (100BASE-FX)
35 * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
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/freebsd/sys/net/
H A Dif_media.h3 /*-
4 * SPDX-License-Identifier: BSD-4-Clause
43 * Prototypes and definitions for BSD/OS-compatible network interface
67 * In-kernel representation of a single supported media type.
72 int ifm_data; /* for driver-specific use */
73 void *ifm_aux; /* for driver-specific use */
82 int ifm_media; /* current user-set media word */
118 * ---- -------
119 * 0-4 Media variant
120 * 5-7 Media type
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/freebsd/share/misc/
H A Dpci_vendors5 # Date: 2025-10-18 03:15:01
8 # the PCI ID Project at https://pci-ids.ucw.cz/.
14 # (version 2 or higher) or the 3-clause BSD License.
25 # device device_name <-- single tab
26 # subvendor subdevice subsystem_name <-- two tabs
30 # This is a relabelled RTL-8139
31 8139 AT-2500TX V3 Ethernet
41 7a09 PCI-to-PCI Bridge
51 7a19 PCI-to-PCI Bridge
57 7a29 PCI-to-PCI Bridge
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/freebsd/sys/dev/ixl/
H A Dixl_pf_main.c3 Copyright (c) 2013-2018, Intel Corporation
115 "CL108 RS-FEC",
116 "CL74 FC-FEC/BASE-R",
127 * ixl_set_state - Set the specified state
141 * ixl_clear_state - Clear the specified state
155 * ixl_test_state - Test the specified state
170 * ixl_testandset_state - Test and set the specified state
193 u8 oem_ver = (u8)(hw->nvm.oem_ver >> 24); in ixl_nvm_version_str()
194 u16 oem_build = (u16)((hw->nvm.oem_ver >> 16) & 0xFFFF); in ixl_nvm_version_str()
195 u8 oem_patch = (u8)(hw->nvm.oem_ver & 0xFF); in ixl_nvm_version_str()
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/freebsd/sys/dev/axgbe/
H A Dxgbe-phy-v2.c116 #include "xgbe-common.h"
142 /* Rate-change complete wait/retry count */
154 #define XGBE_SFP_PHY_RETRY_MAX 5
230 #define XGBE_SFP_BASE_10GBE_CC_LR BIT(5)
240 #define XGBE_SFP_BASE_100M_CC_FX BIT(5)
275 * Optical specification compliance - denotes wavelength
306 ((_x)->extd[XGBE_SFP_EXTD_SFF_8472] && \
307 !((_x)->extd[XGBE_SFP_EXTD_DIAG] & XGBE_SFP_EXTD_DIAG_ADDR_CHANGE))
314 #define XGBE_BEL_FUSE_VENDOR "BEL-FUSE "
315 #define XGBE_BEL_FUSE_PARTNO "1GBT-SFP06 "
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/freebsd/sys/dev/ixgbe/
H A Dixgbe_82598.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
71 * ixgbe_set_pcie_completion_timeout - set pci-e completion timeout
76 * than the 10ms recommended by the pci-e spec. To address this we need to
113 * ixgbe_init_ops_82598 - Inits func ptrs and MAC type
121 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_init_ops_82598()
122 struct ixgbe_phy_info *phy = &hw->phy; in ixgbe_init_ops_82598()
131 phy->ops.init = ixgbe_init_phy_ops_82598; in ixgbe_init_ops_82598()
134 mac->ops.start_hw = ixgbe_start_hw_82598; in ixgbe_init_ops_82598()
135 mac->ops.enable_relaxed_ordering = ixgbe_enable_relaxed_ordering_82598; in ixgbe_init_ops_82598()
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H A Dixgbe_82599.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
63 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_init_mac_link_ops_82599()
71 if ((mac->ops.get_media_type(hw) == ixgbe_media_type_fiber) && in ixgbe_init_mac_link_ops_82599()
73 mac->ops.disable_tx_laser = in ixgbe_init_mac_link_ops_82599()
75 mac->ops.enable_tx_laser = in ixgbe_init_mac_link_ops_82599()
77 mac->ops.flap_tx_laser = ixgbe_flap_tx_laser_multispeed_fiber; in ixgbe_init_mac_link_ops_82599()
80 mac->ops.disable_tx_laser = NULL; in ixgbe_init_mac_link_ops_82599()
81 mac->ops.enable_tx_laser = NULL; in ixgbe_init_mac_link_ops_82599()
82 mac->ops.flap_tx_laser = NULL; in ixgbe_init_mac_link_ops_82599()
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H A Dif_ix.c3 Copyright (c) 2001-2017, Intel Corporation
48 static const char ixgbe_driver_version[] = "5.0.1-k";
93 "Intel(R) X520-T 82599 LOM"),
105 "Intel(R) X520-1 82599EN (SFP+)"),
107 "Intel(R) X520-4 82599 (Quad SFP+)"),
109 "Intel(R) X520-Q1 82599 (QSFP+)"),
111 "Intel(R) X540-AT2"),
112 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T1, "Intel(R) X540-T1"),
113 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T, "Intel(R) X550-T2"),
114 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T1, "Intel(R) X550-T1"),
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/freebsd/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h2 * Copyright (c) 2017-2018 Cavium, Inc.
78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
80 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
88 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
108 … (0x1<<5) // VGA palette snoo…
109 …CIEIP_REG_PCIEEP_CMD_VPS_E5_SHIFT 5
116 … (0x1<<9) // Fast back-to-back transaction ena…
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/freebsd/sys/dev/bxe/
H A Dbxe_elink.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2007-2017 QLogic Corporation. All rights reserved.
245 #define MDIO_OVER_1G_DIGCTL_3_4_MP_ID_SHIFT 5
430 #define MDIO_PCS_REG_7101_SPI_RESET_BIT (5)
508 /* When this pin is active high during reset, 10GBASE-T core is power
509 * down, When it is active low the 10GBASE-T is power up
774 #define I2C_WA_PWR_ITER (I2C_WA_RETRY_CNT - 1)
892 #define ELINK_SFP_EEPROM_10G_COMP_CODE_LR_MASK (1<<5)
936 (_phy)->def_md_devad, \
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