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Searched +full:576 +full:mhz (Results 1 – 22 of 22) sorted by relevance

/freebsd/sys/contrib/alpine-hal/
H A Dal_hal_serdes_interface.h249 * -3'b000: 684MHz
250 * -3'b001: 576MHz
251 * -3'b010: 514MHz
252 * -3'b011: 435MHz
253 * -3'b100: 354MHz
254 * -3'b101: 281MHz
255 * -3'b110: 199MHz
256 * -3'b111: 125MHz
799 * Switch entire SerDes group to SGMII mode based on 156.25 Mhz reference clock
806 * Switch entire SerDes group to KR mode based on 156.25 Mhz reference clock
/freebsd/sys/dev/qcom_gcc/
H A Dqcom_gcc_ipq4018_clock.c185 * P_FEPLL125 - 125MHz
186 * P_FEPLL125DLY - 125MHz
187 * P_FEPLL200 - 200MHz
188 * "fepll500" - 500MHz
192 * P_DDRPLL - 192MHz
203 * FEPLL - 48MHz (xo) input, 4GHz output
204 * DDRPLL - 48MHz (xo) input, 5.376GHz output
330 { 7372800, "fepll200", QCOM_CLK_FREQTBL_PREDIV_RCG2(1), 576, 15625 },
/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dtegra186-clock.h755 /** fixed 48MHz clock divided down from TEGRA186_CLK_PLL_U */
757 /** fixed 480MHz clock divided down from TEGRA186_CLK_PLL_U */
791 /** fixed 60MHz clock divided down from, TEGRA186_CLK_PLL_U */
827 /** Fixed 100MHz PLL for PCIe, SATA and superspeed USB */
831 /** Fixed 408MHz PLL for use by peripheral clocks */
866 /** Fixed frequency 960MHz PLL for USB and EAVB */
895 #define TEGRA186_CLK_NAFLL_DISP 576
/freebsd/sys/arm/nvidia/drm2/
H A Dtegra_hdmi.c139 { /* 480p/576p / 25.2MHz/27MHz */
148 { /* 720p/1080i / 74.25MHz */
157 { /* 1080p / 148.5MHz */
166 { /* 2216p / 297MHz */
1111 /* 594 MHz is arbitrarily selected value */ in enable_fdt_resources()
/freebsd/sys/contrib/device-tree/src/arm64/allwinner/
H A Dsun50i-h6.dtsi1144 // Forbid the GPU to go over 756MHz
1150 // Forbid the GPU to go over 624MHz
1156 // Forbid the GPU to go over 576MHz
/freebsd/sys/arm/freescale/imx/
H A Dimx_i2c.c125 { 448, 0x36 }, { 480, 0x13 }, { 512, 0x37 }, { 576, 0x14 },
634 * pause() while waiting for transfer-complete. With a 66MHz IPG clock in i2c_reset()
/freebsd/sys/dev/drm2/
H A Ddrm_edid.c56 /* Reported 135MHz pixel clock is too high, needs adjustment */
867 { 720, 576 }, in drm_mode_do_interlace_quirk()
868 { 1440, 576 }, in drm_mode_do_interlace_quirk()
869 { 2880, 576 }, in drm_mode_do_interlace_quirk()
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsc8180x.dtsi50 capacity-dmips-mhz = <602>;
79 capacity-dmips-mhz = <602>;
104 capacity-dmips-mhz = <602>;
128 capacity-dmips-mhz = <602>;
152 capacity-dmips-mhz = <1024>;
176 capacity-dmips-mhz = <1024>;
200 capacity-dmips-mhz = <1024>;
224 capacity-dmips-mhz = <1024>;
666 interrupts = <GIC_SPI 576 IRQ_TYPE_EDGE_RISING>;
H A Dsc7180.dtsi88 capacity-dmips-mhz = <415>;
117 capacity-dmips-mhz = <415>;
141 capacity-dmips-mhz = <415>;
165 capacity-dmips-mhz = <415>;
189 capacity-dmips-mhz = <415>;
213 capacity-dmips-mhz = <415>;
237 capacity-dmips-mhz = <1024>;
261 capacity-dmips-mhz = <1024>;
708 interrupts = <GIC_SPI 576 IRQ_TYPE_EDGE_RISING>;
H A Dsm8150.dtsi57 capacity-dmips-mhz = <488>;
86 capacity-dmips-mhz = <488>;
110 capacity-dmips-mhz = <488>;
134 capacity-dmips-mhz = <488>;
158 capacity-dmips-mhz = <1024>;
182 capacity-dmips-mhz = <1024>;
206 capacity-dmips-mhz = <1024>;
230 capacity-dmips-mhz = <1024>;
806 interrupts = <GIC_SPI 576 IRQ_TYPE_EDGE_RISING>;
H A Dsm8650.dtsi83 capacity-dmips-mhz = <1024>;
116 capacity-dmips-mhz = <1024>;
136 capacity-dmips-mhz = <1792>;
163 capacity-dmips-mhz = <1792>;
183 capacity-dmips-mhz = <1792>;
210 capacity-dmips-mhz = <1792>;
237 capacity-dmips-mhz = <1792>;
264 capacity-dmips-mhz = <1894>;
2793 <GIC_SPI 576 IRQ_TYPE_LEVEL_HIGH>,
H A Dsdm845.dtsi100 capacity-dmips-mhz = <611>;
129 capacity-dmips-mhz = <611>;
153 capacity-dmips-mhz = <611>;
177 capacity-dmips-mhz = <611>;
201 capacity-dmips-mhz = <1024>;
225 capacity-dmips-mhz = <1024>;
249 capacity-dmips-mhz = <1024>;
273 capacity-dmips-mhz = <1024>;
1094 interrupts = <GIC_SPI 576 IRQ_TYPE_EDGE_RISING>;
H A Dsm8550.dtsi77 capacity-dmips-mhz = <1024>;
103 capacity-dmips-mhz = <1024>;
124 capacity-dmips-mhz = <1024>;
145 capacity-dmips-mhz = <1792>;
166 capacity-dmips-mhz = <1792>;
187 capacity-dmips-mhz = <1792>;
208 capacity-dmips-mhz = <1792>;
229 capacity-dmips-mhz = <1894>;
2253 <GIC_SPI 576 IRQ_TYPE_LEVEL_HIGH>,
/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_init_fw_funcs.c49 { 608, 544, 496, 512, 576, 592, 624, 560} /* region 5 offsets */
96 /* Period in 25MHz cycles */
946 /* Period in 25MHz cycles */
H A Dreg_addr.h126 … (0x1<<21) // 66 MHz capable. Not applic…
171 …_66MHZ_CAP_K2 (0x1<<21) // PCI 66MHz Capability.
5445 …MHz core), then the core actually transmits SKP ordered sets once every 1537 symbol times. The val…
7336 … (0x3ff<<0) // The aux_clk frequency in MHz. This value is used…
7339 …MHz. This value is used to provide a 1 us reference for counting time during low-power states with…
8160 … (0x1f<<0) // Counter of 25 MHz clks for the mininu…
8162 … (0xf<<5) // High 4 bits of the 10 bit-counter of 25 MHz clks for the minimu…
8164 … (0x1f<<9) // Counter of 25 MHz clks for the maximu…
8166 … (0x7f<<14) // Counter of 25 MHz clks for the minimu…
8170 …the version.v b00 : lfclk = 25 MHz (default and compatible with older cores) b01 : lfclk = 50 MHz…
[all …]
/freebsd/sys/dev/arcmsr/
H A Darcmsr.h1669 … 1 66 MHz Capable Indication: Returns a 1b when read indicating that bridge …
1851 … 1b 66 MHz Capable (C66): Indicates the secondary interface of the …
2193 ** 05:04 11 (66 MHz) Preserved.
2194 ** 01 (100 MHz)
2195 ** 00 (133 MHz)
2196 ** 03:00 Fh (100 MHz & 66 MHz)
2197 ** 7h (133 MHz)
2202 ** �E Designs with 100 MHz (or lower) Secondary PCI c…
2204 ** �E Designs with 133 MHz Secondary PCI clock power …
2416 ** ** 0 100 MHz
[all …]
/freebsd/sys/gnu/dev/bwn/phy_n/
H A Dif_bwn_phy_n_core.c3999 576 + txpi[i])); in bwn_nphy_tx_power_fix()
4453 bwn_ntab_write(mac, BWN_NTAB32(26, 576 + i), rfpwr_offset); in bwn_nphy_tx_gain_table_upload()
4454 bwn_ntab_write(mac, BWN_NTAB32(27, 576 + i), rfpwr_offset); in bwn_nphy_tx_gain_table_upload()
6529 if (!bwn_is_40mhz(mac)) { /* 20MHz */ in bwn_nphy_channel_setup()
6532 } else { /* 40 MHz */ in bwn_nphy_channel_setup()
6537 if (!bwn_is_40mhz(mac)) { /* 20MHz */ in bwn_nphy_channel_setup()
6540 } else { /* 40MHz */ in bwn_nphy_channel_setup()
H A Dif_bwn_phy_n_tables.c3137 576, 308, -314, 308, 121,
3960 /* XXX 40MHz HT only? No static-40MHz? */ in bwn_nphy_get_gain_ctl_workaround_ent()
/freebsd/sys/dev/cxgb/common/
H A Dcxgb_t3_hw.c3181 t3_write_reg(adap, A_TP_TCP_OPTIONS, V_MTUDEFAULT(576) | in tp_config()
3346 mtus[4] = 576; in init_mtus()
4032 mc7_clock /= 1000000; /* KHz->MHz, ns->us */ in mc7_init()
/freebsd/sys/dev/bnxt/bnxt_en/
H A Dhsi_struct_def.h2704 /* ce_bds_add_data_msg (size:576b/72B) */
14161 /* hwrm_func_vf_cfg_input (size:576b/72B) */
21711 /* 10Mhz sync in frequency. */
21713 /* 25Mhz sync in frequency. */
23785 /* 25MHz SyncE clock profile */
23887 /* 25MHz SyncE clock profile */
38620 /* hwrm_queue_adptv_qos_rx_tuning_qcfg_output (size:576b/72B) */
47246 /* 375 MHz */
47248 /* 625 MHz */
50237 /* hwrm_cfa_pair_alloc_input (size:576b/72B) */
[all …]
/freebsd/crypto/heimdal/lib/wind/
H A Dnormalize_table.c307 {0x2dd, 2, 576}, /* DOUBLE ACUTE ACCENT */
2158 {0x3392, 3, 3604}, /* SQUARE MHZ */
17588 576,
/freebsd/sys/contrib/dev/acpica/
H A Dchanges.txt10939 maximum lengths allowed. (Lin Ming, Bob Moore) BZ 576
17614 Fix "MHz" typo (Dominik Brodowski)