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/linux/arch/parisc/lib/
H A Dlusercopy.S41 1: stbs,ma %r0,1(%sr3,%r26)
131 20: ldb,ma 1(srcspc,src),t1
132 21: stb,ma t1,1(dstspc,dst)
147 12: std,ma t1,8(dstspc,dst)
148 13: std,ma t2,8(dstspc,dst)
152 16: std,ma t1,8(dstspc,dst)
153 17: std,ma t2,8(dstspc,dst)
169 20: ldw,ma 4(srcspc,src),t1
170 21: stw,ma t1,4(dstspc,dst)
172 ldo -4(len),len
[all …]
/linux/arch/parisc/include/asm/
H A Dchecksum.h22 * Optimized for IP headers, which always checksum on 4 octet boundaries.
33 " ldws,ma 4(%1), %0\n" in ip_fast_csum()
34 " addib,<= -4, %2, 2f\n" in ip_fast_csum()
36 " ldws 4(%1), %4\n" in ip_fast_csum()
38 " add %0, %4, %0\n" in ip_fast_csum()
39 " ldws,ma 12(%1), %3\n" in ip_fast_csum()
42 "1: ldws,ma 4(%1), %3\n" in ip_fast_csum()
46 " extru %0, 31, 16, %4\n" in ip_fast_csum()
48 " addc %4, %5, %0\n" in ip_fast_csum()
126 ** Try to keep 4 registers with "live" values ahead of the ALU. in csum_ipv6_magic()
[all …]
H A Dassembly.h22 #define REG_SZ 4
63 #define STREGM std,ma
278 fstd,ma %fr0, 8(\regs)
279 fstd,ma %fr1, 8(\regs)
280 fstd,ma %fr2, 8(\regs)
281 fstd,ma %fr3, 8(\regs)
282 fstd,ma %fr4, 8(\regs)
283 fstd,ma %fr5, 8(\regs)
284 fstd,ma %fr6, 8(\regs)
285 fstd,ma %fr7, 8(\regs)
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H A Dbarrier.h41 asm volatile("stb,ma %0,0(%1)" \
46 asm volatile("sth,ma %0,0(%1)" \
50 case 4: \
51 asm volatile("stw,ma %0,0(%1)" \
57 asm volatile("std,ma %0,0(%1)" \
71 asm volatile("ldb,ma 0(%1),%0" \
76 asm volatile("ldh,ma 0(%1),%0" \
80 case 4: \
81 asm volatile("ldw,ma 0(%1),%0" \
87 asm volatile("ldd,ma 0(%1),%0" \
/linux/Documentation/devicetree/bindings/sound/
H A Dfsl,sgtl5000.yaml44 values of 2k, 4k or 8k. If set to 0 it will be off. If this node is not
46 4k.
47 enum: [ 0, 2, 4, 8 ]
63 1 = 1.66 mA 2.87 mA 4.02 mA
64 2 = 3.33 mA 5.74 mA 8.03 mA
65 3 = 4.99 mA 8.61 mA 12.05 mA
76 1 = 1.66 mA 2.87 mA 4.02 mA
77 2 = 3.33 mA 5.74 mA 8.03 mA
78 3 = 4.99 mA 8.61 mA 12.05 mA
/linux/Documentation/devicetree/bindings/power/supply/
H A Dti,lp8727.yaml45 0 = 5%, 1 = 10%, 2 = 16%, 3 = 20%, 4 = 25%, 5 = 33%, 6 = 50%
53 0 = 90mA, 1 = 100mA, 2 = 400mA, 3 = 450mA, 4 = 500mA, 5 = 600mA,
54 6 = 700mA, 7 = 800mA, 8 = 900mA, 9 = 1000mA
76 /* AC charger: 5% EOC and 500mA charging current */
80 charging-current = /bits/ 8 <4>;
83 /* USB charger: 10% EOC and 400mA charging current */
/linux/arch/riscv/crypto/
H A Daes-riscv64-zvkned-zvbb-zvkg.S66 #define TWEAKS v16 // LMUL=4 (most of the time)
67 #define TWEAKS_BREV v20 // LMUL=4 (most of the time)
68 #define MULTS_BREV v24 // LMUL=4 (most of the time)
92 vsetivli zero, 4, e32, m1, ta, ma
109 vsetvli VL, LEN32, e32, m4, ta, ma
113 vsetvli zero, t0, e32, m1, ta, ma
119 vsetvli zero, t0, e64, m2, ta, ma
123 vsetvli zero, t1, e32, m2, ta, ma
131 vsetvli zero, LEN32, e32, m4, ta, ma
143 vsetivli zero, 2, e64, m1, ta, ma
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/linux/arch/sh/kernel/
H A Dtraps_32.c35 # define TRAP_RESERVED_INST 4
104 struct mem_access *ma) in handle_unaligned_ins() argument
114 index = (instruction>>4)&15; /* 0x00F0 */ in handle_unaligned_ins()
122 case 4: inc_unaligned_dword_access(); break; in handle_unaligned_ins()
137 dst += 4-count; in handle_unaligned_ins()
139 if (ma->from(dst, srcu, count)) in handle_unaligned_ins()
147 src += 4-count; in handle_unaligned_ins()
152 if (ma->to(dstu, src, count)) in handle_unaligned_ins()
163 if (ma->to(dstu, src, 4)) in handle_unaligned_ins()
169 if (instruction & 4) in handle_unaligned_ins()
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/linux/include/linux/platform_data/
H A Dadp8870.h34 #define ADP8870_LED_D4 (4)
45 #define ADP8870_BL_D5 (1 << 4)
55 #define ADP8870_FADE_T_1200ms 4
77 #define ADP8870_BL_AMBL_FILT_1280ms 4
83 * Blacklight current 0..30mA
118 u8 l1_daylight_max; /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
119 u8 l1_daylight_dim; /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
120 u8 l2_bright_max; /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
121 u8 l2_bright_dim; /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
122 u8 l3_office_max; /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
[all …]
H A Dadp8860.h37 #define ADP8860_LED_D4 (4)
48 #define ADP8860_BL_D5 (1 << 4)
58 #define ADP8860_FADE_T_1200ms 4
80 #define ADP8860_BL_AMBL_FILT_1280ms 4
86 * Blacklight current 0..30mA
110 u8 l1_daylight_max; /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
111 u8 l1_daylight_dim; /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
112 u8 l2_office_max; /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
113 u8 l2_office_dim; /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
114 u8 l3_dark_max; /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
[all …]
H A Dsi5351.h37 * @SI5351_CLKOUT_SRC_MSYNTH_0_4: clkout N source clock is multisynth 0 (N<4)
38 * or 4 (N>=4)
47 SI5351_CLKOUT_SRC_CLKIN = 4,
53 * @SI5351_DRIVE_2MA: 2mA clock output drive strength
54 * @SI5351_DRIVE_4MA: 4mA clock output drive strength
55 * @SI5351_DRIVE_6MA: 6mA clock output drive strength
56 * @SI5351_DRIVE_8MA: 8mA clock output drive strength
61 SI5351_DRIVE_4MA = 4,
/linux/kernel/bpf/
H A Dmemalloc.c44 4, /* 24 */
45 4, /* 32 */
457 * 64*16 + 64*32 + 64*64 + 64*96 + 64*128 + 64*196 + 64*256 + 32*512 + 16*1024 + 8*2048 + 4*4096
477 /* When page_size == 4k, order-0 cache will have low_mark == 2 in init_refill_work()
485 c->batch = max((c->high_watermark - c->low_watermark) / 4 * 3, 1); in init_refill_work()
493 * 1st run of bpf prog won't be doing more than 4 map_update_elem from in prefill_mem_cache()
498 cnt = 4; in prefill_mem_cache()
509 int bpf_mem_alloc_init(struct bpf_mem_alloc *ma, int size, bool percpu) in bpf_mem_alloc_init() argument
522 ma->percpu = percpu; in bpf_mem_alloc_init()
537 ma->objcg = objcg; in bpf_mem_alloc_init()
[all …]
/linux/arch/parisc/kernel/
H A Drelocate_kernel.S65 ldo 4(%r1),%r1
79 LDREG,ma REG_SZ(%arg0), %r3
107 LDREG,ma REG_SZ(%r21), %r8
108 LDREG,ma REG_SZ(%r21), %r9
109 LDREG,ma REG_SZ(%r21), %r10
110 LDREG,ma REG_SZ(%r21), %r11
111 STREG,ma %r8, REG_SZ(%r20)
112 STREG,ma %r9, REG_SZ(%r20)
113 STREG,ma %r10, REG_SZ(%r20)
114 STREG,ma %r11, REG_SZ(%r20)
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Dphy-stm32-usbphyc.yaml129 - <0> = 18.87 mA target current / nominal + 0%
130 - <1> = 19.165 mA target current / nominal + 1.56%
131 - <2> = 19.46 mA target current / nominal + 3.12%
132 - <3> = 19.755 mA target current / nominal + 4.68%
133 - <4> = 20.05 mA target current / nominal + 6.24%
134 - <5> = 20.345 mA target current / nominal + 7.8%
135 - <6> = 20.64 mA target current / nominal + 9.36%
136 - <7> = 20.935 mA target current / nominal + 10.92%
137 - <8> = 21.23 mA target current / nominal + 12.48%
138 - <9> = 21.525 mA target current / nominal + 14.04%
[all …]
/linux/Documentation/leds/
H A Dleds-lm3556.rst22 from 93.75 mA to 1500 mA.The Flash currents are adjusted via the CURRENT
37 93.75 mA::
43 1500 mA::
64 46.88 mA::
70 375 mA::
78 and 4 patterns are pre-defined in indicator_pattern array.
107 5.86 mA::
113 46.875mA::
136 board_register_i2c_bus(4, 400,
/linux/Documentation/devicetree/bindings/iio/dac/
H A Dadi,ad5755.yaml86 4: 4 mA to 20 mA current range.
87 5: 0 mA to 20 mA current range.
88 6: 0 mA to 24 mA current range.
108 - enum: [64000, 32000, 16000, 8000, 4000, 2000, 1000, 500, 250, 125, 64, 32, 16, 8, 4, 0]
109 - enum: [1, 2, 4, 16, 32, 64, 128, 256]
145 adi,mode = <4>;
151 adi,mode = <4>;
157 adi,mode = <4>;
163 adi,mode = <4>;
/linux/include/linux/iio/dac/
H A Dad5421.h7 * @AD5421_CURRENT_RANGE_4mA_20mA: 4 mA to 20 mA (RANGE1,0 pins = 00)
8 * @AD5421_CURRENT_RANGE_3mA8_21mA: 3.8 mA to 21 mA (RANGE1,0 pins = x1)
9 * @AD5421_CURRENT_RANGE_3mA2_24mA: 3.2 mA to 24 mA (RANGE1,0 pins = 10)
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dumc_v12_0.c42 umc_inst = index / 4; in get_umc_v12_0_reg_offset()
43 ch_inst = index % 4; in get_umc_v12_0_reg_offset()
61 WREG32_PCIE_EXT((odecc_err_cnt_addr + umc_reg_offset) * 4, in umc_v12_0_reset_error_count_per_channel()
130 RREG64_PCIE_EXT((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v12_0_query_error_count_per_type()
184 err_addr = addr_in->ma.err_addr; in umc_v12_0_convert_error_address()
213 "Error Address(PA):0x%-10llx Row:0x%-4x Col:0x%-2x Bank:0x%x Channel:0x%x\n", in umc_v12_0_convert_error_address()
216 retired_page, channel_index, addr_in->ma.umc_inst); in umc_v12_0_convert_error_address()
221 "Error Address(PA):0x%-10llx Row:0x%-4x Col:0x%-2x Bank:0x%x Channel:0x%x\n", in umc_v12_0_convert_error_address()
224 retired_page, channel_index, addr_in->ma.umc_inst); in umc_v12_0_convert_error_address()
255 "Error Address(PA):0x%-10llx Row:0x%-4x Col:0x%-2x Bank:0x%x Channel:0x%x\n", in umc_v12_0_dump_addr_info()
[all …]
/linux/include/linux/mfd/
H A Dadp5520.h71 #define ADP5520_OVP_INT (1 << 4)
81 #define ADP5520_AUTO_LD_EN (1 << 4)
92 #define ADP5520_BL_LAW ((x) << 4)
108 #define FADE_VAL(in, out) ((0xF & (in)) | ((0xF & (out)) << 4))
109 #define BL_CTRL_VAL(law, auto) (((1 & (auto)) << 3) | ((0x3 & (law)) << 4))
123 #define ADP5520_C3_MODE (1 << 4)
138 #define ADP5520_GPIO_C0 (1 << 4)
159 #define ADP5520_COL_C0 (1 << 4)
165 #define ADP5520_KEY(row, col) (col + row * 4)
211 #define ADP5520_FADE_T_1200ms 4
[all …]
/linux/drivers/pinctrl/uniphier/
H A Dpinctrl-uniphier.h60 UNIPHIER_PIN_DRV_1BIT, /* 2 level control: 4/8 mA */
61 UNIPHIER_PIN_DRV_2BIT, /* 4 level control: 8/12/16/20 mA */
62 UNIPHIER_PIN_DRV_3BIT, /* 8 level control: 4/5/7/9/11/12/14/16 mA */
63 UNIPHIER_PIN_DRV_FIXED4, /* fixed to 4mA */
64 UNIPHIER_PIN_DRV_FIXED5, /* fixed to 5mA */
65 UNIPHIER_PIN_DRV_FIXED8, /* fixed to 8mA */
/linux/drivers/phy/mediatek/
H A Dphy-mtk-hdmi-mt8195.c117 case 4: in mtk_hdmi_pll_set_hw()
167 case 4: in mtk_hdmi_pll_set_hw()
214 u8 txpredivs[4] = { 2, 4, 6, 12 }; in mtk_hdmi_pll_calc()
234 * 54M <= TMDS clk < 148.35M /4 in mtk_hdmi_pll_calc()
241 txposdiv = 4; in mtk_hdmi_pll_calc()
249 /* calculate txprediv: can be 2, 4, 6, 12 in mtk_hdmi_pll_calc()
313 * data channel bias 24mA, clock channel bias 20mA in mtk_hdmi_pll_drv_setting()
316 * data channel 20mA, clock channel 16mA in mtk_hdmi_pll_drv_setting()
318 * data channel & clock channel bias 10mA in mtk_hdmi_pll_drv_setting()
323 data_channel_bias = 0x3c; /* 24mA */ in mtk_hdmi_pll_drv_setting()
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dti,lmk04832.yaml49 ti,spi-4wire-rdbk:
51 Select SPI 4wire readback pin configuration.
92 enum: [1, 2, 4, 8]
93 default: 4
114 HSDS 6 mA 0x02
115 HSDS 8 mA 0x03
119 CML 16 mA 0x07
120 CML 24 mA 0x08
121 CML 32 mA 0x09
182 ti,spi-4wire-rdbk = <0>;
[all …]
/linux/include/linux/usb/
H A Dpd.h19 PD_CTRL_REJECT = 4,
44 PD_DATA_SINK_CAP = 4,
59 PD_EXT_GET_BATT_STATUS = 4,
233 #define PDO_FIXED_CURR_SHIFT 0 /* 10mA units */
236 #define PDO_FIXED_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_FIXED_CURR_SHIFT) argument
238 #define PDO_FIXED(mv, ma, flags) \ argument
240 PDO_FIXED_VOLT(mv) | PDO_FIXED_CURR(ma))
258 #define PDO_VAR_MAX_CURR_SHIFT 0 /* 10mA units */
262 #define PDO_VAR_MAX_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_VAR_MAX_CURR_SHIFT) argument
279 #define PDO_PPS_APDO_MAX_CURR_SHIFT 0 /* 50mA units */
[all …]
/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu13_driver_if_yellow_carp.h29 #define SMU13_YELLOW_CARP_DRIVER_IF_VERSION 4
60 #define NUM_WM_RANGES 4
109 #define NUM_DF_PSTATE_LEVELS 4
148 #define THROTTLER_STATUS_BIT_THM_CORE 4
170 uint16_t Current[2]; //[mA] indices: VDDCR_VDD, VDDCR_SOC
190 uint16_t VddTdcValue; //[mA]
191 uint16_t SocTdcValue; //[mA]
192 uint16_t VddEdcValue; //[mA]
193 uint16_t SocEdcValue; //[mA]
207 #define WORKLOAD_PPLIB_COMPUTE_BIT 4
[all …]
H A Dsmu12_driver_if.h61 #define NUM_WM_RANGES 4
107 #define NUM_FCLK_DPM_LEVELS 4
108 #define NUM_MEMCLK_DPM_LEVELS 4
161 #define THROTTLER_STATUS_BIT_THM_CORE 4
183 uint16_t Current[2]; //[mA] indices: VDDCR_VDD, VDDCR_SOC
205 uint16_t VddTdcValue; //[mA]
206 uint16_t SocTdcValue; //[mA]
207 uint16_t VddEdcValue; //[mA]
208 uint16_t SocEdcValue; //[mA]
217 #define WORKLOAD_PPLIB_COMPUTE_BIT 4
[all …]

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