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/linux/arch/x86/lib/
H A Datomic64_386_32.S27 IRQ_SAVE v;
32 IRQ_RESTORE v; \
35 #define v %ecx macro
37 movl (v), %eax
38 movl 4(v), %edx
41 #undef v
43 #define v %esi macro
45 movl %ebx, (v)
46 movl %ecx, 4(v)
49 #undef v
[all …]
/linux/drivers/staging/media/sunxi/sun6i-isp/
H A Dsun6i_isp_reg.h21 #define SUN6I_ISP_FE_CFG_SRC0_MODE(v) (((v) << 8) & GENMASK(9, 8)) argument
22 #define SUN6I_ISP_FE_CFG_SRC1_MODE(v) (((v) << 16) & GENMASK(17, 16)) argument
29 #define SUN6I_ISP_FE_CTRL_LENS_UPDATE BIT(4)
33 #define SUN6I_ISP_FE_CTRL_OUTPUT_SPEED_CTRL(v) (((v) << 16) & GENMASK(17, 16)) argument
41 #define SUN6I_ISP_FE_INT_EN_SRC0_FIFO BIT(4)
52 #define SUN6I_ISP_FE_INT_STA_SRC0_FIFO BIT(4)
82 #define SUN6I_ISP_MODULE_EN_BDNF BIT(4)
104 #define SUN6I_ISP_MODE_INPUT_FMT(v) ((v) & GENMASK(2, 0)) argument
105 #define SUN6I_ISP_MODE_INPUT_YUV_SEQ(v) (((v) << 3) & GENMASK(4, 3)) argument
106 #define SUN6I_ISP_MODE_OTF_DPC(v) (((v) << 16) & BIT(16)) argument
[all …]
/linux/arch/microblaze/lib/
H A Dfastcopy.S43 addi r4, r0, 4 /* n = 4 */
51 /* n = 4 - n (yields 3, 2, 1 transfers for 1, 2, 3 addr offset) */
52 rsubi r4, r4, 4
81 lwi r10, r6, 4 /* t2 = *(s + 4) */
85 swi r10, r5, 4 /* *(d + 4) = t2 */
115 lwi r12, r8, 4 /* v = *(as + 4) */
116 bsrli r9, r12, 8 /* t1 = v >> 8 */
119 bslli r11, r12, 24 /* h = v << 24 */
120 lwi r12, r8, 8 /* v = *(as + 8) */
121 bsrli r9, r12, 8 /* t1 = v >> 8 */
[all …]
/linux/arch/powerpc/lib/
H A Dxor_vmx.c24 #define DEFINE(V) \ argument
25 unative_t *V = (unative_t *)V##_in; \
26 unative_t V##_0, V##_1, V##_2, V##_3
28 #define LOAD(V) \ argument
30 V##_0 = V[0]; \
31 V##_1 = V[1]; \
32 V##_2 = V[2]; \
33 V##_3 = V[3]; \
36 #define STORE(V) \ argument
38 V[0] = V##_0; \
[all …]
/linux/lib/crypto/arm/
H A Dblake2s-core.S32 ldr \b, [\src, #\offset + 4]
41 str \b, [\dst, #\offset + 4]
73 ldr M_0, [sp, #32 + 4 * \s0]
74 ldr M_1, [sp, #32 + 4 * \s2]
94 ldr M_0, [sp, #32 + 4 * \s1]
95 ldr M_1, [sp, #32 + 4 * \s3]
116 // Execute one round of BLAKE2s by updating the state matrix v[0..15]. v[0..9]
118 // spilling v[8..9], then to v[9..15], then to the message block. r10-r12 and
135 // (v[0], v[4], v[8], v[12]) and (v[1], v[5], v[9], v[13]).
136 __ldrd r10, r11, sp, 16 // load v[12] and v[13]
[all …]
/linux/lib/crypto/
H A Dblake2s.c20 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
21 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
22 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
23 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
24 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
25 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
26 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 },
27 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 },
28 { 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5 },
29 { 10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13, 0 },
[all …]
/linux/drivers/staging/media/sunxi/cedrus/
H A Dcedrus_regs.h13 #define SHIFT_AND_MASK_BITS(v, h, l) \ argument
14 (((unsigned long)(v) << (l)) & GENMASK(h, l))
76 #define VE_PRIMARY_OUT_FMT_TILED_32_NV12 (0x00 << 4)
77 #define VE_PRIMARY_OUT_FMT_TILED_128_NV12 (0x01 << 4)
78 #define VE_PRIMARY_OUT_FMT_YU12 (0x02 << 4)
79 #define VE_PRIMARY_OUT_FMT_YV12 (0x03 << 4)
80 #define VE_PRIMARY_OUT_FMT_NV12 (0x04 << 4)
81 #define VE_PRIMARY_OUT_FMT_NV21 (0x05 << 4)
96 #define VE_DEC_MPEG_MP12HDR_F_CODE_SHIFT(x, y) (24 - 4 * (y) - 8 * (x))
104 #define VE_DEC_MPEG_MP12HDR_TOP_FIELD_FIRST(v) \ argument
[all …]
/linux/tools/testing/selftests/rseq/
H A Drseq-arm64-bits.h15 int RSEQ_TEMPLATE_IDENTIFIER(rseq_cmpeqv_storev)(intptr_t *v, intptr_t expect, intptr_t newv, int c… in RSEQ_TEMPLATE_IDENTIFIER()
20 RSEQ_ASM_DEFINE_TABLE(1, 2f, 3f, 4f) in RSEQ_TEMPLATE_IDENTIFIER()
27 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f) in RSEQ_TEMPLATE_IDENTIFIER()
29 RSEQ_ASM_OP_CMPEQ(v, expect, %l[cmpfail]) in RSEQ_TEMPLATE_IDENTIFIER()
30 RSEQ_INJECT_ASM(4) in RSEQ_TEMPLATE_IDENTIFIER()
33 RSEQ_ASM_OP_CMPEQ(v, expect, %l[error2]) in RSEQ_TEMPLATE_IDENTIFIER()
35 RSEQ_ASM_OP_FINAL_STORE(newv, v, 3) in RSEQ_TEMPLATE_IDENTIFIER()
37 RSEQ_ASM_DEFINE_ABORT(4, abort) in RSEQ_TEMPLATE_IDENTIFIER()
42 [v] "Qo" (*v), in RSEQ_TEMPLATE_IDENTIFIER()
72 int RSEQ_TEMPLATE_IDENTIFIER(rseq_cmpnev_storeoffp_load)(intptr_t *v, intptr_t expectnot, in RSEQ_TEMPLATE_IDENTIFIER()
[all …]
H A Drseq-riscv-bits.h9 int RSEQ_TEMPLATE_IDENTIFIER(rseq_cmpeqv_storev)(intptr_t *v, intptr_t expect, intptr_t newv, int c… in RSEQ_TEMPLATE_IDENTIFIER()
13 __asm__ __volatile__ goto(RSEQ_ASM_DEFINE_TABLE(1, 2f, 3f, 4f) in RSEQ_TEMPLATE_IDENTIFIER()
20 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f) in RSEQ_TEMPLATE_IDENTIFIER()
22 RSEQ_ASM_OP_CMPEQ(v, expect, "%l[cmpfail]") in RSEQ_TEMPLATE_IDENTIFIER()
23 RSEQ_INJECT_ASM(4) in RSEQ_TEMPLATE_IDENTIFIER()
26 RSEQ_ASM_OP_CMPEQ(v, expect, "%l[error2]") in RSEQ_TEMPLATE_IDENTIFIER()
28 RSEQ_ASM_OP_FINAL_STORE(newv, v, 3) in RSEQ_TEMPLATE_IDENTIFIER()
30 RSEQ_ASM_DEFINE_ABORT(4, abort) in RSEQ_TEMPLATE_IDENTIFIER()
35 [v] "m" (*v), in RSEQ_TEMPLATE_IDENTIFIER()
62 int RSEQ_TEMPLATE_IDENTIFIER(rseq_cmpnev_storeoffp_load)(intptr_t *v, intptr_t expectnot, in RSEQ_TEMPLATE_IDENTIFIER()
[all …]
H A Drseq-ppc-bits.h15 int RSEQ_TEMPLATE_IDENTIFIER(rseq_cmpeqv_storev)(intptr_t *v, intptr_t expect, intptr_t newv, int c… in RSEQ_TEMPLATE_IDENTIFIER()
20 RSEQ_ASM_DEFINE_TABLE(3, 1f, 2f, 4f) /* start, commit, abort */ in RSEQ_TEMPLATE_IDENTIFIER()
29 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f) in RSEQ_TEMPLATE_IDENTIFIER()
31 /* cmp @v equal to @expect */ in RSEQ_TEMPLATE_IDENTIFIER()
32 RSEQ_ASM_OP_CMPEQ(v, expect, %l[cmpfail]) in RSEQ_TEMPLATE_IDENTIFIER()
33 RSEQ_INJECT_ASM(4) in RSEQ_TEMPLATE_IDENTIFIER()
37 /* cmp @v equal to @expect */ in RSEQ_TEMPLATE_IDENTIFIER()
38 RSEQ_ASM_OP_CMPEQ(v, expect, %l[error2]) in RSEQ_TEMPLATE_IDENTIFIER()
41 RSEQ_ASM_OP_FINAL_STORE(newv, v, 2) in RSEQ_TEMPLATE_IDENTIFIER()
43 RSEQ_ASM_DEFINE_ABORT(4, abort) in RSEQ_TEMPLATE_IDENTIFIER()
[all …]
H A Drseq-mips-bits.h14 int RSEQ_TEMPLATE_IDENTIFIER(rseq_cmpeqv_storev)(intptr_t *v, intptr_t expect, intptr_t newv, int c… in RSEQ_TEMPLATE_IDENTIFIER()
19 RSEQ_ASM_DEFINE_TABLE(9, 1f, 2f, 4f) /* start, commit, abort */ in RSEQ_TEMPLATE_IDENTIFIER()
27 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f) in RSEQ_TEMPLATE_IDENTIFIER()
29 LONG_L " $4, %[v]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
30 "bne $4, %[expect], %l[cmpfail]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
31 RSEQ_INJECT_ASM(4) in RSEQ_TEMPLATE_IDENTIFIER()
34 LONG_L " $4, %[v]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
35 "bne $4, %[expect], %l[error2]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
38 LONG_S " %[newv], %[v]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
42 RSEQ_ASM_DEFINE_ABORT(3, 4, "", abort, 1b, 2b, 4f) in RSEQ_TEMPLATE_IDENTIFIER()
[all …]
H A Drseq-x86-bits.h16 int RSEQ_TEMPLATE_IDENTIFIER(rseq_cmpeqv_storev)(intptr_t *v, intptr_t expect, intptr_t newv, int c… in RSEQ_TEMPLATE_IDENTIFIER()
21 RSEQ_ASM_DEFINE_TABLE(3, 1f, 2f, 4f) /* start, commit, abort */ in RSEQ_TEMPLATE_IDENTIFIER()
29 RSEQ_ASM_CMP_CPU_ID(cpu_id, RSEQ_ASM_TP_SEGMENT:RSEQ_TEMPLATE_CPU_ID_OFFSET(%[rseq_offset]), 4f) in RSEQ_TEMPLATE_IDENTIFIER()
31 "cmpq %[v], %[expect]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
33 RSEQ_INJECT_ASM(4) in RSEQ_TEMPLATE_IDENTIFIER()
36 "cmpq %[v], %[expect]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
40 "movq %[newv], %[v]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
43 RSEQ_ASM_DEFINE_ABORT(4, "", abort) in RSEQ_TEMPLATE_IDENTIFIER()
47 [v] "m" (*v), in RSEQ_TEMPLATE_IDENTIFIER()
77 * Compare @v against @expectnot. When it does _not_ match, load @v
[all …]
H A Drseq-s390-bits.h9 int RSEQ_TEMPLATE_IDENTIFIER(rseq_cmpeqv_storev)(intptr_t *v, intptr_t expect, intptr_t newv, int c… in RSEQ_TEMPLATE_IDENTIFIER()
14 RSEQ_ASM_DEFINE_TABLE(3, 1f, 2f, 4f) /* start, commit, abort */ in RSEQ_TEMPLATE_IDENTIFIER()
22 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f) in RSEQ_TEMPLATE_IDENTIFIER()
24 LONG_CMP " %[expect], %[v]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
26 RSEQ_INJECT_ASM(4) in RSEQ_TEMPLATE_IDENTIFIER()
29 LONG_CMP " %[expect], %[v]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
33 LONG_S " %[newv], %[v]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
36 RSEQ_ASM_DEFINE_ABORT(4, "", abort) in RSEQ_TEMPLATE_IDENTIFIER()
41 [v] "m" (*v), in RSEQ_TEMPLATE_IDENTIFIER()
72 * Compare @v against @expectnot. When it does _not_ match, load @v
[all …]
H A Drseq-arm-bits.h14 int RSEQ_TEMPLATE_IDENTIFIER(rseq_cmpeqv_storev)(intptr_t *v, intptr_t expect, intptr_t newv, int c… in RSEQ_TEMPLATE_IDENTIFIER()
19 RSEQ_ASM_DEFINE_TABLE(9, 1f, 2f, 4f) /* start, commit, abort */ in RSEQ_TEMPLATE_IDENTIFIER()
27 RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, 4f) in RSEQ_TEMPLATE_IDENTIFIER()
29 "ldr r0, %[v]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
32 RSEQ_INJECT_ASM(4) in RSEQ_TEMPLATE_IDENTIFIER()
35 "ldr r0, %[v]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
40 "str %[newv], %[v]\n\t" in RSEQ_TEMPLATE_IDENTIFIER()
44 RSEQ_ASM_DEFINE_ABORT(3, 4, "", abort, 1b, 2b, 4f) in RSEQ_TEMPLATE_IDENTIFIER()
50 [v] "m" (*v), in RSEQ_TEMPLATE_IDENTIFIER()
81 int RSEQ_TEMPLATE_IDENTIFIER(rseq_cmpnev_storeoffp_load)(intptr_t *v, intptr_t expectnot, in RSEQ_TEMPLATE_IDENTIFIER()
[all …]
/linux/drivers/mtd/nand/raw/
H A Dnand_ids.c29 {"TC58NVG0S3E 1G 3.3V 8-bit",
32 {"TC58NVG2S0F 4G 3.3V 8-bit",
34 SZ_4K, SZ_512, SZ_256K, 0, 8, 224, NAND_ECC_INFO(4, SZ_512) },
35 {"TC58NVG2S0H 4G 3.3V 8-bit",
38 {"TC58NVG3S0F 8G 3.3V 8-bit",
40 SZ_4K, SZ_1K, SZ_256K, 0, 8, 232, NAND_ECC_INFO(4, SZ_512) },
41 {"TC58NVG5D2 32G 3.3V 8-bit",
44 {"TC58NVG6D2 64G 3.3V 8-bit",
47 {"SDTNQGAMA 64G 3.3V 8-bit",
50 {"SDTNRGAMA 64G 3.3V 8-bit",
[all …]
/linux/drivers/media/platform/verisilicon/
H A Drockchip_vpu2_hw_h264_dec.c21 #define VDPU_SWREG(nr) ((nr) * 4)
28 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
30 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
31 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
32 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
33 #define VDPU_REG_PIC_FIXED_QUANT(v) ((v) ? BIT(7) : 0) argument
34 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
36 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument
37 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument
39 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument
[all …]
/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Dmsm_media_info.h20 * YUV 4:2:0 image with a plane of 8 bit Y samples followed
21 * by an interleaved U/V plane containing 8 bit 2x2 subsampled
33 * Y Y Y Y Y Y Y Y Y Y Y Y . . . . V |
37 * . . . . . . . . . . . . . . . . V
38 * U V U V U V U V U V U V . . . . ^
39 * U V U V U V U V U V U V . . . . |
40 * U V U V U V U V U V U V . . . . |
41 * U V U V U V U V U V U V . . . . UV_Scanlines
43 * . . . . . . . . . . . . . . . . V
58 * YUV 4:2:0 image with a plane of 8 bit Y samples followed
[all …]
/linux/arch/arm/crypto/
H A Dblake2b-neon-core.S47 .align 4
53 .byte 3, 4, 5, 6, 7, 0, 1, 2
55 .byte 2, 3, 4, 5, 6, 7, 0, 1
63 // Execute one round of BLAKE2b by updating the state matrix v[0..15] in the
73 // (v[0], v[4], v[8], v[12]), (v[1], v[5], v[9], v[13]),
74 // (v[2], v[6], v[10], v[14]), and (v[3], v[7], v[11], v[15]).
145 // (v[0], v[5], v[10], v[15]), (v[1], v[6], v[11], v[12]),
146 // (v[2], v[7], v[8], v[13]), and (v[3], v[4], v[9], v[14]).
260 vld1.64 {q2-q3}, [ip]! // Load h[4..7]
266 vld1.64 {q6-q7}, [r10] // Load IV[4..7]
[all …]
/linux/sound/soc/codecs/
H A Dcs43130.h46 #define CS43130_PLL_SET_4 0x030004 /* PLL Setting 4 */
120 #define CS43130_INT_STATUS_4 0x0F0003 /* Interrupt Status 4 */
125 #define CS43130_INT_MASK_4 0x0F0013 /* Interrupt Mask 4 */
149 #define CS43130_XTAL_RDY_INT_SHIFT 4
164 #define CS43130_HPLOAD_OOR_INT_SHIFT 4
177 #define CS43130_HPLOAD_CHN_SEL_SHIFT 4
203 #define CS43130_SP_STP_SHIFT 4
209 #define CS43130_SP_MODE_SHIFT 4
227 #define CS43130_PDN_HP_SHIFT 4
305 #define CS43130_DSD_EN_SHIFT 4
[all …]
/linux/drivers/media/platform/sunxi/sun6i-csi/
H A Dsun6i_csi_reg.h18 #define SUN6I_CSI_EN_PTN_CYCLE(v) (((v) << 16) & GENMASK(23, 16)) argument
20 #define SUN6I_CSI_EN_PTN_START BIT(4)
29 #define SUN6I_CSI_IF_CFG_FIELD_DT_PCLK_SHIFT(v) (((v) << 24) & GENMASK(27, 24)) argument
48 #define SUN6I_CSI_IF_CFG_DATA_WIDTH_2_TIMES_8 (4 << 8)
53 #define SUN6I_CSI_IF_CFG_IF_CSI_BT656 (4 << 0)
57 #define SUN6I_CSI_CAP_MASK(v) (((v) << 2) & GENMASK(5, 2)) argument
70 #define SUN6I_CSI_CH_CFG_PAD_VAL(v) (((v) << 24) & GENMASK(31, 24)) argument
71 #define SUN6I_CSI_CH_CFG_INPUT_FMT(v) (((v) << 20) & GENMASK(23, 20)) argument
72 #define SUN6I_CSI_CH_CFG_OUTPUT_FMT(v) (((v) << 16) & GENMASK(19, 16)) argument
78 #define SUN6I_CSI_CH_CFG_INPUT_YUV_SEQ(v) (((v) << 8) & GENMASK(9, 8)) argument
[all …]
/linux/arch/alpha/kernel/
H A Dentry.S19 .align 4
55 stq $4, 32($sp)
61 .cfi_rel_offset $4, 32
105 ldq $4, 32($sp)
130 .cfi_restore $4
259 stq $4, 32($sp)
288 .cfi_rel_offset $4, 4*8
319 ldq $4, 32($sp)
347 .cfi_restore $4
373 .align 4
[all …]
/linux/arch/arm/include/asm/
H A Datomic.h25 #define arch_atomic_read(v) READ_ONCE((v)->counter) argument
26 #define arch_atomic_set(v,i) WRITE_ONCE(((v)->counter), (i)) argument
37 static inline void arch_atomic_##op(int i, atomic_t *v) \
42 prefetchw(&v->counter); \
45 " " #asm_op " %0, %0, %4\n" \
49 : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) \
50 : "r" (&v->counter), "Ir" (i) \
55 static inline int arch_atomic_##op##_return_relaxed(int i, atomic_t *v) \
60 prefetchw(&v->counter); \
64 " " #asm_op " %0, %0, %4\n" \
[all …]
/linux/tools/perf/util/arm-spe-decoder/
H A Darm-spe-pkt-decoder.h73 #define SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(v) ((v) & GENMASK_ULL(55, 0)) argument
74 #define SPE_ADDR_PKT_ADDR_GET_BYTE_6(v) (((v) & GENMASK_ULL(55, 48)) >> 48) argument
76 #define SPE_ADDR_PKT_GET_NS(v) (((v) & BIT_ULL(63)) >> 63) argument
77 #define SPE_ADDR_PKT_GET_EL(v) (((v) & GENMASK_ULL(62, 61)) >> 61) argument
78 #define SPE_ADDR_PKT_GET_CH(v) (((v) & BIT_ULL(62)) >> 62) argument
79 #define SPE_ADDR_PKT_GET_PAT(v) (((v) & GENMASK_ULL(59, 56)) >> 56) argument
100 EV_TLB_ACCESS = 4,
126 #define SPE_OP_PKT_IS_OTHER_SVE_OP(v) (((v) & (BIT(7) | BIT(3) | BIT(0))) == 0x8) argument
128 #define SPE_OP_PKT_LDST_SUBCLASS_GET(v) ((v) & GENMASK_ULL(7, 1)) argument
137 #define SPE_OP_PKT_IS_LDST_ATOMIC(v) (((v) & (GENMASK_ULL(7, 5) | BIT(1))) == 0x2) argument
[all …]
/linux/crypto/
H A Daegis128-neon-inner.c26 uint8x16_t v[5]; member
44 vst1q_u8(state, st.v[0]); in aegis128_save_state_neon()
45 vst1q_u8(state + 16, st.v[1]); in aegis128_save_state_neon()
46 vst1q_u8(state + 32, st.v[2]); in aegis128_save_state_neon()
47 vst1q_u8(state + 48, st.v[3]); in aegis128_save_state_neon()
48 vst1q_u8(state + 64, st.v[4]); in aegis128_save_state_neon()
66 uint8x16_t v; in aegis_aes_round() local
73 v = vqtbl4q_u8(vld1q_u8_x4(crypto_aes_sbox), w); in aegis_aes_round()
74 v = vqtbx4q_u8(v, vld1q_u8_x4(crypto_aes_sbox + 0x40), w - 0x40); in aegis_aes_round()
75 v = vqtbx4q_u8(v, vld1q_u8_x4(crypto_aes_sbox + 0x80), w - 0x80); in aegis_aes_round()
[all …]
/linux/Documentation/userspace-api/media/v4l/
H A Dpixfmt-packed-hsv.rst14 The *saturation* (s) and the *value* (v) are measured in percentage of the
48 - 4
57 - 4
66 - 4
75 - 4
97 - h\ :sub:`4`
106 - s\ :sub:`4`
112 - v\ :sub:`7`
113 - v\ :sub:`6`
114 - v\ :sub:`5`
[all …]

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