/linux/arch/x86/crypto/ |
H A D | sha512-avx2-asm.S | 12 # This software is available to you under a choice of one of two 33 # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 49 # This code schedules 1 blocks at a time, with 4 lanes per block 87 a = %rax define 143 # Rotate symbols a..h right 152 b = a 153 a = TMP_ define 182 mov a, y3 # y3 = a # MAJA 183 rorx $41, e, y0 # y0 = e >> 41 # S1A 186 or c, y3 # y3 = a|c # MAJA [all …]
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/linux/arch/alpha/lib/ |
H A D | copy_user.S | 8 * This is essentially the same as "memcpy()", but with a few twists. 11 * only _after_ a successful copy). There is also some rather minor 20 .section __ex_table,"a"; \ 27 .section __ex_table,"a"; \ 56 beq $0,$41 78 beq $0,$41 92 br $31,$41 106 beq $0,$41 114 $41:
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/linux/drivers/gpu/drm/ci/xfails/ |
H A D | vkms-none-skips.txt | 11 …a 01 00 00 8b 42 30 2b 42 28 41 39 c5 0f 8c 6f 01 00 00 49 83 c7 01 49 39 df 74 3b 4b 8b 34 fc 48 … 45 …a 01 00 00 8b 42 30 2b 42 28 41 39 c5 0f 8c 6f 01 00 00 49 83 c7 01 49 39 df 74 3b 4b 8b 34 fc 48 … 62 …a 01 00 00 8b 42 30 2b 42 28 41 39 c5 0f 8c 6f 01 00 00 49 83 c7 01 49 39 df 74 3b 4b 8b 34 fc 48 … 96 …a 01 00 00 8b 42 30 2b 42 28 41 39 c5 0f 8c 6f 01 00 00 49 83 c7 01 49 39 df 74 3b 4b 8b 34 fc 48 … 113 # Code: 6a 34 0f 8e 91 fe ff ff 44 89 ea 48 8d 7c 24 48 e8 71 f0 ff ff 4b 8b 04 fc 48 8b 4c 24 50 4… 147 # Code: 6a 34 0f 8e 91 fe ff ff 44 89 ea 48 8d 7c 24 48 e8 71 f0 ff ff 4b 8b 04 fc 48 8b 4c 24 50 4… 164 # Code: 6a 34 0f 8e 91 fe ff ff 44 89 ea 48 8d 7c 24 48 e8 71 f0 ff ff 4b 8b 04 fc 48 8b 4c 24 50 4… 200 # Code: 6a 34 0f 8e 91 fe ff ff 44 89 ea 48 8d 7c 24 48 e8 71 f0 ff ff 4b 8b 04 fc 48 8b 4c 24 50 4… 215 # Code: 6a 34 0f 8e 91 fe ff ff 44 89 ea 48 8d 7c 24 48 e8 71 f0 ff ff 4b 8b 04 fc 48 8b 4c 24 50 4… 249 # Code: 6a 34 0f 8e 91 fe ff ff 44 89 ea 48 8d 7c 24 48 e8 71 f0 ff ff 4b 8b 04 fc 48 8b 4c 24 50 4…
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/linux/arch/m68k/ifpsp060/ |
H A D | ftest.sa | 64 dc.l $0000ff28,$2d7c0000,$0208feb8,$41faffc2 68 dc.l $d0ff0170,$0000125a,$f23b9c00,$01700000 74 dc.l $2d7c0000,$0208feb8,$41faffc4,$2d48febc 92 dc.l $ffffff9e,$2d7c0f00,$8080feb8,$41faffd4 94 dc.l $103861ff,$0000103a,$4a0066ff,$0000102a 96 dc.l $d0ff0170,$0000109a,$f23b9c00,$01700000 101 dc.l $bc00fea8,$2d7c0f00,$8080feb8,$41faffd8 213 dc.l $0000ff28,$2d7c0200,$1048feb8,$41faffc2 215 dc.l $08a861ff,$000008aa,$4a0066ff,$0000089a 227 dc.l $0000ff28,$2d7c0200,$1048feb8,$41faffc2 [all …]
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H A D | itest.sa | 2 dc.l $30363020,$49535020,$73746172,$7465643a 103 dc.l $3fff0170,$00004936,$41eeff64,$203caaaa 111 dc.l $3fff0170,$000048b6,$41eeff60,$117c00aa 118 dc.l $0000484a,$41eeff60,$3e3caaaa,$42280000 124 dc.l $41eeff60,$117c00aa,$0000117c,$00aa0002 129 dc.l $ff784cfb,$3fff0170,$00004792,$41eeff60 135 dc.l $3fff0170,$00004736,$41eeff60,$303caaaa 136 dc.l $42280008,$4228000a,$3d7c001f,$ff7c44fc 141 dc.l $000046da,$41eeff60,$117c00aa,$0008117c 147 dc.l $41eeff60,$203caaaa,$aaaa4228,$00084228 [all …]
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H A D | pfpsp.sa | 49 dc.l $66000116,$41eeff6c,$61ff0000,$051c41ee 52 dc.l $41eeff78,$61ff0000,$2aca0c00,$00066606 56 dc.l $41eeff6c,$43eeff78,$223b1530,$00001974 68 dc.l $00000000,$f23c8800,$00000000,$41eeff6c 77 dc.l $ff426600,$013241ee,$ff6c61ff,$0000035a 78 dc.l $41eeff6c,$61ff0000,$292a1d40,$ff4e082e 111 dc.l $88000000,$000041ee,$ff6c61ff,$0000013a 112 dc.l $41eeff6c,$61ff0000,$270a0c00,$00066606 117 dc.l $4280102e,$ff63e9ee,$1047ff43,$41eeff6c 142 dc.l $670004a2,$0c000007,$6700049a,$02aeffff [all …]
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H A D | fplsp.sa | 80 dc.l $f22e5400,$0008f22e,$6800ff6c,$41eeff6c 110 dc.l $6800ff6c,$41eeff6c,$61ff0000,$6a041d40 139 dc.l $f22e5400,$0008f22e,$6800ff6c,$41eeff6c 169 dc.l $6800ff6c,$41eeff6c,$61ff0000,$66541d40 198 dc.l $f22e5400,$0008f22e,$6800ff6c,$41eeff6c 228 dc.l $6800ff6c,$41eeff6c,$61ff0000,$62a41d40 257 dc.l $f22e5400,$0008f22e,$6800ff6c,$41eeff6c 262 dc.l $0000661a,$60140c01,$00036608,$61ff0000 272 dc.l $0000657a,$60140c01,$00036608,$61ff0000 287 dc.l $6800ff6c,$41eeff6c,$61ff0000,$5ef41d40 [all …]
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/linux/arch/riscv/lib/ |
H A D | delay.c | 27 * Therefore the constant part is HZ / 1000000 which is a small 30 * and scale the result back down by 2^31 with a simple shift: 56 * the result is that I need a 64-bit multiply, which is slow on 32-bit 59 * NDELAY_MULT = 2^41 * HZ / 1000000000 60 * = (2^41 / 1000000000) * HZ 70 #define NDELAY_SHIFT 41
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/linux/tools/testing/selftests/bpf/progs/ |
H A D | verifier_sdiv.c | 20 w0 = -41; \ in sdiv32_non_zero_imm_1() 32 w0 = 41; \ in sdiv32_non_zero_imm_2() 44 w0 = -41; \ in sdiv32_non_zero_imm_3() 104 w0 = 41; \ in sdiv32_non_zero_imm_8() 116 w0 = -41; \ in sdiv32_non_zero_reg_1() 129 w0 = 41; \ in sdiv32_non_zero_reg_2() 142 w0 = -41; \ in sdiv32_non_zero_reg_3() 207 w0 = 41; \ in sdiv32_non_zero_reg_8() 220 r0 = -41; \ in sdiv64_non_zero_imm_1() 232 r0 = 41; \ in sdiv64_non_zero_imm_2() [all …]
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H A D | local_kptr_stash.c | 58 * If it's not included, a fwd reference for node_data will be generated but 78 static bool less(struct bpf_rb_node *a, const struct bpf_rb_node *b) in less() argument 83 node_a = container_of(a, struct node_data, node); in less() 127 return create_and_stash(0, 41) ?: create_and_stash(1, 42); in stash_rb_nodes() 144 res->key = 41; in stash_plain() 167 res->key = 41; in stash_local_with_root()
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/linux/drivers/hwmon/ |
H A D | lm90.c | 7 * Based on the lm83 driver. The LM90 is a sensor chip made by National 9 * one external one) with a 0.125 deg resolution (1 deg for local 10 * temperature) and a 3-4 deg accuracy. 22 * has a higher accuracy. 24 * This driver also supports the ADM1032, a sensor chip made by Analog 25 * Devices. That chip is similar to the LM90, with a few differences 26 * that are not handled by this driver. Among others, it has a higher 33 * in a detection as max6657 if it is on address 0x4c. The extra address 65 * and extended mode. They are mostly compatible with LM90 except for a data 735 * to explicitly ask for a transaction without PEC. [all …]
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/linux/drivers/pci/ |
H A D | pci-label.c | 3 * Export the firmware instance and label associated with a PCI device to 10 * PCI Firmware Specification Revision 3.1 section 4.6.7 (DSM for Naming a 14 * Method), then the SMBIOS type 41 instance number and string is exported to 17 * SMBIOS defines type 41 for onboard pci devices. This code retrieves 18 * the instance number and string from the type 41 record and exports 115 static umode_t smbios_attr_is_visible(struct kobject *kobj, struct attribute *a, in smbios_attr_is_visible() argument 127 return a->mode; in smbios_attr_is_visible() 178 * this entry must return a null string. in dsm_get_label() 216 static umode_t acpi_attr_is_visible(struct kobject *kobj, struct attribute *a, in acpi_attr_is_visible() argument 224 return a->mode; in acpi_attr_is_visible()
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/linux/include/linux/ |
H A D | falloc.h | 23 #define FS_IOC_UNRESVSP _IOW('X', 41, struct space_resv) 29 * Mask of all supported fallocate modes. Only one can be set at a time. 41 /* on ia32 l_start is on a 32-bit boundary */ 55 #define FS_IOC_UNRESVSP_32 _IOW ('X', 41, struct space_resv_32)
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/linux/lib/zstd/compress/ |
H A D | zstd_compress_internal.h | 31 … It could be confused for a real successor at index "1", if sorted as larger than its predecessor. 32 … It's not a big deal though : candidate will just be sorted again. 34 … But candidate 1 cannot hide a large tree of candidates, so it's a minimal loss. 35 … is that ZSTD_DUBT_UNSORTED_MARK cannot be mishandled after table re-use with a different strategy. 82 * Stores Literals Block Type for a super-block in hType, and 93 * Stores symbol compression modes for a super-block in {ll, ol, ml}Type, and 174 …ZSTD_OptPrice_e priceType; /* prices can be determined dynamically, or follow a pre-defined cost… 205 * When loadedDictEnd != 0, a dictionary is in use, and still valid. 206 … * This relies on a mechanism to set loadedDictEnd=0 when dictionary is no longer within distance. 215 …U16* tagTable; /* For row-based matchFinder: A row-based table containin… [all …]
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/linux/drivers/tty/vt/ |
H A D | defkeymap.map | 12 # be saved by mapping AltGr to Alt (and adapting a few entries): 76 keycode 30 = a 93 keycode 41 = grave asciitilde 94 control keycode 41 = nul 95 alt keycode 41 = Meta_grave 263 string F1 = "\033[[A" 291 compose '`' 'A' to '�' 292 compose '`' 'a' to '�' 293 compose '\'' 'A' to '�' 294 compose '\'' 'a' to '�' [all …]
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/linux/drivers/media/v4l2-core/ |
H A D | v4l2-vp9.c | 32 { 46, 41, 76, 140, 63, 184, 69, 112, 57 }, /*left = d135*/ 67 { 35, 19, 12, 135, 87, 209, 41, 45, 167 }, /*left = d153*/ 88 { 46, 16, 24, 136, 76, 147, 41, 64, 172 }, /*left = d117*/ 92 { 37, 49, 25, 129, 168, 164, 41, 54, 148 }, /*left = tm */ 94 { 82, 22, 32, 127, 143, 213, 39, 41, 70 }, /*left = dc */ 121 { 41, 53, 52, 148, 71, 142, 65, 128, 51 }, /*left = d117*/ 132 { 158, 97, 94 }, /* a/l both not split */ 133 { 93, 24, 99 }, /* a split, l not split */ 134 { 85, 119, 44 }, /* l split, a not split */ 135 { 62, 59, 67 }, /* a/l both split */ [all …]
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/linux/arch/mips/include/asm/octeon/ |
H A D | cvmx-dbg-defs.h | 15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 19 * You should have received a copy of the GNU General Public License 24 * This file may also be available under a different license from Cavium. 37 uint64_t reserved_23_63:41; 45 uint64_t reserved_23_63:41;
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H A D | pci-octeon.h | 22 * The RC base of BAR1. gen1 has a 39-bit BAR2, gen2 has 41-bit BAR2, 25 #define CVMX_PCIE_BAR1_RC_BASE (1ull << 41)
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/linux/Documentation/devicetree/bindings/timer/ |
H A D | nvidia,tegra-timer.yaml | 21 # Either a single combined interrupt or up to 14 individual interrupts 25 A list of 14 interrupts; one per each timer channels 0 through 13 43 # Either a single combined interrupt or up to 6 individual interrupts 47 A list of 6 interrupts; one per each of timer channels 1 through 5, 57 # Either a single combined interrupt or up to 4 individual interrupts 61 A list of 4 interrupts; one per timer channel. 69 timestamp counter. The TMRs run at either a fixed 1 MHz clock rate derived 83 The Tegra30 timer provides ten 29-bit timer channels, a single 32-bit free 85 trigger a legacy watchdog reset. 88 The Tegra20 timer provides four 29-bit timer channels and a single 32-bit free [all …]
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/linux/include/dt-bindings/clock/ |
H A D | ast2600-clock.h | 58 #define ASPEED_CLK_GATE_I3C4CLK 41 91 /* Only list resets here that are not part of a clock gate + reset pair */ 102 #define ASPEED_RESET_I3C1 41
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/linux/Documentation/networking/ |
H A D | multi-pf-netdev.rst | 22 The Multi-PF NIC technology enables several CPUs within a multi-socket server to connect directly to 23 the network, each through its own dedicated PCIe interface. Through either a connection harness that 24 splits the PCIe lanes between two cards or by bifurcating a PCIe slot for a single card. This 32 The feature adds support for combining multiple PFs of the same port in a Multi-PF environment under 36 traffic and allows apps running on the same netdev from different NUMAs to still feel a sense of 43 NIC and has the socket-direct property enabled, once all PFs are probed, we create a single netdev 46 The netdev network channels are distributed between all devices, a proper configuration would utili… 47 the correct close NUMA node when working on a certain app/CPU. 49 We pick one PF to be a primary (leader), and it fills a special role. The other devices 51 mode, no south <-> north traffic flowing directly through a secondary PF. It needs the assistance of [all …]
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/linux/arch/powerpc/crypto/ |
H A D | aes-tab-4k.S | 10 * crypto/aes_generic.c and are designed to be simply accessed by a combination 11 * of rlwimi/lwz instructions with a minimum of table registers (usually only 19 * This is a quite good tradeoff for low power devices (e.g. routers) without 25 #define R(a, b, c, d) \ argument 26 0x##a##b##c##d, 0x##d##a##b##c, 0x##c##d##a##b, 0x##b##c##d##a 40 .long R(4d, ab, ab, e6), R(ec, 76, 76, 9a) 45 .long R(41, ad, ad, ec), R(b3, d4, d4, 67) 50 .long R(3d, 93, 93, ae), R(4c, 26, 26, 6a) 51 .long R(6c, 36, 36, 5a), R(7e, 3f, 3f, 41) 56 .long R(62, 31, 31, 53), R(2a, 15, 15, 3f) [all …]
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/linux/drivers/of/unittest-data/ |
H A D | tests-phandle.dtsi | 50 consumer-a { 65 unterminated-string = [40 41 42 43]; 66 unterminated-string-list = "first", "second", [40 41 42 43];
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/linux/arch/parisc/kernel/vdso64/ |
H A D | sigtramp.S | 16 a 64-byte boundary by 0, 4 or 5 instructions. Since the vdso trampoline 17 is not on the stack, we need a new variant with different offsets and 28 /* The nop here is a hack. The dwarf2 unwind routines subtract 1 from 30 call instruction. Since we don't have a call here, we artifically 31 extend the range covered by the unwind info by adding a nop before 58 .section .eh_frame,"a",@progbits 136 rsave 37, 41 140 rsave 41, 45
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/linux/arch/powerpc/kernel/ |
H A D | cpu_setup_e500.S | 56 * FIXME - we haven't yet done testing to determine a reasonable default 75 * FIXME - we haven't yet done testing to determine a reasonable default 137 * We only want to touch IVOR38-41 if we're running on hardware 188 * We only want to touch IVOR38-41 if we're running on hardware 208 * We only want to touch IVOR38-41 if we're running on hardware
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