Home
last modified time | relevance | path

Searched full:41 (Results 1 – 25 of 1741) sorted by relevance

12345678910>>...70

/linux/Documentation/translations/zh_CN/core-api/
H A Dpacking.rst61 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
75 56 57 58 59 60 61 62 63 48 49 50 51 52 53 54 55 40 41 42 43 44 45 46 47 32 33 34 35 36 37 38 39
87 39 38 37 36 35 34 33 32 47 46 45 44 43 42 41 40 55 54 53 52 51 50 49 48 63 62 61 60 59 58 57 56
100 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
112 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
124 56 57 58 59 60 61 62 63 48 49 50 51 52 53 54 55 40 41 42 43 44 45 46 47 32 33 34 35 36 37 38 39
134 39 38 37 36 35 34 33 32 47 46 45 44 43 42 41 40 55 54 53 52 51 50 49 48 63 62 61 60 59 58 57 56
145 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
/linux/tools/testing/selftests/bpf/progs/
H A Dverifier_sdiv.c20 w0 = -41; \ in sdiv32_non_zero_imm_1()
32 w0 = 41; \ in sdiv32_non_zero_imm_2()
44 w0 = -41; \ in sdiv32_non_zero_imm_3()
104 w0 = 41; \ in sdiv32_non_zero_imm_8()
116 w0 = -41; \ in sdiv32_non_zero_reg_1()
129 w0 = 41; \ in sdiv32_non_zero_reg_2()
142 w0 = -41; \ in sdiv32_non_zero_reg_3()
207 w0 = 41; \ in sdiv32_non_zero_reg_8()
220 r0 = -41; \ in sdiv64_non_zero_imm_1()
232 r0 = 41; \ in sdiv64_non_zero_imm_2()
[all …]
/linux/lib/crypto/x86/
H A Dsha512-avx2-asm.S182 rorx $41, e, y0 # y0 = e >> 41 # S1A
189 xor y1, y0 # y0 = (e>>41) ^ (e>>18) # S1
194 xor y1, y0 # y0 = (e>>41) ^ (e>>18) ^ (e>>14) # S1
244 rorx $41, e, y0 # y0 = e >> 41 # S1A
252 xor y1, y0 # y0 = (e>>41) ^ (e>>18) # S1
257 xor y1, y0 # y0 = (e>>41) ^ (e>>18) ^ (e>>14) # S1
302 rorx $41, e, y0 # y0 = e >> 41 # S1A
311 xor y1, y0 # y0 = (e>>41) ^ (e>>18) # S1
318 xor y1, y0 # y0 = (e>>41) ^ (e>>18) ^ (e>>14) # S1
359 rorx $41, e, y0 # y0 = e >> 41 # S1A
[all …]
/linux/drivers/video/logo/
H A Dlogo_spe_clut224.ppm29 45 45 45 41 41 41 4 4 4 0 0 0 0 0 0 0 0 0
62 0 0 0 7 7 7 65 65 65 41 41 43 152 149 142 192 191 189
106 3 3 6 29 29 31 3 3 6 41 41 41 44 44 44 5 5 5
205 3 3 6 41 33 20 220 170 13 53 53 53 4 4 4 0 0 0
251 246 190 14 246 190 14 239 182 13 189 138 9 41 33 20 10 10 12
258 239 182 13 239 182 13 215 161 11 175 122 13 41 33 20 2 2 6
264 34 34 34 57 57 57 84 78 65 103 92 56 125 101 41 140 112 39
268 103 92 56 41 41 41 10 10 10 0 0 0 0 0 0 0 0 0
272 86 77 61 95 73 34 88 72 41 72 67 58 36 36 36 10 10 10
274 22 22 22 61 61 59 88 72 41 112 86 32 112 86 32 84 78 65
/linux/arch/alpha/lib/
H A Dcopy_user.S56 beq $0,$41
78 beq $0,$41
92 br $31,$41
106 beq $0,$41
114 $41:
/linux/arch/m68k/ifpsp060/
H A Dftest.sa64 dc.l $0000ff28,$2d7c0000,$0208feb8,$41faffc2
74 dc.l $2d7c0000,$0208feb8,$41faffc4,$2d48febc
92 dc.l $ffffff9e,$2d7c0f00,$8080feb8,$41faffd4
101 dc.l $bc00fea8,$2d7c0f00,$8080feb8,$41faffd8
213 dc.l $0000ff28,$2d7c0200,$1048feb8,$41faffc2
227 dc.l $0000ff28,$2d7c0200,$1048feb8,$41faffc2
241 dc.l $0000ff28,$2d7c0000,$0800feb8,$41faffc2
255 dc.l $2d7c0000,$0800feb8,$41faffc2,$2d48febc
269 dc.l $0208feb8,$41faffc2,$2d48febc,$61ff0000
283 dc.l $41faffc2,$2d48febc,$61ff0000,$042e4a00
[all …]
H A Ditest.sa103 dc.l $3fff0170,$00004936,$41eeff64,$203caaaa
111 dc.l $3fff0170,$000048b6,$41eeff60,$117c00aa
118 dc.l $0000484a,$41eeff60,$3e3caaaa,$42280000
124 dc.l $41eeff60,$117c00aa,$0000117c,$00aa0002
129 dc.l $ff784cfb,$3fff0170,$00004792,$41eeff60
135 dc.l $3fff0170,$00004736,$41eeff60,$303caaaa
141 dc.l $000046da,$41eeff60,$117c00aa,$0008117c
147 dc.l $41eeff60,$203caaaa,$aaaa4228,$00084228
179 dc.l $3fff0170,$00004476,$41eeff68,$117c00aa
220 dc.l $52aeff78,$4cfb3fff,$01700000,$41e072ff
[all …]
H A Dpfpsp.sa49 dc.l $66000116,$41eeff6c,$61ff0000,$051c41ee
52 dc.l $41eeff78,$61ff0000,$2aca0c00,$00066606
56 dc.l $41eeff6c,$43eeff78,$223b1530,$00001974
68 dc.l $00000000,$f23c8800,$00000000,$41eeff6c
78 dc.l $41eeff6c,$61ff0000,$292a1d40,$ff4e082e
112 dc.l $41eeff6c,$61ff0000,$270a0c00,$00066606
117 dc.l $4280102e,$ff63e9ee,$1047ff43,$41eeff6c
185 dc.l $000061ff,$00005548,$41eeff6c,$61ff0000
190 dc.l $ff63e9ee,$1047ff43,$41eeff6c,$43eeff78
218 dc.l $ff4261ff,$000051b4,$41eeff6c,$61ff0000
[all …]
H A Dfplsp.sa80 dc.l $f22e5400,$0008f22e,$6800ff6c,$41eeff6c
110 dc.l $6800ff6c,$41eeff6c,$61ff0000,$6a041d40
139 dc.l $f22e5400,$0008f22e,$6800ff6c,$41eeff6c
169 dc.l $6800ff6c,$41eeff6c,$61ff0000,$66541d40
198 dc.l $f22e5400,$0008f22e,$6800ff6c,$41eeff6c
228 dc.l $6800ff6c,$41eeff6c,$61ff0000,$62a41d40
257 dc.l $f22e5400,$0008f22e,$6800ff6c,$41eeff6c
287 dc.l $6800ff6c,$41eeff6c,$61ff0000,$5ef41d40
316 dc.l $f22e5400,$0008f22e,$6800ff6c,$41eeff6c
346 dc.l $6800ff6c,$41eeff6c,$61ff0000,$5b441d40
[all …]
/linux/include/dt-bindings/clock/
H A Dgoogle,gs101.h55 #define CLK_MOUT_CMU_GDC_GDC0 41
284 #define CLK_GOUT_APM_PMU_INTR_GEN_PCLK 41
357 #define CLK_GOUT_HSI0_USB31DRD_ACLK_PHYCTRL 41
411 #define CLK_GOUT_HSI2_QE_UFS_EMBD_HSI2_PCLK 41
473 #define CLK_GOUT_MISC_QE_RTIC_PCLK 41
549 #define CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4 41
630 #define CLK_GOUT_PERIC1_CLK_PERIC1_USI10_USI_CLK 41
H A Dimx8ulp-clock.h48 #define IMX8ULP_CLK_SPLL3_PFD2_DIV1_GATE 41
108 #define IMX8ULP_CLK_AUD_CLK2 41
161 #define IMX8ULP_CLK_DMA1_CH27 41
240 #define IMX8ULP_CLK_DMA2_CH21 41
H A Dmediatek,mt8196-clock.h54 #define CLK_TOP_AES_UFSFDE 41
196 #define CLK_TOP2_UNIVPLL2_D6_D2 41
374 #define CLK_VLP_SPVLP_26M 41
425 #define CLK_MM_DISP_DLO_ASYNC7 41
486 #define CLK_MM1_DISP_WDMA3 41
548 #define CLK_OVL_DLI3 41
615 #define CLK_OVL1_DLI3 41
H A Dspacemit,k1-syscon.h130 #define CLK_TIMERS2 41
234 #define RESET_TIMERS2 41
287 #define CLK_JPG 41
351 #define RESET_ISP_CPP 41
H A Dmt6797-clk.h51 #define CLK_TOP_SYSPLL_D3 41
161 #define CLK_INFRA_CPUM 41
255 #define CLK_MM_DSI0_INTERFACE_CLOCK 41
H A Dmt8195-clk.h53 #define CLK_TOP_DPI 41
302 #define CLK_INFRA_AO_DEBUGSYS 41
474 #define CLK_VPP0_WARP1_MDP_DL_ASYNC 41
585 #define CLK_VPP1_SVPP3_MDP_TDSHP 41
804 #define CLK_VDO0_SMI_RSI 41
853 #define CLK_VDO1_HDR_GFX_FE1_DL_ASYNC 41
/linux/drivers/iommu/amd/
H A Dquirks.c78 * Acer Aspire A315-41 requires the very same workaround as
82 .ident = "Acer Aspire A315-41",
85 DMI_MATCH(DMI_PRODUCT_NAME, "Aspire A315-41"),
/linux/drivers/net/wireless/broadcom/brcm80211/brcmfmac/
H A Dbtcoex.c64 * @reg41: saved value of btc_params 41
66 * @saved_regs_part1: flag indicating regs 66,41,68
240 brcmf_btcoex_params_read(ifp, 41, &btci->reg41); in btcmf_btcoex_save_part1()
244 "saved btc_params regs (66,41,68) 0x%x 0x%x 0x%x\n", in btcmf_btcoex_save_part1()
261 brcmf_btcoex_params_write(ifp, 41, btci->reg41); in brcmf_btcoex_restore_part1()
264 "restored btc_params regs {66,41,68} 0x%x 0x%x 0x%x\n", in brcmf_btcoex_restore_part1()
415 brcmf_btcoex_params_write(ifp, 41, BRCMF_BT_DHCP_REG41); in brcmf_btcoex_dhcp_start()
/linux/arch/riscv/lib/
H A Ddelay.c59 * NDELAY_MULT = 2^41 * HZ / 1000000000
60 * = (2^41 / 1000000000) * HZ
70 #define NDELAY_SHIFT 41
/linux/drivers/mfd/
H A Dqcom_rpm.c85 [QCOM_RPM_APPS_FABRIC_ARB] = { 41, 22, 21, 12 },
99 [QCOM_RPM_PM8921_SMPS6] = { 126, 41, 35, 2 },
105 [QCOM_RPM_PM8921_LDO4] = { 138, 53, 41, 2 },
174 [QCOM_RPM_MMFPB_CLK] = { 41, 21, 14, 1 },
189 [QCOM_RPM_PM8901_SMPS2] = { 138, 41, 32, 2 },
198 [QCOM_RPM_PM8901_LDO6] = { 156, 59, 41, 2 },
267 [QCOM_RPM_APPS_FABRIC_ARB] = { 41, 22, 21, 12 },
281 [QCOM_RPM_PM8921_SMPS6] = { 127, 41, 35, 2 },
287 [QCOM_RPM_PM8921_LDO4] = { 139, 53, 41, 2 },
355 [QCOM_RPM_APPS_FABRIC_ARB] = { 41, 22, 21, 12 },
[all …]
/linux/include/linux/
H A Dcrc-itu-t.h3 * crc-itu-t.h - CRC ITU-T V.41 routine
5 * Implements the standard CRC ITU-T V.41:
/linux/drivers/staging/media/ipu3/
H A Dipu3-tables.c240 { 0, -9, 41, 7, 106, -10, 0 },
256 { 0, -10, 106, 7, 41, -9, 0 },
305 { 0, -9, 41, 7, 106, -10, 0 },
321 { 0, -10, 106, 7, 41, -9, 0 },
653 { -3, 1, 100, 7, 41, -11, 0 },
674 { 0, -11, 41, 7, 100, 1, -3 },
718 { -3, 1, 100, 7, 41, -11, 0 },
739 { 0, -11, 41, 7, 100, 1, -3 },
999 { -7, 13, 92, 7, 41, -11, 0 },
1001 { 0, -11, 41, 7, 92, 13, -7 },
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dsama5d3_can.dtsi48 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>;
51 clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
/linux/arch/mips/include/asm/octeon/
H A Dpci-octeon.h22 * The RC base of BAR1. gen1 has a 39-bit BAR2, gen2 has 41-bit BAR2,
25 #define CVMX_PCIE_BAR1_RC_BASE (1ull << 41)
/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-mt6397.c30 .type1_start = 41,
31 .type1_end = 41,
/linux/Documentation/devicetree/bindings/sound/
H A Dsocionext,uniphier-evea.yaml71 clocks = <&sys_clk 41>, <&sys_clk 42>;
73 resets = <&sys_rst 41>, <&sys_rst 42>, <&adamv_rst 0>;

12345678910>>...70