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/linux/Documentation/devicetree/bindings/i2c/
H A Dsnps,designware-i2c.yaml75 i2c-sda-hold-time-ns:
81 i2c-scl-falling-time-ns:
87 i2c-sda-falling-time-ns:
109 enum: [100, 400]
140 i2c-sda-hold-time-ns = <300>;
141 i2c-sda-falling-time-ns = <300>;
142 i2c-scl-falling-time-ns = <300>;
143 snps,bus-capacitance-pf = <400>;
/linux/Documentation/devicetree/bindings/iio/adc/
H A Dadi,ad7280a.yaml40 adi,acquisition-time-ns:
44 default: 400
45 enum: [400, 800, 1200, 1600]
74 adi,acquisition-time-ns = <800>;
/linux/drivers/pwm/
H A Dpwm-bcm-kona.c32 * as soon as possible (the hardware always has a 400ns delay).
81 * There must be a min 400ns delay between clearing trigger and setting in kona_pwmc_prepare_for_settings()
84 ndelay(400); in kona_pwmc_prepare_for_settings()
96 /* Trigger bit must be held high for at least 400 ns. */ in kona_pwmc_apply_settings()
97 ndelay(400); in kona_pwmc_apply_settings()
H A Dpwm-bcm-iproc.c54 /* must be a 400 ns delay between clearing and setting enable bit */ in iproc_pwmc_enable()
55 ndelay(400); in iproc_pwmc_enable()
66 /* must be a 400 ns delay between clearing and setting enable bit */ in iproc_pwmc_disable()
67 ndelay(400); in iproc_pwmc_disable()
/linux/arch/arm/boot/dts/st/
H A Dstm32mp157c-ed1.dts122 st,min-sample-time-ns = <400>;
126 st,min-sample-time-ns = <400>;
130 st,min-sample-time-ns = <400>;
168 i2c-scl-rising-time-ns = <185>;
169 i2c-scl-falling-time-ns = <20>;
/linux/Documentation/userspace-api/media/dvb/
H A Ddvbstb.svg3 …tp://creativecommons.org/ns#" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3…
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/linux/drivers/net/wireless/ath/wcn36xx/
H A Dtxrx.c134 /* 11ac 20 MHz 800ns GI MCS 0-8 */
156 /* 11ac 20 MHz 400ns SGI MCS 6-8 */
166 /* 11ac 40 MHz 800ns GI MCS 0-9 */
187 /* 11ac 40 MHz 400ns SGI MCS 5-7 */
195 /* 11ac 40 MHz 400ns SGI MCS 5-7 */
202 /* 11ac 80 MHz 800ns GI MCS 0-7 */
215 /* 11ac 80 MHz 800 ns GI MCS 8-9 */
228 /* 11ac 80 MHz 400 ns SGI MCS 6-7 */
235 /* 11ac 80 MHz 400ns SGI MCS 8-9 */
/linux/Documentation/userspace-api/media/v4l/
H A Dnv12mt.svg5 xmlns:cc="http://creativecommons.org/ns#"
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H A Dconstraints.svg3 …tp://creativecommons.org/ns#" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3…
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H A Dbayer.svg3 …tp://creativecommons.org/ns#" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3…
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/linux/tools/testing/selftests/tc-testing/tc-tests/actions/
H A Dgate.json20 … "cmdUnderTest": "$TC action add action gate priority 1 sched-entry close 100000000ns index 100",
47 …derTest": "$TC action add action gate base-time 200000000000ns sched-entry close 100000000ns index…
74 …erTest": "$TC action add action gate cycle-time 200000000000ns sched-entry close 100000000ns index…
101 …est": "$TC action add action gate cycle-time-ext 20000000000ns sched-entry close 100000000ns index…
128 …"$TC action add action gate base-time 200000000000ns sched-entry open 200000000ns -1 8000000b inde…
134 "cmdUnderTest": "$TC action replace action gate base-time 400000000000ns index 20",
137 "matchPattern": "action order [0-9]*: .*base-time 400s.*index 20 ref",
161 …"$TC action add action gate base-time 200000000000ns sched-entry open 200000000ns -1 8000000b inde…
194 …"$TC action add action gate base-time 600000000000ns sched-entry open 200000000ns -1 8000000b inde…
226 …"$TC action add action gate base-time 600000000000ns sched-entry open 200000000ns -1 8000000b inde…
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/linux/arch/arm/boot/dts/allwinner/
H A Dsun8i-a83t.dtsi210 clock-latency-ns = <244144>; /* 8 32k periods */
216 clock-latency-ns = <244144>; /* 8 32k periods */
222 clock-latency-ns = <244144>; /* 8 32k periods */
228 clock-latency-ns = <244144>; /* 8 32k periods */
234 clock-latency-ns = <244144>; /* 8 32k periods */
240 clock-latency-ns = <244144>; /* 8 32k periods */
246 clock-latency-ns = <244144>; /* 8 32k periods */
252 clock-latency-ns = <244144>; /* 8 32k periods */
263 clock-latency-ns = <244144>; /* 8 32k periods */
269 clock-latency-ns = <244144>; /* 8 32k periods */
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/linux/Documentation/devicetree/bindings/net/
H A Damlogic,meson-dwmac.yaml60 amlogic,tx-delay-ns:
69 should be set to 0ns (which disables the TX clock delay in
74 amlogic,rx-delay-ns:
115 - 400
/linux/tools/perf/scripts/python/
H A Dpowerpc-hcalls.py107 400: 'H_GET_TRACE_BUFFER',
162 print(print_ptrn % ('hcall', 'count', 'min(ns)', 'max(ns)', 'avg(ns)'))
/linux/tools/testing/kunit/test_data/
H A Dtest_is_test_passed-no_tests_run_no_header.log14 Memory: 27868K/56932K available (1681K kernel code, 480K rwdata, 400K rodata, 89K init, 205K bss, 2…
17 clocksource: timer: mask: 0xffffffffffffffff max_cycles: 0x1cd42e205, max_idle_ns: 881590404426 ns
25 clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
/linux/arch/mips/sgi-ip27/
H A Dip27-timer.c71 * Since 800 ns works very well with various HUB frequencies, such as
72 * 360, 380, 390 and 400 MHZ, we use 800 ns rtc cycle time.
/linux/drivers/i2c/busses/
H A Di2c-nomadik.c117 I2C_FREQ_MODE_FAST, /* up to 400 Kb/s */
402 u32 ns; in setup_i2c_controller() local
419 * modes are 250ns, 100ns, 10ns respectively. in setup_i2c_controller()
425 ns = DIV_ROUND_UP_ULL(1000000000ULL, i2c_clk); in setup_i2c_controller()
429 slsu = DIV_ROUND_UP(100, ns); /* Fast */ in setup_i2c_controller()
432 slsu = DIV_ROUND_UP(10, ns); /* High */ in setup_i2c_controller()
436 slsu = DIV_ROUND_UP(250, ns); /* Standard */ in setup_i2c_controller()
459 * 400kHz you want a bus rate <=400kHz (and not >=400kHz). in setup_i2c_controller()
H A Di2c-designware-master.c63 sda_falling_time = t->sda_fall_ns ?: 300; /* ns */ in i2c_dw_set_timings_master()
64 scl_falling_time = t->scl_fall_ns ?: 300; /* ns */ in i2c_dw_set_timings_master()
106 260, /* tHIGH = 260 ns */ in i2c_dw_set_timings_master()
113 500, /* tLOW = 500 ns */ in i2c_dw_set_timings_master()
159 * capacitance are only 100pF and 400pF. in i2c_dw_set_timings_master()
161 * to 400, t_high and t_low are assumed to be in i2c_dw_set_timings_master()
162 * appropriate values for 400pF, otherwise 100pF. in i2c_dw_set_timings_master()
164 if (dev->bus_capacitance_pF >= 400) { in i2c_dw_set_timings_master()
165 /* assume bus capacitance is 400pF */ in i2c_dw_set_timings_master()
/linux/arch/arm/boot/dts/samsung/
H A Dexynos5420.dtsi160 clock-latency-ns = <140000>;
165 clock-latency-ns = <140000>;
170 clock-latency-ns = <140000>;
175 clock-latency-ns = <140000>;
180 clock-latency-ns = <140000>;
185 clock-latency-ns = <140000>;
190 clock-latency-ns = <140000>;
195 clock-latency-ns = <140000>;
200 clock-latency-ns = <140000>;
205 clock-latency-ns = <140000>;
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7d.dtsi52 clock-latency-ns = <150000>;
60 clock-latency-ns = <150000>;
68 clock-latency-ns = <150000>;
187 phy-clkgate-delay-us = <400>;
/linux/drivers/net/ethernet/mellanox/mlxbf_gige/
H A Dmlxbf_gige_mdio.c98 #define MLXBF_GIGE_MDC_CLK_NS 400
171 * 400 ns = 2*(val + 1)*(1/i1clk)
173 * val = (((400/10^9) / (1/i1clk) / 2) - 1)
174 * val = (400/2 * i1clk)/10^9 - 1
/linux/drivers/char/hw_random/
H A Dnomadik-rng.c22 * A subsequent read will delay the core for 400ns, so we just read in nmk_rng_read()
/linux/arch/arm/boot/dts/microchip/
H A Dat91-sama5d27_som1_ek.dts131 i2c-digital-filter-width-ns = <35>;
181 spi5: spi@400 {
200 spi6: spi@400 {
219 i2c-digital-filter-width-ns = <35>;
H A Dat91-sama5d2_icp.dts115 spi2: spi@400 {
178 spi5: spi@400 {
195 i2c-digital-filter-width-ns = <35>;
358 i2c-digital-filter-width-ns = <35>;
370 i2c-digital-filter-width-ns = <35>;
717 spi-cs-setup-ns = <7>;
/linux/tools/testing/selftests/net/netfilter/
H A Dnft_nat.sh48 ns="$1"
51 ip -net "$ns" link set eth0 up
52 ip -net "$ns" addr add "10.0.$subnet.99/24" dev eth0
53 ip -net "$ns" route add default via "10.0.$subnet.1"
54 ip -net "$ns" addr add "dead:$subnet::99/64" dev eth0 nodad
55 ip -net "$ns" route add default via "dead:$subnet::1"
63 local ns=$1
68 echo "ERROR: $counter counter in $ns has unexpected value (expected $expect) at $tag" 1>&2
69 ip netns exec "$ns" nft list counter inet filter "$counter" 1>&2
74 ns=$1
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