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/freebsd/contrib/googletest/googletest/test/
H A Dgoogletest-listener-test.cc272 new EventRecordingListener2("3rd")); in main()
288 "3rd.OnTestProgramStart", in main()
291 "3rd.OnTestIterationStart(0)", in main()
294 "3rd.OnEnvironmentsSetUpStart", in main()
296 "3rd.OnEnvironmentsSetUpEnd", in main()
299 "3rd.OnTestSuiteStart", in main()
305 "3rd.OnTestStart", in main()
310 "3rd.OnTestPartResult", in main()
312 "3rd.OnTestEnd", in main()
317 "3rd.OnTestStart", in main()
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/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/RISCV/
H A DRISCVCInstructions.h22 uint32_t rd; member
24 operator int() { return rd; }
25 operator Rd() { return Rd{rd + (shift ? 8 : 0)}; } in Rd() function
26 operator Rs() { return Rs{rd + (shift ? 8 : 0)}; } in Rs()
53 auto rd = DecodeCI_RD(inst); in DecodeC_LWSP() local
57 if (rd == 0) in DecodeC_LWSP()
59 return LW{rd, Rs{gpr_sp_riscv}, uint32_t(offset)}; in DecodeC_LWSP()
63 auto rd = DecodeCI_RD(inst); in DecodeC_LDSP() local
66 | ((inst >> 2) & 0x18); // offset[4:3] in DecodeC_LDSP()
67 if (rd == 0) in DecodeC_LDSP()
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/freebsd/crypto/openssl/crypto/bn/asm/
H A Dsparcv8.S63 rd %y,%g1
74 rd %y,%g1
85 rd %y,%g1
95 rd %y,%g1
117 rd %y,%g1
128 rd %y,%g1
140 rd %y,%g1
176 rd %y,%g1
183 rd %y,%g1
191 rd %y,%g1
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/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcInstrInfo.td253 SDTypeProfile<0, 3, [SDTCisVT<0, OtherVT>, SDTCisVT<1, i32>, SDTCisVT<2, i64>]>;
255 SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>, SDTCisVT<3, i32>]>;
257 SDTypeProfile<1, 4, [SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>, SDTCisVT<3, i32>, SDTCisVT<4, i64>]>;
268 SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisSameAs<0, 1>, SDTCisPtrTy<2>]>;
349 def ICC_L : ICC_VAL< 3>; // Less
376 def CPCC_3 : CPCC_VAL<39>; // 3
378 def CPCC_23 : CPCC_VAL<37>; // 2 or 3
380 def CPCC_13 : CPCC_VAL<35>; // 1 or 3
382 def CPCC_123 : CPCC_VAL<33>; // 1 or 2 or 3
384 def CPCC_03 : CPCC_VAL<42>; // 0 or 3
[all …]
H A DSparcInstrAliases.td14 // mov<cond> <ccreg> rs2, rd
19 // mov<cond> (%icc|%xcc), rs2, rd
21 ", $rs2, $rd"),
22 (movrr IntRegs:$rd, IntRegs:$rs2, condVal)>;
24 // mov<cond> (%icc|%xcc), simm11, rd
26 ", $simm11, $rd"),
27 (movri IntRegs:$rd, i32imm:$simm11, condVal)>;
29 // fmovs<cond> (%icc|%xcc), $rs2, $rd
31 ", $rs2, $rd"),
32 (fmovs FPRegs:$rd, FPRegs:$rs2, condVal)>;
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/freebsd/sys/powerpc/powerpc/
H A Dsupport.S62 #define LOG_WORD 3
194 #define rd %r4 macro
207 #define W4 3
215 dcbtst 0, rd
229 LOAD t4, WORD*3(rs)
231 STORE t1, 0(rd)
232 STORE t2, WORD*1(rd)
233 STORE t3, WORD*2(rd)
234 STORE t4, WORD*3(rd)
235 addi rd, rd, WORD*4
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/freebsd/usr.bin/gzip/
H A Dunlz.c62 #define LITERAL_CONTEXT_BITS 3
77 #define LOW_BITS 3
78 #define MID_BITS 3
95 0, 0, 0, 0, 1, 2, 3, 4, 5, 6, 4, 5,
162 lz_rd_create(struct lz_range_decoder *rd, FILE *fp) in lz_rd_create() argument
164 rd->fp = fp; in lz_rd_create()
165 rd->code = 0; in lz_rd_create()
166 rd->range = ~0; in lz_rd_create()
168 rd->code = (rd->code << 8) | (uint8_t)getc(rd->fp); in lz_rd_create()
169 return ferror(rd->fp) ? -1 : 0; in lz_rd_create()
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/freebsd/contrib/ldns/
H A Drdata.c24 ldns_rdf_size(const ldns_rdf *rd) in ldns_rdf_size() argument
26 assert(rd != NULL); in ldns_rdf_size()
27 return rd->_size; in ldns_rdf_size()
31 ldns_rdf_get_type(const ldns_rdf *rd) in ldns_rdf_get_type() argument
33 assert(rd != NULL); in ldns_rdf_get_type()
34 return rd->_type; in ldns_rdf_get_type()
38 ldns_rdf_data(const ldns_rdf *rd) in ldns_rdf_data() argument
40 assert(rd != NULL); in ldns_rdf_data()
41 return rd->_data; in ldns_rdf_data()
46 ldns_rdf_set_size(ldns_rdf *rd, size_t size) in ldns_rdf_set_size() argument
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H A Dstr2host.c37 ldns_str2rdf_int16(ldns_rdf **rd, const char *shortstr) in ldns_str2rdf_int16() argument
50 *rd = ldns_rdf_new_frm_data( in ldns_str2rdf_int16()
53 return *rd?LDNS_STATUS_OK:LDNS_STATUS_MEM_ERR; in ldns_str2rdf_int16()
58 ldns_str2rdf_time(ldns_rdf **rd, const char *time) in ldns_str2rdf_time() argument
102 *rd = ldns_rdf_new_frm_data( in ldns_str2rdf_time()
105 return *rd?LDNS_STATUS_OK:LDNS_STATUS_MEM_ERR; in ldns_str2rdf_time()
114 *rd = ldns_rdf_new_frm_data( in ldns_str2rdf_time()
117 return *rd?LDNS_STATUS_OK:LDNS_STATUS_MEM_ERR; in ldns_str2rdf_time()
127 ldns_str2rdf_nsec3_salt(ldns_rdf **rd, const char *salt_str) in ldns_str2rdf_nsec3_salt() argument
135 if(rd == NULL) { in ldns_str2rdf_nsec3_salt()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoC.td130 ImmLeaf<XLenVT, [{return isShiftedUInt<5, 3>(Imm);}]> {
139 return isShiftedUInt<5, 3>(Imm);
162 ImmLeaf<XLenVT, [{return isShiftedUInt<6, 3>(Imm);}]> {
171 return isShiftedUInt<6, 3>(Imm);
242 class CStackLoad<bits<3> funct3, string OpcodeStr,
244 : RVInst16CI<funct3, 0b10, (outs cls:$rd), (ins SPMem:$rs1, opnd:$imm),
245 OpcodeStr, "$rd, ${imm}(${rs1})">;
248 class CStackStore<bits<3> funct3, string OpcodeStr,
254 class CLoad_ri<bits<3> funct3, string OpcodeStr,
256 : RVInst16CL<funct3, 0b00, (outs cls:$rd), (ins GPRCMem:$rs1, opnd:$imm),
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H A DRISCVInstrFormatsC.td40 class RVInst16CI<bits<3> funct3, bits<2> opcode, dag outs, dag ins,
44 bits<5> rd;
48 let Inst{11-7} = rd;
55 class RVInst16CSS<bits<3> funct3, bits<2> opcode, dag outs, dag ins,
67 class RVInst16CIW<bits<3> funct3, bits<2> opcode, dag outs, dag ins,
71 bits<3> rd;
74 let Inst{4-2} = rd;
81 class RVInst16CL<bits<3> funct3, bits<2> opcode, dag outs, dag ins,
84 bits<3> rd;
85 bits<3> rs1;
[all …]
H A DRISCVInstrInfoXCV.td14 class CVInstBitManipRII<bits<2> funct2, bits<3> funct3, dag outs, dag ins,
24 class CVBitManipRII<bits<2> funct2, bits<3> funct3, string opcodestr,
26 : CVInstBitManipRII<funct2, funct3, (outs GPR:$rd),
28 opcodestr, "$rd, $rs1, $is3, $is2">;
31 : RVInstR<funct7, 0b011, OPC_CUSTOM_1, (outs GPR:$rd),
32 (ins GPR:$rs1, GPR:$rs2), opcodestr, "$rd, $rs1, $rs2">;
35 : RVInstR<funct7, 0b011, OPC_CUSTOM_1, (outs GPR:$rd),
36 (ins GPR:$rs1), opcodestr, "$rd, $rs1"> {
53 let Constraints = "$rd = $rd_wb" in {
55 (ins GPR:$rd, GP
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H A DRISCVInstrFormats.td36 def InstFormatI : InstFormat<3>;
57 class RISCVVConstraint<bits<3> val> {
58 bits<3> Value = val;
176 bits<3> VLMul = 0;
223 // 3 -> widening case
248 : Pseudo<(outs GPR:$rd), (ins Ty:$rs1, Ty:$rs2), []> {
256 : Pseudo<(outs GPR:$rd), (ins bare_symbol:$addr), [], opcodestr, "$rd, $addr"> {
265 … : Pseudo<(outs GPR:$tmp, rdty:$rd), (ins bare_symbol:$addr), [], opcodestr, "$rd, $addr, $tmp"> {
288 class RVInstRBase<bits<3> funct3, RISCVOpcode opcode, dag outs,
293 bits<5> rd;
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H A DRISCVInstrInfoXTHead.td18 SDTCisSameAs<1, 3>,
20 SDTCisVT<3, XLenVT>]>;
22 SDTCisSameAs<1, 3>,
24 SDTCisVT<3, XLenVT>]>;
81 class THShiftALU_rri<bits<3> funct3, string opcodestr>
82 : RVInstRBase<funct3, OPC_CUSTOM_0, (outs GPR:$rd),
84 opcodestr, "$rd, $rs1, $rs2, $uimm2"> {
92 class THShift_ri<bits<5> funct5, bits<3> funct3, string opcodestr>
93 : RVInstIShift<funct5, funct3, OPC_CUSTOM_0, (outs GPR:$rd),
95 opcodestr, "$rd, $rs1, $shamt">;
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchLBTInstrFormats.td13 // rd/sd - destination register operand.
41 bits<3> imm3;
63 // <opcode | I4 | rd>
65 : LAInst<(outs GPR:$rd), (ins uimm4:$imm4),
66 deriveInsnMnemonic<NAME>.ret, "$rd, $imm4"> {
68 bits<5> rd;
72 let Inst{4-0} = rd;
89 // <opcode | rd | I5 | I4>
100 let Inst{3-0} = imm4;
104 // <opcode | rd | I5 | I8>
[all …]
H A DLoongArchInstrFormats.td13 // rd - destination register operand.
50 // <opcode | rj | rd>
55 bits<5> rd;
59 let Inst{4-0} = rd;
62 // 3R-type
63 // <opcode | rk | rj | rd>
69 bits<5> rd;
74 let Inst{4-0} = rd;
77 // 3RI2-type
78 // <opcode | I2 | rk | rj | rd>
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrInfo.td23 SDTCisVT<2, i32>, SDTCisVT<3, i32>]>;
29 def SDT_ARMCMov : SDTypeProfile<1, 3,
31 SDTCisVT<3, i32>]>;
39 def SDT_ARMBr2JT : SDTypeProfile<0, 3,
46 SDTCisVT<3, i32>, SDTCisVT<4, i32>,
66 def SDT_ARMPREFETCH : SDTypeProfile<0, 3, [SDTCisPtrTy<0>, SDTCisSameAs<1, 2>,
71 def SDT_ARMBFI : SDTypeProfile<1, 3, [SDTCisVT<0, i32>, SDTCisVT<1, i32>,
72 SDTCisVT<2, i32>, SDTCisVT<3, i32>]>;
76 def SDT_ARMMEMCPY : SDTypeProfile<2, 3, [SDTCisVT<0, i32>, SDTCisVT<1, i32>,
77 SDTCisVT<2, i32>, SDTCisVT<3, i32>,
[all …]
H A DARMInstrThumb2.td346 ComplexPattern<i32, 3, "SelectT2AddrModeSoReg", []> {
445 bits<4> Rd;
448 let Inst{11-8} = Rd;
458 bits<4> Rd;
462 let Inst{11-8} = Rd;
484 bits<4> Rd;
487 let Inst{11-8} = Rd;
488 let Inst{3-0} = ShiftedRm{3-0};
497 bits<4> Rd;
500 let Inst{11-8} = Rd;
[all …]
H A DARMInstrThumb.td338 def : tHintAlias<"wfi$p", (tHINT 3, pred:$p), 1>; // A8.6.409
370 let Inst{3} = end;
380 bits<3> iflags;
383 let Inst{3} = 0;
394 bits<3> dst;
395 let Inst{6-3} = 0b1111; // Rm = pc
399 // ADD <Rd>, sp, #<imm8>
407 bits<3> dst;
460 let Inst{7} = Rdn{3};
461 let Inst{6-3} = 0b1101;
[all …]
/freebsd/sys/arm64/arm64/
H A Ddisassem.c47 #define OP_SF32 (1UL << 3) /* Force 32-bit access */
49 #define OP_RD_SP (1UL << 7) /* Use sp for RD otherwise xzr */
95 * OP <RD>, <RN>, <RM>{, <shift [LSL, LSR, ASR]> #imm} SF32/64
96 * OP <RD>, <RN>, #<imm>{, <shift [0, 12]>} SF32/64
97 * OP <RD>, <RM> {, <shift> #<imm> }
114 * OP <RD>, <RN|SP>, <RM> {, <extend> { #<amount> } }
160 { "add", "SF(1)|0001011|SHIFT(2)|0|RM(5)|IMM(6)|RN(5)|RD(5)",
162 { "mov", "SF(1)|001000100000000000000|RN(5)|RD(5)",
164 { "add", "SF(1)|0010001|SHIFT(2)|IMM(12)|RN(5)|RD(5)",
168 { "adds", "SF(1)|0101011|SHIFT(2)|0|RM(5)|IMM(6)|RN(5)|RD(5)",
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/freebsd/contrib/unbound/sldns/
H A Dstr2wire.c352 case LDNS_RDF_TYPE_WKS : /* it is the last rd field. */ in rrinternal_get_delims()
1115 if (key_len >= 4 && key_len <= 8 && !strncmp(key, "key", 3)) { in sldns_str2wire_svcparam_key_lookup()
1116 memcpy(buf, key + 3, key_len - 3); in sldns_str2wire_svcparam_key_lookup()
1117 buf[key_len - 3] = 0; in sldns_str2wire_svcparam_key_lookup()
1126 case 3: in sldns_str2wire_svcparam_key_lookup()
1173 sldns_str2wire_svcparam_port(const char* val, uint8_t* rd, size_t* rd_len) in sldns_str2wire_svcparam_port() argument
1187 sldns_write_uint16(rd, SVCB_KEY_PORT); in sldns_str2wire_svcparam_port()
1188 sldns_write_uint16(rd + 2, sizeof(uint16_t)); in sldns_str2wire_svcparam_port()
1189 sldns_write_uint16(rd + 4, port); in sldns_str2wire_svcparam_port()
1199 sldns_str2wire_svcbparam_ipv4hint(const char* val, uint8_t* rd, size_t* rd_len) in sldns_str2wire_svcbparam_ipv4hint() argument
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrFormats.td33 def DestructiveBinaryImm : DestructiveInstTypeEnum<3>;
48 class SMEMatrixTypeEnum<bits<3> val> {
49 bits<3> Value = val;
54 def SMEMatrixTileS : SMEMatrixTypeEnum<3>;
86 let TSFlags{6-3} = DestructiveInstType.Value;
358 // Authenticated loads for v8.3 can have scaled 10-bit immediate offsets.
569 return CurDAG->getTargetConstant(N->getSExtValue() / 3, SDLoc(N), MVT::i64);
593 def SImm4s3Operand : SImmScaledMemoryIndexed<4, 3>;
612 [{ return Imm >=-24 && Imm <= 21 && (Imm % 3) == 0x0; }], SImmS3XForm> {
613 let PrintMethod = "printImmScale<3>";
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMicroMipsInstrFormats.td57 bits<3> rd;
58 bits<3> rt;
59 bits<3> rs;
64 let Inst{9-7} = rd;
66 let Inst{3-1} = rs;
71 bits<3> rd;
72 bits<3> rs;
78 let Inst{9-7} = rd;
80 let Inst{3-0} = imm;
84 bits<3> rt;
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCDuplexInfo.cpp198 // Rd = memw(Rs+#u4:2) in getDuplexCandidateGroup()
199 // Rd = memub(Rs+#u4:0) in getDuplexCandidateGroup()
204 // Rd = memw(r29+#u5:2) in getDuplexCandidateGroup()
210 // Rd = memw(Rs+#u4:2) in getDuplexCandidateGroup()
218 // Rd = memub(Rs+#u4:0) in getDuplexCandidateGroup()
230 // Rd = memh/memuh(Rs+#u3:1) in getDuplexCandidateGroup()
231 // Rd = memb(Rs+#u3:0) in getDuplexCandidateGroup()
232 // Rd = memw(r29+#u5:2) - Handled above. in getDuplexCandidateGroup()
233 // Rdd = memd(r29+#u5:3) in getDuplexCandidateGroup()
239 // Rd = memh/memuh(Rs+#u3:1) in getDuplexCandidateGroup()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRInstrFormats.td68 bits<5> rd;
74 let Inst{8 - 4} = rd;
75 let Inst{3 - 0} = rr{3 - 0};
79 // Instruction of the format `<mnemonic> Z, Rd`
82 class FZRd<bits<3> t, dag outs, dag ins, string asmstr, list<dag> pattern>
84 bits<5> rd;
89 let Inst{8} = rd{4};
91 let Inst{7 - 4} = rd{3
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