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Searched +full:3 +full:_chan (Results 1 – 12 of 12) sorted by relevance

/freebsd/sys/dev/rtwn/rtl8192c/
H A Dr92c_var.h62 int rf_read_delay[3];
67 #define rtwn_r92c_set_bw20(_sc, _chan) \ argument
68 ((R92C_SOFTC(_sc)->rs_set_bw20)((_sc), (_chan)))
/freebsd/sys/dev/ath/ath_hal/ar5212/
H A Dar5212.h28 ( (4 * dcu) + (idx < 32 ? 0 : (idx < 64 ? 1 : (idx < 96 ? 2 : 3))) )
30 (AR_D_TXBLK_BASE + ((mmr & 0x1f) << 6) + ((mmr & 0x20) >> 3))
162 int firstep[3];
414 #define SAVE_CCK(_ah, _chan, _flag) do { \ argument
416 (((_chan)->ic_flags) & IEEE80211_CHAN_CCK)) { \
417 (_chan)->ic_flags &= ~IEEE80211_CHAN_CCK; \
418 (_chan)->ic_flags |= IEEE80211_CHAN_DYN; \
423 #define RESTORE_CCK(_ah, _chan, _flag) do { \ argument
425 (_chan)->ic_flags &= ~IEEE80211_CHAN_DYN; \
426 (_chan)->ic_flags |= IEEE80211_CHAN_CCK; \
/freebsd/contrib/wpa/wpa_supplicant/
H A Dmbo.c158 size_t size = end - start + 3; in wpas_mbo_non_pref_chan_attr()
238 if (len < MBO_IE_HEADER + 3 + 7 + in wpas_mbo_ie()
239 ((wpa_s->enable_oce & OCE_STA) ? 3 : 0)) in wpas_mbo_ie()
370 * The shortest channel configuration is 7 characters - 3 colons and in wpas_mbo_update_non_pref_chan()
384 unsigned int _chan; in wpas_mbo_update_non_pref_chan() local
403 &_chan, &_preference, &_reason); in wpas_mbo_update_non_pref_chan()
405 _oper_class > 255 || _chan > 255 || in wpas_mbo_update_non_pref_chan()
412 chan->chan = _chan; in wpas_mbo_update_non_pref_chan()
489 mbo_ie[3] != MBO_OUI_TYPE) in wpas_mbo_ie_trans_req()
585 u8 reject_attr[3]; in wpas_mbo_ie_bss_trans_reject()
/freebsd/sys/dev/ath/
H A Dif_athvar.h1059 #define ath_hal_reset(_ah, _opmode, _chan, _fullreset, _resettype, _pstatus) \ argument
1060 ((*(_ah)->ah_reset)((_ah), (_opmode), (_chan), (_fullreset), \
1130 #define ath_hal_setchannel(_ah, _chan) \ argument
1131 ((*(_ah)->ah_setChannel)((_ah), (_chan)))
1132 #define ath_hal_calibrate(_ah, _chan, _iqcal) \ argument
1133 ((*(_ah)->ah_perCalibration)((_ah), (_chan), (_iqcal)))
1134 #define ath_hal_calibrateN(_ah, _chan, _lcal, _isdone) \ argument
1135 ((*(_ah)->ah_perCalibrationN)((_ah), (_chan), 0x1, (_lcal), (_isdone)))
1136 #define ath_hal_calreset(_ah, _chan) \ argument
1137 ((*(_ah)->ah_resetCalValid)((_ah), (_chan)))
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/freebsd/sys/contrib/device-tree/Bindings/dma/ti/
H A Dk3-pktdma.yaml189 <0x2e>, /* FLOW_SAUL_RX_0/1_CHAN */
190 <0x32>, /* FLOW_SAUL_RX_2/3_CHAN */
/freebsd/sys/contrib/dev/iwlwifi/
H A Diwl-fh.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
93 * Bits 3:0:
269 * 3- 0: reserved
416 #define RFH_RXF_DMA_MIN_RB_4_8 (3 << RFH_RXF_DMA_MIN_RB_SIZE_POS)
462 * 3: Enable internal DMA requests (1, normal operation), disable (0)
551 #define FH_TX_TRB_REG(_chan) (FH_MEM_LOWER_BOUND + 0x958 + (_chan) * 4) argument
592 /* cb size is the exponent - 3 */
593 #define TFD_QUEUE_CB_SIZE(x) (ilog2(x) - 3)
694 u8 __reserved1[3];
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/freebsd/sys/dev/ath/ath_hal/
H A Dah_internal.h66 HAL_TP_SCALE_50 = 1, /* 50% of max (-3 dBm) */
68 HAL_TP_SCALE_12 = 3, /* 12% of max (-9 dBm) */
150 #define HAL_NUM_NF_READINGS 6 /* 3 chains * (ctl + ext) */
460 #define ath_hal_getpowerlimits(_ah, _chan) \ argument
461 AH_PRIVATE(_ah)->ah_getChipPowerLimits(_ah, _chan)
478 (ath_hal_getcapability(_ah, HAL_CAP_RFSILENT, 3, AH_NULL) == HAL_OK)
501 #define IEEE80211_WEP_IVLEN 3 /* 24bit */
578 (((const uint8_t *)(p))[2]<<16) | (((const uint8_t *)(p))[3]<<24)))
625 __printflike(2,3);
654 __printflike(3,4);
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/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am62-main.dtsi22 #interrupt-cells = <3>;
131 #dma-cells = <3>;
173 <0x2e>, /* FLOW_SAUL_RX_0/1_CHAN */
174 <0x32>; /* FLOW_SAUL_RX_2/3_CHAN */
256 assigned-clock-parents = <&k3_clks 36 3>;
268 assigned-clock-parents = <&k3_clks 37 3>;
280 assigned-clock-parents = <&k3_clks 38 3>;
292 assigned-clock-parents = <&k3_clks 39 3>;
304 assigned-clock-parents = <&k3_clks 40 3>;
316 assigned-clock-parents = <&k3_clks 41 3>;
[all …]
H A Dk3-am62a-main.dtsi28 #interrupt-cells = <3>;
129 #dma-cells = <3>;
169 <0x2e>, /* FLOW_SAUL_RX_0/1_CHAN */
170 <0x32>; /* FLOW_SAUL_RX_2/3_CHAN */
204 #dma-cells = <3>;
283 assigned-clock-parents = <&k3_clks 36 3>;
295 assigned-clock-parents = <&k3_clks 37 3>;
307 assigned-clock-parents = <&k3_clks 38 3>;
319 assigned-clock-parents = <&k3_clks 39 3>;
331 assigned-clock-parents = <&k3_clks 40 3>;
[all …]
H A Dk3-am62p-j722s-common-main.dtsi20 #interrupt-cells = <3>;
110 #dma-cells = <3>;
154 <0x2e>, /* FLOW_SAUL_RX_0/1_CHAN */
155 <0x32>; /* FLOW_SAUL_RX_2/3_CHAN */
187 #dma-cells = <3>;
275 assigned-clock-parents = <&k3_clks 36 3>;
288 assigned-clock-parents = <&k3_clks 37 3>;
300 assigned-clock-parents = <&k3_clks 38 3>;
312 assigned-clock-parents = <&k3_clks 39 3>;
324 assigned-clock-parents = <&k3_clks 40 3>;
[all …]
H A Dk3-am64-main.dtsi79 #interrupt-cells = <3>;
150 #dma-cells = <3>;
198 <0x2e>, /* FLOW_SAUL_RX_0/1_CHAN */
199 <0x32>, /* FLOW_SAUL_RX_2/3_CHAN */
586 ti,sci-dev-id = <3>;
651 clocks = <&k3_clks 58 3>, <&k3_clks 58 4>;
730 cpts@3d000 {
802 assigned-clock-parents = <&k3_clks 0 3>;
1045 #address-cells = <3>;
1060 #pwm-cells = <3>;
[all …]
/freebsd/sys/dev/iwm/
H A Dif_iwmreg.h111 * 3-2: Revision step: 0 = A, 1 = B, 2 = C, 3 = D
158 * 3-2: 0 = A, 1 = B, 2 = C, 3 = D step
204 #define IWM_CSR_INT_BIT_SW_RX (1 << 3) /* Rx, command responses */
263 * 3: MAC_ACCESS_REQ
367 * 3: CT_KILL_EXIT
526 #define IWM_RFH_RXF_DMA_MIN_RB_4_8 (3 << IWM_RFH_RXF_DMA_MIN_RB_SIZE_POS)
603 * 24-25: (# bytes - 1) to read or write (e.g. 3 for dword)
799 #define IWM_UCODE_TLV_FLAGS_P2P (1 << 3)
1797 IWM_FH_TX_TRB_REG(_chan) global() argument
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