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/freebsd/sys/contrib/dev/iwlwifi/mvm/
H A Drfi.c11 * DDR needs frequency in units of 16.666MHz, so provide FW with the
15 /* frequency 2667MHz */
20 /* frequency 2933MHz */
27 /* frequency 3200MHz */
32 /* frequency 3733MHz */
37 /* frequency 4000MHz */
42 /* frequency 4267MHz */
47 /* frequency 4400MHz */
52 /* frequency 5200MHz */
57 /* frequency 5600MHz */
[all...]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mm-data-modul-edm-sbc.dts281 /* IMX8MM ERRATA e7805 -- I2C is limited to 384 kHz due to SoC bug */
416 /* IMX8MM ERRATA e7805 -- I2C is limited to 384 kHz due to SoC bug */
458 /* IMX8MM ERRATA e7805 -- I2C is limited to 384 kHz due to SoC bug */
469 /* IMX8MM ERRATA e7805 -- I2C is limited to 384 kHz due to SoC bug */
819 pinctrl_usdhc2_100mhz: usdhc2-100mhz-grp {
833 pinctrl_usdhc2_200mhz: usdhc2-200mhz-grp {
864 pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {
881 pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {
/freebsd/sys/net80211/
H A Dieee80211_regdomain.h90 CTRY_COTE_DIVOIRE = 384,
258 SKU_SR9 = 0x0298, /* Ubiquiti SR9 (900MHz/GSM) */
259 SKU_XR9 = 0x0299, /* Ubiquiti XR9 (900MHz/GSM) */
260 SKU_GZ901 = 0x029a, /* Zcomax GZ-901 (900MHz/GSM) */
261 SKU_XC900M = 0x029b, /* Xagyl XC900M (900MHz/GSM) */
266 * offset channel spacing (905MHz-
267 * 925MHz) versus the XR9 (907MHz-
268 * 922MHz), giving an extra channel.
/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dmmc-controller.yaml93 - for eMMC, the maximum supported frequency is 200MHz,
95 frequency of 208MHz,
97 384MHz.
/freebsd/crypto/libecc/
H A DREADME.md44 …* **Curves**: SECP{192,224,256,384,521}R1, SECP{192,224,256}K1, BRAINPOOLP{192,224,256,320,384,512…
45 …2-512-ParamSetTest, SM2P256V1, SM2P{192,256}Test, WEI{25519,448}, BIGN{256,384,512}V1. The library…
47 * **Hash functions**: SHA-2 and SHA-3 hash functions (224, 256, 384, 512), SM3, RIPEMD-160,
51 [STB 34.101.31-2011](https://github.com/bcrypto/belt)), and BASH-{224,256,384,512} (as standardized…
729 ([STM32F030R8T6](http://www.st.com/en/microcontrollers/stm32f030r8.html) @ 48MHz with 64KB of flash…
731 @ 72MHz with 64KB of flash and 20KB of RAM). The results of the flash/RAM occupancy are given in th…
740 | **libecc** | STM32F103C8T6 (Cortex-M3 @ 72MHz) | STM32F030R8T6 (Cortex-M0 @ 48MHz) |
752 | **mbedTLS** | LPC1768 (Cortex-M3 @ 92MHz)<sup>1</sup> |
910 …src/hash/sha3-384.o src/hash/sha224.o src/hash/hash_algs.o src/sig/ecsdsa.o src/sig/ecdsa.o src/si…
/freebsd/contrib/wpa/hostapd/
H A Dhostapd.conf627 # Supported channel width set: [HT40-] = both 20 MHz and 40 MHz with secondary
628 # channel below the primary channel; [HT40+] = both 20 MHz and 40 MHz
630 # (20 MHz only if neither is set)
639 # Please note that 40 MHz channels may switch their primary and secondary
640 # channels if needed or creation of 40 MHz channel maybe rejected based
642 # is setting up the 40 MHz channel.
644 # Short GI for 20 MHz: [SHORT-GI-20] (disabled if not set)
645 # Short GI for 40 MHz: [SHORT-GI-40] (disabled if not set)
653 # DSSS/CCK Mode in 40 MHz: [DSSS_CCK-40] = allowed (not allowed if not set)
654 # 40 MHz intolerant [40-INTOLERANT] (not advertised if not set)
[all …]
/freebsd/sys/dev/sound/pci/
H A Denvy24.h65 /* 00: 22.5792MHz(44.1kHz*512) */
66 /* 01: 16.9344MHz(44.1kHz*384) */
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3399-gru.dtsi159 regulator-settling-time-up-us = <384>;
523 * Signal integrity isn't great at 200 MHz and 150 MHz (DDR) gives the
/freebsd/contrib/wpa/wpa_supplicant/
H A Dconfig_ssid.h516 * frequency - Channel frequency in megahertz (MHz) for IBSS
627 * megahertz (MHz) to include in scan requests when searching for this
660 * megahertz (MHz) to allow for selecting the BSS. If set, scan results
746 * ht40_intolerant - Indicate 40 MHz intolerant for this network
1136 * Groups 19 (NIST P-256), 20 (NIST P-384), and 21 (NIST P-521) are
H A Dwpa_supplicant.conf453 # 20 (NIST P-384) and 21 (NIST P-521) are also enabled. If this parameter is
945 # frequency: Channel frequency in megahertz (MHz) for IBSS, e.g.,
964 # Space-separated list of frequencies in MHz to scan when searching for this
970 # Space-separated list of frequencies in MHz to allow for selecting the BSS. If
1584 # Groups 19 (NIST P-256), 20 (NIST P-384), and 21 (NIST P-521) are
1650 # ht40_intolerant: Whether 40 MHz intolerant should be indicated.
1651 # 0 = 40 MHz tolerant (default)
1652 # 1 = 40 MHz intolerant
/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dtegra234-clock.h200 /** Fixed 100MHz PLL for PCIe, SATA and superspeed USB */
206 /** Fixed frequency 960MHz PLL for USB and EAVB */
539 /** @brief Fixed 48MHz clock divided down from utmipll */
541 /** @brief Fixed 480MHz clock divided down from utmipll */
712 #define TEGRA234_CLK_MGBE1_TX_PCS 384U
/freebsd/contrib/wpa/src/common/
H A Dqca-vendor.h448 * QCA_WLAN_VENDOR_ATTR_MAC_ADDR and optionally frequency (MHz) in
1091 * (CU) of each 20 MHz sub-channel of the entire connected channel using
1584 /* Frequency in MHz, various uses. Unsigned 32 bit value */
1851 /* A 32-bit unsigned value; the P2P listen frequency (MHz); must be one
1934 * channel width (in MHz).
1947 * 20 MHz, 40 MHz, and 80 MHz channels. The value is the center frequency index
1948 * of the primary 80 MHz segment for 160 MHz and 80+80 MHz channels.
1958 * ACS operation. The value is zero for 20 MHz, 40 MHz, and 80 MHz channels.
1959 * The value is the index of the channel center frequency for 160 MHz channels
1960 * and the center frequency index of the secondary 80 MHz segment for 80+80 MHz
[all …]
H A Ddpp.c548 wpa_printf(MSG_DEBUG, "DPP: Peer channel %u MHz not supported", freq); in dpp_channel_ok_init()
4410 } else if (os_strcmp(token, "P-384") == 0) { in dpp_parse_supported_curves_list()
4416 } else if (os_strcmp(token, "BP-384") == 0) { in dpp_parse_supported_curves_list()
4565 const char *curve[6] = { "P-256", "P-384", "P-521", in dpp_bootstrap_info()
4566 "BP-256", "BP-384", "BP-512" }; in dpp_bootstrap_info()
4722 "DPP: Could not determine operating class or channel number for %u MHz", in dpp_nfc_update_bi_channel()
4727 …"DPP: Selected %u MHz (op_class %u channel %u) as the negotiation channel based on information fro… in dpp_nfc_update_bi_channel()
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsdx75.dtsi55 capacity-dmips-mhz = <1024>;
81 capacity-dmips-mhz = <1024>;
102 capacity-dmips-mhz = <1024>;
123 capacity-dmips-mhz = <1024>;
1506 rpmhpd_opp_turbo: opp-384 {
H A Dsdm630.dtsi62 capacity-dmips-mhz = <1126>;
82 capacity-dmips-mhz = <1126>;
97 capacity-dmips-mhz = <1126>;
112 capacity-dmips-mhz = <1126>;
127 capacity-dmips-mhz = <1024>;
147 capacity-dmips-mhz = <1024>;
162 capacity-dmips-mhz = <1024>;
177 capacity-dmips-mhz = <1024>;
266 exit-latency-us = <384>;
H A Dsm8650.dtsi83 capacity-dmips-mhz = <1024>;
116 capacity-dmips-mhz = <1024>;
136 capacity-dmips-mhz = <1792>;
163 capacity-dmips-mhz = <1792>;
183 capacity-dmips-mhz = <1792>;
210 capacity-dmips-mhz = <1792>;
237 capacity-dmips-mhz = <1792>;
264 capacity-dmips-mhz = <1894>;
5170 rpmhpd_opp_turbo: opp-384 {
/freebsd/sys/contrib/dev/athk/ath11k/
H A Dwmi.h2123 WMI_MAX_EXT2_SERVICE = 384
2194 * WMI_NSS_RATIO_1BY2_NSS -Max nss of 160MHz is equals to half of the max nss
2195 * of 80MHz
2196 * WMI_NSS_RATIO_3BY4_NSS - Max nss of 160MHz is equals to 3/4 of the max nss
2197 * of 80MHz
2198 * WMI_NSS_RATIO_1_NSS - Max nss of 160MHz is equals to the max nss of 80MHz
2199 * WMI_NSS_RATIO_2_NSS - Max nss of 160MHz is equals to two times the max
2200 * nss of 80MHz
2699 u32 mhz; member
2895 /* Freq units in MHz */
[all …]
/freebsd/sys/arm/freescale/imx/
H A Dimx_i2c.c124 { 256, 0x33 }, { 288, 0x10 }, { 320, 0x34 }, { 384, 0x35 },
634 * pause() while waiting for transfer-complete. With a 66MHz IPG clock in i2c_reset()
/freebsd/sys/contrib/dev/athk/ath12k/
H A Dhal_desc.h56 * Sw_buffer_cookie[19:17] = 3'b000: 20 MHz TX only
57 * Sw_buffer_cookie[19:17] = 3'b001: 40 MHz TX only
58 * Sw_buffer_cookie[19:17] = 3'b010: 80 MHz TX only
59 * Sw_buffer_cookie[19:17] = 3'b011: 160 MHz TX only
60 * Sw_buffer_cookie[19:17] = 3'b101: 240 MHz TX only
61 * Sw_buffer_cookie[19:17] = 3'b100: 320 MHz TX only
457 HAL_SNOOP_MSDU_USR_DBG_INFO = 384 /* 0x180 */,
/freebsd/sys/contrib/device-tree/src/arm64/renesas/
H A Dr8a77961.dtsi153 capacity-dmips-mhz = <1024>;
167 capacity-dmips-mhz = <1024>;
183 capacity-dmips-mhz = <535>;
196 capacity-dmips-mhz = <535>;
209 capacity-dmips-mhz = <535>;
222 capacity-dmips-mhz = <535>;
2165 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
H A Dr8a77951.dtsi153 capacity-dmips-mhz = <1024>;
167 capacity-dmips-mhz = <1024>;
181 capacity-dmips-mhz = <1024>;
195 capacity-dmips-mhz = <1024>;
211 capacity-dmips-mhz = <535>;
224 capacity-dmips-mhz = <535>;
237 capacity-dmips-mhz = <535>;
250 capacity-dmips-mhz = <535>;
2414 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
H A Dr8a77960.dtsi153 capacity-dmips-mhz = <1024>;
167 capacity-dmips-mhz = <1024>;
183 capacity-dmips-mhz = <535>;
196 capacity-dmips-mhz = <535>;
209 capacity-dmips-mhz = <535>;
222 capacity-dmips-mhz = <535>;
2285 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
/freebsd/contrib/file/magic/Magdir/
H A Daudio513 # 24.576 MHz (video/fs=48kHz), 22.5792 (audio/fs=44.1kHz) and
530 >>17 belong&0xfffff0 0x5dc000 \b, 384 kHz
625 384 string LockStream LockStream Embedded file (mostly MP3 on old Nokia phones)
/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_init_fw_funcs.c47 { 400, 336, 352, 304, 304, 384, 416, 352}, /* region 3 offsets */
96 /* Period in 25MHz cycles */
946 /* Period in 25MHz cycles */
/freebsd/sys/dev/sfxge/common/
H A Defx_regs_mcdi.h1361 * Hz) is rounded to the nearest MHz (e.g. 666000000 for 666666666).
12580 /* System frequency, MHz */
12583 /* DPCPU frequency, MHz */
12598 /* Requested frequency in MHz for system clock domain */
12603 /* Requested frequency in MHz for inter-core clock domain */
12608 /* Requested frequency in MHz for DPCPU clock domain */
12613 /* Requested frequency in MHz for PCS clock domain */
12618 /* Requested frequency in MHz for MC clock domain */
12623 /* Requested frequency in MHz for rmon clock domain */
12628 /* Requested frequency in MHz for vswitch clock domain */
[all …]

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