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/linux/arch/arm64/boot/dts/qcom/
H A Dsa8540p.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 /delete-node/ &cpu0_opp_table;
10 /delete-node/ &cpu4_opp_table;
13 cpu0_opp_table: opp-table-cpu0 {
14 compatible = "operating-points-v2";
15 opp-shared;
17 opp-300000000 {
18 opp-hz = /bits/ 64 <300000000>;
19 opp-peak-kBps = <(300000 * 32)>;
21 opp-403200000 {
[all …]
H A Dsm8650.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
7 #include <dt-bindings/clock/qcom,rpmh.h>
8 #include <dt-bindings/clock/qcom,sm8650-camcc.h>
9 #include <dt-bindings/clock/qcom,sm8650-dispcc.h>
10 #include <dt-bindings/clock/qcom,sm8650-gcc.h>
11 #include <dt-bindings/clock/qcom,sm8650-gpucc.h>
12 #include <dt-bindings/clock/qcom,sm8650-tcsr.h>
13 #include <dt-bindings/clock/qcom,sm8650-videocc.h>
14 #include <dt-bindings/dma/qcom-gpi.h>
[all …]
/linux/fs/hfs/
H A Dbitmap.c4 * Copyright (C) 1996-1997 Paul H. Hargrove
11 * search/set/clear bits.
20 * Given a block of memory, its length in bits, and a starting bit number,
21 * determine the number of the first zero bits (in left-to-right ordering)
24 * Returns >= 'size' if no zero bits are found in the range.
26 * Accesses memory in 32-bit aligned chunks of 32-bits and thus
40 curr = bitmap + (offset / 32); in hfs_find_set_zero_bits()
41 end = bitmap + ((size + 31) / 32); in hfs_find_set_zero_bits()
43 /* scan the first partial u32 for zero bits */ in hfs_find_set_zero_bits()
47 i = offset % 32; in hfs_find_set_zero_bits()
[all …]
/linux/Documentation/filesystems/ext4/
H A Dgroup_descr.rst1 .. SPDX-License-Identifier: GPL-2.0
4 -----------------------
25 meta-block group. The flex_bg and meta_bg features are not mutually
29 block group descriptor was only 32 bytes long and therefore ends at
37 checksum is the lower 16 bits of the checksum of the FS UUID, the group
44 .. list-table::
46 :header-rows: 1
48 * - Offset
49 - Size
50 - Name
[all …]
/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-h616-cpu-opp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 cpu_opp_table: opp-table-cpu {
6 compatible = "allwinner,sun50i-h616-operating-points";
7 nvmem-cells = <&cpu_speed_grade>;
8 opp-shared;
10 opp-480000000 {
11 opp-hz = /bits/ 64 <480000000>;
12 opp-microvolt = <900000>;
13 clock-latency-ns = <244144>; /* 8 32k periods */
14 opp-supported-hw = <0x3f>;
[all …]
H A Dsun50i-h5-cpu-opp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 // Copyright (C) 2020 Chen-Yu Tsai <wens@csie.org>
5 cpu_opp_table: opp-table-cpu {
6 compatible = "operating-points-v2";
7 opp-shared;
9 opp-408000000 {
10 opp-hz = /bits/ 64 <408000000>;
11 opp-microvolt = <1000000 1000000 1310000>;
12 clock-latency-ns = <244144>; /* 8 32k periods */
15 opp-648000000 {
[all …]
H A Dsun50i-a64-cpu-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 cpu0_opp_table: opp-table-cpu {
8 compatible = "operating-points-v2";
9 opp-shared;
11 opp-648000000 {
12 opp-hz = /bits/ 64 <648000000>;
13 opp-microvolt = <1040000>;
14 clock-latency-ns = <244144>; /* 8 32k periods */
17 opp-816000000 {
18 opp-hz = /bits/ 64 <816000000>;
[all …]
H A Dsun50i-h6-cpu-opp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 cpu_opp_table: opp-table-cpu {
7 compatible = "allwinner,sun50i-h6-operating-points";
8 nvmem-cells = <&cpu_speed_grade>;
9 opp-shared;
11 opp-480000000 {
12 clock-latency-ns = <244144>; /* 8 32k periods */
13 opp-hz = /bits/ 64 <480000000>;
15 opp-microvolt-speed0 = <880000 880000 1200000>;
16 opp-microvolt-speed1 = <820000 820000 1200000>;
[all …]
H A Dsun50i-a100-cpu-opp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 cpu_opp_table: opp-table-cpu {
7 compatible = "allwinner,sun50i-a100-operating-points";
8 nvmem-cells = <&cpu_speed_grade>;
9 opp-shared;
11 opp-408000000 {
12 clock-latency-ns = <244144>; /* 8 32k periods */
13 opp-hz = /bits/ 64 <408000000>;
15 opp-microvolt-speed0 = <900000>;
16 opp-microvolt-speed1 = <900000>;
[all …]
/linux/arch/parisc/include/asm/
H A Delf.h1 /* SPDX-License-Identifier: GPL-2.0 */
28 #define EFA_PARISC_1_0 0x020b /* PA-RISC 1.0 big-endian. */
29 #define EFA_PARISC_1_1 0x0210 /* PA-RISC 1.1 big-endian. */
30 #define EFA_PARISC_2_0 0x0214 /* PA-RISC 2.0 big-endian. */
60 #define R_PARISC_DIR32 1 /* Direct 32-bit reference. */
61 #define R_PARISC_DIR21L 2 /* Left 21 bits of eff. address. */
62 #define R_PARISC_DIR17R 3 /* Right 17 bits of eff. address. */
63 #define R_PARISC_DIR17F 4 /* 17 bits of eff. address. */
64 #define R_PARISC_DIR14R 6 /* Right 14 bits of eff. address. */
65 #define R_PARISC_PCREL32 9 /* 32-bit rel. address. */
[all …]
/linux/drivers/clocksource/
H A Dtimer-stm32.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Inspired by time-efm32.c from Uwe Kleine-Koenig
23 #include "timer-of.h"
50 int bits; member
54 * stm32_timer_of_bits_set - set accessor helper
56 * @bits: the number of bits (16 or 32)
58 * Accessor helper to set the number of bits in the timer-of private
62 static void stm32_timer_of_bits_set(struct timer_of *to, int bits) in stm32_timer_of_bits_set() argument
64 struct stm32_timer_private *pd = to->private_data; in stm32_timer_of_bits_set()
66 pd->bits = bits; in stm32_timer_of_bits_set()
[all …]
/linux/include/linux/
H A Dhash.h14 #if BITS_PER_LONG == 32
16 #define hash_long(val, bits) hash_32(val, bits) argument
18 #define hash_long(val, bits) hash_64(val, bits) argument
21 #error Wordsize not 32 or 64
26 * high bits. Since multiplication propagates changes to the most
27 * significant end only, it is essential that the high bits of the
31 * http://www.citi.umich.edu/techreports/reports/citi-tr-00-1.pdf
34 * ratio phi = (sqrt(5)-1)/2, or its negative, has particularly nice
37 * These are the negative, (1 - phi) = phi**2 = (3 - sqrt(5))/2,
51 * the arch-optimized versions with the generic.
[all …]
/linux/tools/include/linux/
H A Dhash.h14 #if BITS_PER_LONG == 32
16 #define hash_long(val, bits) hash_32(val, bits) argument
18 #define hash_long(val, bits) hash_64(val, bits) argument
21 #error Wordsize not 32 or 64
26 * high bits. Since multiplication propagates changes to the most
27 * significant end only, it is essential that the high bits of the
31 * http://www.citi.umich.edu/techreports/reports/citi-tr-00-1.pdf
34 * ratio phi = (sqrt(5)-1)/2, or its negative, has particularly nice
37 * These are the negative, (1 - phi) = phi**2 = (3 - sqrt(5))/2,
51 * the arch-optimized versions with the generic.
[all …]
/linux/lib/tests/
H A Dffs_kunit.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * KUnit tests for ffs()-family functions
13 int expected_ffs; /* ffs() result (1-based) */
14 int expected_fls; /* fls() result (1-based) */
20 int expected_fls64; /* fls64() result (1-based) */
21 unsigned int expected_ffs64_0based; /* __ffs64() result (0-based) */
26 * Basic edge cases - core functionality validation
29 /* Zero case - special handling */
32 /* Single bit patterns - powers of 2 */
45 {0x80000000, 32, 32, "bit 31 set (sign bit)"},
[all …]
/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
H A Dphy_qmath.c1 // SPDX-License-Identifier: ISC
10 * To fit the output into 16 bits the 32 bit multiplication result is right
11 * shifted by 16 bits.
20 * in 16 bits. To fit the multiplication result into 16 bits the multiplication
21 * result is right shifted by 15 bits. Right shifting 15 bits instead of 16 bits
38 * Description: This function add two 32 bit numbers and return the 32bit
39 * result. If the result overflow 32 bits, the output will be saturated to
40 * 32bits.
56 * result. If the result overflow 16 bits, the output will be saturated to
57 * 16bits.
[all …]
/linux/arch/mips/cavium-octeon/executive/
H A Dcvmx-helper-jtag.c8 * Copyright (c) 2003-2008 Cavium Networks
15 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
22 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
36 #include <asm/octeon/cvmx-helper-jtag.h>
50 uint32_t divisor = cvmx_sysinfo_get()->cpu_clock_hz / (25 * 1000000); in cvmx_helper_qlm_jtag_init()
51 divisor = (divisor - 1) >> 2; in cvmx_helper_qlm_jtag_init()
74 * Write up to 32bits into the QLM jtag chain. Bits are shifted
76 * order bits followed by the high order bits. The JTAG chain is
77 * 4 * 268 bits long, or 1072.
80 * @bits: Number of bits to shift in (1-32).
[all …]
/linux/include/uapi/linux/
H A Dvirtio_snd.h1 /* SPDX-License-Identifier: BSD-3-Clause */
11 * FEATURE BITS
132 /* 0 ... virtio_snd_config::jacks - 1 */
172 /* 0 ... virtio_snd_config::streams - 1 */
188 VIRTIO_SND_PCM_FMT_IMA_ADPCM = 0, /* 4 / 4 bits */
189 VIRTIO_SND_PCM_FMT_MU_LAW, /* 8 / 8 bits */
190 VIRTIO_SND_PCM_FMT_A_LAW, /* 8 / 8 bits */
191 VIRTIO_SND_PCM_FMT_S8, /* 8 / 8 bits */
192 VIRTIO_SND_PCM_FMT_U8, /* 8 / 8 bits */
193 VIRTIO_SND_PCM_FMT_S16, /* 16 / 16 bits */
[all …]
/linux/Documentation/userspace-api/media/rc/
H A Drc-protos.rst1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later
22 Some remotes have a pointer-type device which can used to control the
29 rc-5 (RC_PROTO_RC5)
30 -------------------
32 This IR protocol uses manchester encoding to encode 14 bits. There is a
38 .. flat-table:: rc5 bits scancode mapping
41 * - rc-5 bit
43 - scancode bit
45 - description
47 * - 1
[all …]
/linux/arch/m68k/fpsp040/
H A Dround.S21 | round --- round result according to precision/mode
33 | d0{31:29} contains the g,r,s bits (extended)
36 | a0 is preserved and the g-r-s bits in d0 are cleared.
37 | The result is not typed - the tag field is invalid. The
41 | inexact (i.e. if any of the g-r-s bits were set).
51 | ;the appropriate g-r-s bits.
53 bne rnd_cont |lower bits to zero for size
117 asll #1,%d0 |shift g-bit to c-bit
124 | ext_grs --- extract guard, round and sticky bits
129 | The ext_grs extract the guard/round/sticky bits according to the
[all …]
/linux/Documentation/translations/pt_BR/process/
H A Dadding-syscalls.rst1 .. SPDX-License-Identifier: GPL-2.0
10 :ref:`Documentation/process/submitting-patches.rst <submittingpatches>`.
14 -----------------------------------
19 usuário (userspace) e o kernel, existem outras possibilidades -- escolha o que
22 - Se as operações envolvidas puderem ser moldadas para se parecerem com um
28 - Se a nova funcionalidade envolver operações em que o kernel notifica o
33 - No entanto, as operações que não se mapeiam para operações do tipo
38 - Se você estiver apenas expondo informações do sistema em tempo de execução,
45 - Se a operação for específica para um arquivo ou descritor de arquivo de um
52 - Se a operação for específica para uma tarefa (task) ou processo específico,
[all …]
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dpsp_gfx_if.h46 GFX_CTRL_CMD_ID_ENABLE_INT = 0x00050000, /* enable PSP-to-Gfx interrupt */
47 GFX_CTRL_CMD_ID_DISABLE_INT = 0x00060000, /* disable PSP-to-Gfx interrupt */
57 /*-----------------------------------------------------------------------------
64 * SRBM-to-PSP mailbox registers (total 8 registers).
73 … volatile uint32_t ring_addr_lo; /* +20 bits [31:0] of GPU Virtual of ring buffer (VMID=0)*/
74 …volatile uint32_t ring_addr_hi; /* +24 bits [63:32] of GPU Virtual of ring buffer (VMID=0) …
116 /* PSP boot config sub-commands */
133 …uint32_t app_phy_addr_lo; /* bits [31:0] of the GPU Virtual address of the TA binary…
134 …uint32_t app_phy_addr_hi; /* bits [63:32] of the GPU Virtual address of the TA binar…
136 …uint32_t cmd_buf_phy_addr_lo; /* bits [31:0] of the GPU Virtual address of CMD buffer (m…
[all …]
/linux/lib/crc/powerpc/
H A Dcrc-vpmsum-template.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
10 * The first step is to reduce it to 1024 bits. We do this in 8 parallel
12 * have more than 32 kB of data to checksum we repeat this step multiple
13 * times, passing in the previous 1024 bits.
15 * The next step is to reduce the 1024 bits to 64 bits. This step adds
16 * 32 bits of 0s to the end - this matches what a CRC does. We just
17 * calculate constants that land the data in this 32 bits.
20 * for n = CRC using POWER8 instructions. We use x = 32.
28 #include <asm/ppc-opcode.h>
66 std r31,-8(r1)
[all …]
/linux/drivers/usb/typec/tipd/
H A Dtps6598x.h1 /* SPDX-License-Identifier: GPL-2.0+ */
9 #include <linux/bits.h>
17 /* TPS_REG_STATUS bits */
85 /* TPS_REG_INT_* bits */
86 #define TPS_REG_INT_USER_VID_ALT_MODE_OTHER_VDM BIT_ULL(27+32)
87 #define TPS_REG_INT_USER_VID_ALT_MODE_ATTN_VDM BIT_ULL(26+32)
88 #define TPS_REG_INT_USER_VID_ALT_MODE_EXIT BIT_ULL(25+32)
89 #define TPS_REG_INT_USER_VID_ALT_MODE_ENTERED BIT_ULL(24+32)
90 #define TPS_REG_INT_EXIT_MODES_COMPLETE BIT_ULL(20+32)
91 #define TPS_REG_INT_DISCOVER_MODES_COMPLETE BIT_ULL(19+32)
[all …]
/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dcxgb4_tc_flower.h16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
58 ETH_DMAC_31_0, /* dmac bits 0.. 31 */
59 ETH_DMAC_47_32, /* dmac bits 32..47 */
60 ETH_SMAC_15_0, /* smac bits 0.. 15 */
61 ETH_SMAC_47_16, /* smac bits 16..47 */
63 IP4_SRC, /* 32-bit IPv4 src */
64 IP4_DST, /* 32-bit IPv4 dst */
66 IP6_SRC_31_0, /* src bits 0.. 31 */
67 IP6_SRC_63_32, /* src bits 63.. 32 */
[all …]
/linux/arch/arm/boot/dts/allwinner/
H A Dsun8i-a33.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 #include "sun8i-a23-a33.dtsi"
46 #include <dt-bindings/thermal/thermal.h>
49 cpu0_opp_table: opp-table-cpu {
50 compatible = "operating-points-v2";
51 opp-shared;
53 opp-120000000 {
54 opp-hz = /bits/ 64 <120000000>;
[all …]

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