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/linux/include/linux/mfd/
H A Dmotorola-cpcap.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * Copyright (C) 2007-2009 Motorola, Inc.
31 #define CPCAP_REG_INT3 0x0008 /* Interrupt 3 */
35 #define CPCAP_REG_INTM3 0x0018 /* Interrupt Mask 3 */
39 #define CPCAP_REG_INTS3 0x0028 /* Interrupt Sense 3 */
43 #define CPCAP_REG_ASSIGN3 0x0038 /* Resource Assignment 3 */
63 #define CPCAP_REG_MT3 0x0234 /* Memory Transfer 3 */
86 #define CPCAP_REG_S3C 0x061c /* Switcher 3 Control */
129 #define CPCAP_REG_MIPIS3 0x0840 /* MIPI Slimbus 3. */
148 #define CPCAP_REG_ADCD3 0x0c14 /* A/D Converter Data 3 */
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/linux/Documentation/iio/
H A Dad4000.rst1 .. SPDX-License-Identifier: GPL-2.0-only
41 * `AD7988-1 <https://www.analog.com/AD7988-1>`_
42 * `AD7988-5 <https://www.analog.com/AD7988-5>`_
45 ------------------
50 CS mode, 3-wire turbo mode
53 Datasheet "3-wire" mode is what most resembles standard SPI connection which,
56 "CS Mode, 3-Wire Turbo Mode" connection in datasheets.
57 NOTE: The datasheet definition of 3-wire mode for the AD4000 series is NOT the
58 same of standard spi-3wire mode.
62 Omit the ``adi,sdi-pin`` property in device tree to select this mode.
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/linux/Documentation/devicetree/bindings/display/panel/
H A Dtpo,tpg110.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Thierry Reding <thierry.reding@gmail.com>
17 and other properties, and has a control interface over 3WIRE
20 self-describing.
22 +--------+
23 SPI -> | TPO | -> physical display
24 RGB -> | TPG110 |
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H A Dleadtek,ltk035c5444t.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Leadtek ltk035c5444t 3.5" (640x480 pixels) 24-bit IPS LCD panel
10 - Paul Cercueil <paul@crapouillou.net>
11 - Christophe Branchereau <cbranchereau@gmail.com>
14 - $ref: panel-common.yaml#
15 - $ref: /schemas/spi/spi-peripheral-props.yaml#
24 spi-3wire: true
27 - compatible
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H A Dkingdisplay,kd035g6-54nt.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/kingdisplay,kd035g6-54nt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: King Display KD035G6-54NT 3.5" (320x240 pixels) 24-bit TFT LCD panel
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: panel-common.yaml#
14 - $ref: /schemas/spi/spi-peripheral-props.yaml#
18 const: kingdisplay,kd035g6-54nt
25 power-supply: true
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H A Dfascontek,fs035vg158.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Fascontek FS035VG158 3.5" (640x480 pixels) 24-bit IPS LCD panel
10 - John Watts <contact@jookia.org>
13 - $ref: panel-common.yaml#
14 - $ref: /schemas/spi/spi-peripheral-props.yaml#
23 spi-3wire: true
26 - compatible
27 - reg
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H A Danbernic,rg35xx-plus-panel.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/anbernic,rg35xx-plus-panel.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Anbernic RG35XX series (WL-355608-A8) 3.5" 640x480 24-bit IPS LCD panel
10 - Ryan Walklin <ryan@testtoast.com>
13 - $ref: panel-common.yaml#
14 - $ref: /schemas/spi/spi-peripheral-props.yaml#
19 - const: anbernic,rg35xx-plus-panel
20 - items:
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/linux/sound/ppc/
H A Dsnd_ps3_reg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
39 * three wire serial
40 * n:0..3
73 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
75 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
84 #define PS3_AUDIO_INTR_0_CHAN3 PS3_AUDIO_INTR_0_CHAN(3)
96 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
98 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
106 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
108 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
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/linux/drivers/iio/common/st_sensors/
H A Dst_sensors_spi.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2012-2013 STMicroelectronics Inc.
33 * st_sensors_is_spi_3_wire() - check if SPI 3-wire mode has been selected
36 * Return: true if SPI 3-wire mode is selected, false otherwise.
41 struct device *dev = &spi->dev; in st_sensors_is_spi_3_wire()
43 if (device_property_read_bool(dev, "spi-3wire")) in st_sensors_is_spi_3_wire()
47 if (pdata && pdata->spi_3wire) in st_sensors_is_spi_3_wire()
54 * st_sensors_configure_spi_3_wire() - configure SPI 3-wire if needed
63 if (settings->sim.addr) { in st_sensors_configure_spi_3_wire()
65 settings->sim.addr, in st_sensors_configure_spi_3_wire()
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/linux/arch/sh/include/mach-common/mach/
H A Dhighlander.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 #define PA_SDPOW (-1)
17 #define PA_IRLPRI3 (PA_BCR+0x0008) /* Interrupt Priorty 3 */
62 #define PA_SMCR (PA_BCR+0x0600) /* 2-wire Serial control */
63 #define PA_SMSMADR (PA_BCR+0x0602) /* 2-wire Serial Slave control */
64 #define PA_SMMR (PA_BCR+0x0604) /* 2-wire Serial Mode control */
65 #define PA_SMSADR1 (PA_BCR+0x0606) /* 2-wire Serial Address1 control */
66 #define PA_SMTRDR1 (PA_BCR+0x0646) /* 2-wire Serial Data1 control */
75 #define PA_POFF (-1)
86 #define PA_ZIGIO3 (PA_BCR+0x0010) /* Zigbee IO control 3 */
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/linux/Documentation/devicetree/bindings/spi/
H A Dicpdas-lp8841-spi-rtc.txt1 * ICP DAS LP-8841 SPI Controller for RTC
3 ICP DAS LP-8841 contains a DS-1302 RTC. RTC is connected to an IO
6 The device uses the standard MicroWire half-duplex transfer timing.
13 - #address-cells: should be 1
15 - #size-cells: should be 0
17 - compatible: should be "icpdas,lp8841-spi-rtc"
19 - reg: should provide IO memory address
23 - There can be only one slave device.
25 - The spi slave node should claim the following flags which are
28 - spi-3wire: The master itself has only 3 wire. It cannor work in
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/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dintel,ce4100-lapic.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/intel,ce4100-lapic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rahul Tanwar <rtanwar@maxlinear.com>
28 [1] https://pdos.csail.mit.edu/6.828/2008/readings/ia32/IA32-3A.pdf
32 const: intel,ce4100-lapic
37 interrupt-controller: true
39 '#interrupt-cells':
42 intel,virtual-wire-mode:
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H A Darm,gic-v5-iwb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/arm,gic-v5-iwb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM Generic Interrupt Controller, version 5 Interrupt Wire Bridge (IWB)
10 - Lorenzo Pieralisi <lpieralisi@kernel.org>
11 - Marc Zyngier <maz@kernel.org>
20 GICv5 has zero or more Interrupt Wire Bridges (IWB) that are responsible
21 for translating wire signals into interrupt messages to the GICv5 ITS.
24 - $ref: /schemas/interrupt-controller.yaml#
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/linux/include/linux/platform_data/
H A Dusb-omap1.h15 * - "A" connector (rectagular)
17 * - "B" connector (squarish) or "Mini-B"
19 * - "Mini-AB" connector (very similar to Mini-B)
24 u8 otg; /* port number, 1-based: usb1 == 2 */
35 * 2 == usb0-only, using internal transceiver
36 * 3 == 3 wire bidirectional
37 * 4 == 4 wire bidirectional
38 * 6 == 6 wire unidirectional (or TLL)
40 u8 pins[3];
/linux/tools/testing/selftests/drivers/net/hw/
H A Dtso.py2 # SPDX-License-Identifier: GPL-2.0
40 listen_cmd = f"socat -{ipver} -t 2 -u TCP-LISTEN:{port},reuseport /dev/null,ignoreeof"
76 ksft_ge(qstat_new['tx-hw-gso-packet
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/linux/Documentation/devicetree/bindings/rtc/
H A Dnxp,pcf85063.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexander Stein <alexander.stein@ew.tq-group.com>
15 - microcrystal,rv8063
16 - microcrystal,rv8263
17 - nxp,pcf85063
18 - nxp,pcf85063a
19 - nxp,pcf85063tp
20 - nxp,pca85073a
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H A Dmaxim-ds1302.txt1 * Maxim/Dallas Semiconductor DS-1302 RTC
5 The device uses the standard MicroWire half-duplex transfer timing.
12 - compatible : Should be "maxim,ds1302"
16 - reg : Should be address of the device chip select within
19 - spi-max-frequency : DS-1302 has 500 kHz if powered at 2.2V,
22 - spi-3wire : The device has a shared signal IN/OUT line.
24 - spi-lsb-first : DS-1302 requires least significant bit first
27 - spi-cs-high: DS-1302 has active high chip select line. This is
33 #address-cells = <1>;
34 #size-cells = <0>;
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/linux/drivers/w1/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "Dallas's 1-wire support"
6 Dallas' 1-wire bus is useful to connect slow 1-pin devices
12 will be called wire.
22 information see <file:Documentation/driver-api/connector.rst>.
27 3. Replies to userspace commands.
/linux/include/linux/sunrpc/
H A Dauth_gss.h1 /* SPDX-License-Identifier: GPL-2.0 */
29 RPC_GSS_PROC_DESTROY = 3
35 RPC_GSS_SVC_PRIVACY = 3
38 /* on-the-wire gss cred: */
47 /* on-the-wire gss verifier: */
64 * gc_gss_ctx is the context handle that is used to do gss-api calls, while
66 * the wire when communicating with a server. */
/linux/Documentation/devicetree/bindings/iio/addac/
H A Dadi,ad74115.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Cosmin Tanislav <cosmin.tanislav@analog.com>
13 The AD74115H is a single-channel software configurable input/output
17 chip solution with an SPI interface. The device features a 16-bit ADC and a
18 14-bit DAC.
25 - adi,ad74115h
30 spi-max-frequency:
33 spi-cpol: true
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/linux/Documentation/devicetree/bindings/input/touchscreen/
H A Dti,am3359-tsc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/input/touchscreen/ti,am3359-tsc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Miquel Raynal <miquel.raynal@bootlin.com>
14 const: ti,am3359-tsc
17 description: Wires refer to application modes i.e. 4/5/8 wire touchscreen
22 ti,x-plate-resistance:
26 ti,coordinate-readouts:
36 ti,wire-config:
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/linux/Documentation/hwmon/
H A Dlm85.rst79 - Philip Pokorny <ppokorny@penguincomputing.com>,
80 - Frodo Looijaard <frodol@dds.nl>,
81 - Richard Barrington <rich_b_nz@clear.net.nz>,
82 - Margit Schubert-While <margitsw@t-online.de>,
83 - Justin Thiessen <jthiessen@penguincomputing.com>
86 -----------
92 The LM85 uses the 2-wire interface compatible with the SMBUS 2.0
93 specification. Using an analog to digital converter it measures three (3)
94 temperatures and five (5) voltages. It has four (4) 16-bit counters for
96 VID signals from the processor to the VRM. Lastly, there are three (3) PWM
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/linux/Documentation/devicetree/bindings/display/
H A Dmulti-inno,mi0283qt.txt1 Multi-Inno MI0283QT display panel
4 - compatible: "multi-inno,mi0283qt".
7 all mandatory properties described in ../spi/spi-bus.txt must be specified.
10 - dc-gpios: D/C pin. The presence/absence of this GPIO determines
11 the panel interface mode (IM[3:0] pins):
12 - present: IM=x110 4-wire 8-bit data serial interface
13 - absent: IM=x101 3-wire 9-bit data serial interface
14 - reset-gpios: Reset pin
15 - power-supply: A regulator node for the supply voltage.
16 - backlight: phandle of the backlight device attached to the panel
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/linux/Documentation/devicetree/bindings/clock/
H A Dti,lmk04832.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liam Beguin <liambeguin@gmail.com>
21 - ti,lmk04832
26 '#address-cells':
29 '#size-cells':
32 '#clock-cells':
35 spi-max-frequency:
40 - description: PLL2 reference clock.
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/linux/drivers/w1/masters/
H A Dmxc_w1.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2005-2008 Freescale Semiconductor, Inc. All Rights Reserved.
21 # define MXC_W1_CONTROL_RDST BIT(3)
22 # define MXC_W1_CONTROL_WR(x) BIT(5 - (x))
37 * reset the device on the One Wire interface
45 writeb(MXC_W1_CONTROL_RPP, dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_reset_bus()
53 u8 ctrl = readb(dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_reset_bus()
55 /* PST bit is valid after the RPP bit is self-cleared */ in mxc_w1_ds2_reset_bus()
64 * this is the low level routine to read/write a bit on the One Wire
73 writeb(MXC_W1_CONTROL_WR(bit), dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_touch_bit()
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