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/linux/sound/pci/emu10k1/
H A Dp16v.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
11 /* Audigy2 P16V pointer-offset register set, accessed through the PTR2 and DATA2 registers …
25 #define PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */
41 /* [0:1] Capture input 0 channel select. 0 = Capture output 0.
44 * 3 = Capture output 3.
45 * [3:2] Capture input 1 channel select. 0 = Capture output 0.
48 * 3 = Capture output 3.
49 * [5:4] Capture input 2 channel select. 0 = Capture output 0.
52 * 3 = Capture output 3.
[all …]
/linux/sound/soc/codecs/
H A Dtas5086.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * - implement DAPM and input muxing
9 * - implement modulation limit
10 * - implement non-default PWM start
13 * because the registers are of unequal size, and multi-byte registers
18 * it doesn't matter because the entire map can be accessed as 8-bit
21 * routines have to be open-coded.
70 #define TAS5086_CHANNEL_VOL(X) (0x08 + (X)) /* Channel 1-6 volume */
88 * Default TAS5086 power-up configuration
172 size = tas5086_register_size(&client->dev, reg); in tas5086_reg_write()
[all …]
/linux/Documentation/devicetree/bindings/input/
H A Diqs626a.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 The Azoteq IQS626A is a 14-channel capacitive touch controller that features
14 additional Hall-effect and inductive sensing capabilities.
19 - $ref: touchscreen/touchscreen.yaml#
31 "#address-cells":
34 "#size-cells":
37 azoteq,suspend-mode:
[all …]
H A Diqs269a.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 - $ref: input.yaml#
16 The Azoteq IQS269A is an 8-channel capacitive touch controller that features
17 additional Hall-effect and inductive sensing capabilities.
24 - azoteq,iqs269a
25 - azoteq,iqs269a-00
26 - azoteq,iqs269a-d0
[all …]
H A Dazoteq,iqs7222.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
21 - azoteq,iqs7222a
22 - azoteq,iqs7222b
23 - azoteq,iqs7222c
24 - azoteq,iqs7222d
29 irq-gpios:
32 Specifies the GPIO connected to the device's active-low RDY output.
[all …]
/linux/drivers/hsi/controllers/
H A Domap_ssi_regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
22 # define SSI_SIDLEMODE_NO (1 << 3)
33 # define SSI_DATAACCEPT(channel) (1 << (channel)) argument
34 # define SSI_DATAAVAILABLE(channel) (1 << ((channel) + 8)) argument
35 # define SSI_DATAOVERRUN(channel) (1 << ((channel) + 16)) argument
40 # define SSI_GDD_LCH(channel) (1 << (channel)) argument
44 # define SSI_WAKE(channel) (1 << (channel)) argument
52 # define SSI_MODE_VAL_MASK 3
56 # define SSI_MODE_MULTIPOINTS 3
62 # define SSI_FULL(channel) (1 << (channel)) argument
[all …]
/linux/sound/pci/ca0106/
H A Dca0106.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (c) 2004 James Courtier-Dutton <James@superbug.demon.co.uk>
12 * Removed noise from Center/LFE channel when in Analog mode.
50 * Implement support for Line-in capture on SB Live 24bit.
73 #define IPR_MIDI_RX_B 0x00020000 /* MIDI UART-B Receive buffer non-empty */
74 #define IPR_MIDI_TX_B 0x00010000 /* MIDI UART-B Transmit buffer empty */
87 #define IPR_MIDI_RX_A 0x00000004 /* MIDI UART-A Receive buffer non-empty */
88 #define IPR_MIDI_TX_A 0x00000002 /* MIDI UART-A Transmit buffer empty */
93 #define INTE_MIDI_RX_B 0x00020000 /* MIDI UART-B Receive buffer non-empty */
94 #define INTE_MIDI_TX_B 0x00010000 /* MIDI UART-B Transmit buffer empty */
[all …]
/linux/Documentation/devicetree/bindings/iio/adc/
H A Dadi,ad4170-4.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/adi,ad4170-4.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices AD4170-4 and similar Analog to Digital Converters
10 - Marcelo Schmitt <marcelo.schmitt@analog.com>
13 Analog Devices AD4170-4 series of Sigma-delta Analog to Digital Converters.
15 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4170-4.pdf
16 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4190-4.pdf
17 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4195-4.pdf
[all …]
H A Dti,ads1119.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - João Paulo Gonçalves <jpaulo.silvagoncalves@gmail.com>
13 The TI ADS1119 is a precision 16-bit ADC over I2C that offers single-ended and
28 reset-gpios:
31 avdd-supply: true
32 dvdd-supply: true
34 vref-supply:
38 "#address-cells":
[all …]
/linux/Documentation/devicetree/bindings/dma/
H A Dstericsson,dma40.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ST-Ericsson DMA40 DMA Engine
10 - Linus Walleij <linus.walleij@linaro.org>
13 - $ref: dma-controller.yaml#
16 "#dma-cells":
17 const: 3
19 The first cell is the unique device channel number as indicated by this
25 3: SD/MMC controller 2 (unused)
[all …]
H A Dcirrus,ep9301-dma-m2p.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/cirrus,ep9301-dma-m2p.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexander Sverdlin <alexander.sverdlin@gmail.com>
11 - Nikita Shubin <nikita.shubin@maquefel.me>
14 - $ref: dma-controller.yaml#
19 - const: cirrus,ep9301-dma-m2p
20 - items:
21 - enum:
[all …]
/linux/drivers/media/pci/tw5864/
H A Dtw5864-reg.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * TW5864 driver - registers description
8 /* According to TW5864_datasheet_0.6d.pdf, tw5864b1-ds.pdf */
10 /* Register Description - Direct Map Space */
11 /* 0x0000 ~ 0x1ffc - H264 Register Map */
24 #define TW5864_EMU_EN_BHOST BIT(3)
37 #define TW5864_DSP_FRAME_TYPE (3 << 6)
52 * [15:0] Two bit for each channel (channel 0 ~ 7). Each two bits are the buffer
53 * pointer for the last encoded frame of the corresponding channel.
76 * 0->3 4 VLC data buffer in DDR (1M each)
[all …]
/linux/sound/usb/caiaq/
H A Dcontrol.c1 // SPDX-License-Identifier: GPL-2.0-or-later
24 struct snd_usb_caiaqdev *cdev = caiaqdev(chip->card); in control_info()
25 int pos = kcontrol->private_value; in control_info()
29 uinfo->count = 1; in control_info()
32 switch (cdev->chip.usb_id) { in control_info()
37 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in control_info()
38 uinfo->value.integer.min = 0; in control_info()
39 uinfo->value.integer.max = 2; in control_info()
54 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in control_info()
55 uinfo->value.integer.min = 0; in control_info()
[all …]
/linux/drivers/media/platform/nxp/imx8-isi/
H A Dimx8-isi-regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright 2019-2020 NXP
12 /* Channel Control Register */
33 /* Channel Image Control Register */
92 #define CHNL_IMG_CTRL_DEINT_WEAVE_EVEN_ODD 3
104 #define CHNL_IMG_CTRL_YCBCR_MODE BIT(3)
110 #define CHNL_IMG_CTRL_CSC_MODE_RGB2YCBCR 3
113 /* Channel Output Buffer Control Register */
122 #define CHNL_OUT_BUF_CTRL_OFLW_PANIC_SET_THD_V_PANIC_75 3
123 #define CHNL_OUT_BUF_CTRL_OFLW_PANIC_SET_THD_U(n) ((n) << 3)
[all …]
/linux/Documentation/i2c/
H A Di2c-sysfs.rst1 .. SPDX-License-Identifier: GPL-2.0
18 useful and essential to use ``i2c-tools`` for the purpose of development and
22 ---------------
28 -------------
41 start with ``i2c-`` are I2C buses, which may be either physical or logical. The
45 Google Pixel 3 phone for example::
48 0-0008 0-0061 1-0028 3-0043 4-0036 4-0041 i2c-1 i2c-3
49 0-000c 0-0066 2-0049 4-000b 4-0040 i2c-0 i2c-2 i2c-4
51 ``i2c-2`` is an I2C bus whose number is 2, and ``2-0049`` is an I2C device
60 -----------------------------
[all …]
/linux/Documentation/devicetree/bindings/iio/dac/
H A Dadi,ad5755.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices AD5755 Multi-Channel DAC
10 - Sean Nyekjaer <sean.nyekjaer@prevas.dk>
15 - adi,ad5755
16 - adi,ad5755-1
17 - adi,ad5757
18 - adi,ad5735
19 - adi,ad5737
[all …]
/linux/drivers/iio/adc/
H A Dtwl6030-gpadc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2009-2013 Texas Instruments Inc.
13 * Based on twl4030-madc.c
49 #define TWL6030_GPADC_CTRL_P1_SP1 BIT(3)
74 * struct twl6030_chnl_calib - channel calibration
86 * struct twl6030_ideal_code - GPADC calibration parameters
90 * @channel: channel number
97 int channel; member
107 * struct twl6030_gpadc_platform_data - platform specific data
112 * @channel_to_reg: pointer to ADC function to convert channel to
[all …]
H A Dmcp3911.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for Microchip MCP3911, Two-channel Analog Front End
35 #define MCP3911_GAIN_MASK(ch) (GENMASK(2, 0) << 3 * (ch))
36 #define MCP3911_GAIN_VAL(ch, val) ((val << 3 * (ch)) & MCP3911_GAIN_MASK(ch))
42 #define MCP3911_STATUSCOM_CH0_24WIDTH BIT(3)
57 #define MCP3911_CHANNEL(ch) (MCP3911_REG_CHANNEL0 + (ch) * 3)
114 int (*get_offset)(struct mcp3911 *adc, int channel, int *val);
115 int (*set_offset)(struct mcp3911 *adc, int channel, int val);
116 int (*set_scale)(struct mcp3911 *adc, int channel, u32 val);
117 int (*get_raw)(struct mcp3911 *adc, int channel, int *val);
[all …]
/linux/include/sound/
H A Dump_msg.h1 // SPDX-License-Identifier: GPL-2.0-or-later
27 /* MIDI 1.0 Channel Control (7bit) */
134 u32 channel:4; member
140 u32 channel:4;
153 u32 channel:4; member
159 u32 channel:4;
172 u32 channel:4; member
178 u32 channel:4;
191 u32 channel:4; member
197 u32 channel:4;
[all …]
/linux/drivers/net/ethernet/microchip/
H A Dlan743x_main.h1 /* SPDX-License-Identifier: GPL-2.0+ */
42 #define STRAP_READ_BASE_X_ BIT(3)
68 #define PMT_CTL_WOL_EN_ BIT(3)
112 #define SYS_LOCK_REG_SMBUS_PERI_LOCK_ BIT(3)
152 #define FCT_RX_CTL_EN_(channel) BIT(28 + (channel)) argument
153 #define FCT_RX_CTL_DIS_(channel) BIT(24 + (channel)) argument
154 #define FCT_RX_CTL_RESET_(channel) BIT(20 + (channel)) argument
157 #define FCT_TX_CTL_EN_(channel) BIT(28 + (channel)) argument
158 #define FCT_TX_CTL_DIS_(channel) BIT(24 + (channel)) argument
159 #define FCT_TX_CTL_RESET_(channel) BIT(20 + (channel)) argument
[all …]
/linux/drivers/hwmon/
H A Dnct7904.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * nct7904.c - driver for Nuvoton NCT7904D.
43 #define VSEN_MAX 21 /* VSEN1..14, 3VDD, VBAT, V3VSB,
92 #define FANCTL1_FMR_REG 0x00 /* Bank 3; 1 reg per channel */
93 #define FANCTL1_OUT_REG 0x10 /* Bank 3; 1 reg per channel */
110 /*The timeout range is 1-255 minutes*/
141 u8 vsen_alarm[3];
149 mutex_lock(&data->bank_lock); in nct7904_bank_lock()
150 if (data->bank_sel == bank) in nct7904_bank_lock()
152 ret = i2c_smbus_write_byte_data(data->client, BANK_SEL_REG, bank); in nct7904_bank_lock()
[all …]
/linux/Documentation/devicetree/bindings/sound/
H A Dti,tlv320adcx140.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analog-to-Digital Converter
11 - Andrew Davis <afd@ti.com>
14 The TLV320ADCX140 are multichannel (4-ch analog recording or 8-ch digital
15 PDM microphones recording), high-performance audio, analog-to-digital
28 - ti,tlv320adc3140
29 - ti,tlv320adc5140
30 - ti,tlv320adc6140
[all …]
/linux/drivers/hwmon/peci/
H A Ddimmtemp.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (c) 2018-2021 Intel Corporation
7 #include <linux/devm-helpers.h>
12 #include <linux/peci-cpu.h>
20 /* Max number of channel ranks and DIMM index per channel */
22 #define DIMM_IDX_MAX_ON_HSX 3
24 #define DIMM_IDX_MAX_ON_BDX 3
95 int dimm_order = dimm_no % priv->gen_info->dimm_idx_max; in get_dimm_temp()
96 int chan_rank = dimm_no / priv->gen_info->dimm_idx_max; in get_dimm_temp()
100 mutex_lock(&priv->dimm[dimm_no].temp.state.lock); in get_dimm_temp()
[all …]
/linux/arch/mips/include/asm/
H A Djazzdma.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Helpfile for jazzdma.c -- Mips Jazz R4030 DMA controller support
17 extern void vdma_enable(int channel);
18 extern void vdma_disable(int channel);
19 extern void vdma_set_mode(int channel, int mode);
20 extern void vdma_set_addr(int channel, long addr);
21 extern void vdma_set_count(int channel, int count);
22 extern int vdma_get_residue(int channel);
23 extern int vdma_get_enable(int channel);
38 #define VDMA_OFFSET(a) ((unsigned int)(a) & (VDMA_PAGESIZE-1))
[all …]
/linux/drivers/clk/bcm/
H A Dclk-sr.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
11 #include <dt-bindings/clock/bcm-sr.h>
12 #include "clk-iproc.h"
39 .dig_filter = DF_VAL(0x0, 4, 3, 0, 4, 7, 3),
49 .channel = BCM_SR_GENPLL0_125M_CLK,
55 .channel = BCM_SR_GENPLL0_SCR_CLK,
61 .channel = BCM_SR_GENPLL0_250M_CLK,
67 .channel = BCM_SR_GENPLL0_PCIE_AXI_CLK,
69 .enable = ENABLE_VAL(0x4, 9, 3, 15),
[all …]

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