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/linux/arch/riscv/kernel/
H A Dkexec_relocate.S24 mv s0, a0
25 mv s1, a1
26 mv s2, a2
27 mv s3, a3
28 mv s4, a4
29 mv s5, zero
30 mv s6, zero
57 .align 2
64 beqz t1, 2f
68 2:
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/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu13_driver_if_aldebaran.h40 #define FEATURE_DPM_UCLK_BIT 2
113 #define THROTTLER_TDC_GFX_BIT 2
174 uint8_t PaddingConfig[2];
200 #define CMDCONFIG_READWRITE_BIT 2 //bit should be 0 for read, 1 for write
266 …uint8_t NumDiscreteLevels; // Set to 2 (Fmin, Fmax) when using fine grained DPM, otherwis…
277 uint32_t FeaturesToRun[2];
292 uint16_t MaxVoltageGfx; // In mV(Q2) Maximum Voltage allowable of VDD_GFX
293 uint16_t MaxVoltageSoc; // In mV(Q2) Maximum Voltage allowable of VDD_SOC
336 uint8_t spare1[2];
342 int16_t GFX_Guardband_Voltage_Cold[8]; // mV [signed]
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H A Dsmu11_driver_if_sienna_cichlid.h35 #define NUM_SMNCLK_DPM_LEVELS 2
37 #define NUM_MP0CLK_DPM_LEVELS 2
46 #define NUM_MP1CLK_DPM_LEVELS 2
47 #define NUM_LINK_LEVELS 2
49 #define NUM_XGMI_LEVELS 2
72 #define PPSMC_GeminiModeSlave 2 //Slave GPU on a Gemini board
78 #define FEATURE_DPM_GFX_GPO_BIT 2
197 #define THROTTLER_TEMP_HOTSPOT_BIT 2
221 #define FW_DSTATE_G6_PHY_VDDCI_OFF_BIT 2
264 #define LED_DISPLAY_ERROR_BIT 2
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H A Dsmu11_driver_if_arcturus.h37 #define NUM_MP0CLK_DPM_LEVELS 2
41 #define NUM_XGMI_LEVELS 2
58 #define FEATURE_DPM_UCLK_BIT 2
189 #define THROTTLER_TEMP_HOTSPOT_BIT 2
214 #define WORKLOAD_PPLIB_VIDEO_BIT 2
265 uint8_t Padding[2];
429 XGMI_LINK_RATE_2 = 2, // 2Gbps
448 XGMI_LINK_WIDTH_2 = 2, // x2
457 uint8_t VoltageMode; // 0 - AVFS only, 1- min(AVFS,SS), 2-SS only
459 …uint8_t NumDiscreteLevels; // Set to 2 (Fmin, Fmax) when using fine grained DPM, otherwis…
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H A Dsmu11_driver_if_navi10.h36 #define NUM_SMNCLK_DPM_LEVELS 2
38 #define NUM_MP0CLK_DPM_LEVELS 2
46 #define NUM_MP1CLK_DPM_LEVELS 2
47 #define NUM_LINK_LEVELS 2
67 #define PPSMC_GeminiModeSlave 2 //Slave GPU on a Gemini board
73 #define FEATURE_DPM_GFX_PACE_BIT 2
176 #define THROTTLER_TEMP_HOTSPOT_BIT 2
199 #define FW_DSTATE_G6_PHY_VDDCI_OFF_BIT 2
269 uint8_t Padding[2];
435 uint8_t VoltageMode; // 0 - AVFS only, 1- min(AVFS,SS), 2-SS only
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H A Dsmu13_driver_if_v13_0_0.h34 #define NUM_MP0CLK_DPM_LEVELS 2
50 #define FEATURE_DPM_GFX_POWER_OPTIMIZER_BIT 2
177 SVI_PSI_2, // Phase count 2nd level
188 #define THROTTLER_TEMP_HOTSPOT_G_BIT 2
213 #define FW_DSTATE_G6_PHY_VMEMP_OFF_BIT 2
240 #define LED_DISPLAY_ERROR_BIT 2
245 #define MEM_TEMP_READ_IN_BAND_DUMMY_PSTATE_BIT 2
353 #define CMDCONFIG_READWRITE_BIT 2 //bit should be 0 for read, 1 for write
504 …uint8_t NumDiscreteLevels; // Set to 2 (Fmin, Fmax) when using fine grained DPM, otherwis…
672 #define PP_OD_FEATURE_PPT_BIT 2
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H A Dsmu13_driver_if_v13_0_7.h35 #define NUM_MP0CLK_DPM_LEVELS 2
51 #define FEATURE_DPM_GFX_POWER_OPTIMIZER_BIT 2
178 SVI_PSI_2, // Phase count 2nd level
189 #define THROTTLER_TEMP_HOTSPOT_G_BIT 2
214 #define FW_DSTATE_G6_PHY_VMEMP_OFF_BIT 2
241 #define LED_DISPLAY_ERROR_BIT 2
246 #define MEM_TEMP_READ_IN_BAND_DUMMY_PSTATE_BIT 2
354 #define CMDCONFIG_READWRITE_BIT 2 //bit should be 0 for read, 1 for write
505 …uint8_t NumDiscreteLevels; // Set to 2 (Fmin, Fmax) when using fine grained DPM, otherwis…
675 // Slope Q1.7, Offset Q1.2
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H A Dsmu14_driver_if_v14_0.h32 #define NUM_MP0CLK_DPM_LEVELS 2
48 #define FEATURE_DPM_GFX_POWER_OPTIMIZER_BIT 2
186 SVI_PSI_2, // Phase count 2nd level
197 #define THROTTLER_TEMP_HOTSPOT_GFX_BIT 2
221 #define FW_DSTATE_G6_PHY_VMEMP_OFF_BIT 2
241 #define LED_DISPLAY_ERROR_BIT 2
246 #define MEM_TEMP_READ_IN_BAND_DUMMY_PSTATE_BIT 2
354 #define CMDCONFIG_READWRITE_BIT 2 //bit should be 0 for read, 1 for write
518 …uint8_t NumDiscreteLevels; // Set to 2 (Fmin, Fmax) when using fine grained DPM, otherwis…
587 MEM_VENDOR_INFINEON, // 2
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/linux/Documentation/devicetree/bindings/regulator/
H A Dmaxim,max8952.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
21 enum: [0, 1, 2, 3]
42 enum: [0, 1, 2, 3, 4, 5, 6, 7]
46 - 0: 32mV/us
47 - 1: 16mV/us
48 - 2: 8mV/us
49 - 3: 4mV/us
50 - 4: 2mV/us
51 - 5: 1mV/us
52 - 6: 0.5mV/us
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H A Drichtek,rt6160-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
14 up to 3A output current from 2025mV to 5200mV. And it support the wide
15 input voltage range from 2200mV to 5500mV.
56 enable-gpios = <&gpio26 2 0>;
/linux/include/linux/usb/
H A Dpd.h18 PD_CTRL_GOTO_MIN = 2,
45 PD_DATA_REQUEST = 2,
62 PD_EXT_STATUS = 2,
214 PDO_TYPE_VAR = 2,
237 #define PDO_FIXED_VOLT_SHIFT 10 /* 50mV units */
240 #define PDO_FIXED_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_FIXED_VOLT_SHIFT) argument
243 #define PDO_FIXED(mv, ma, flags) \ argument
245 PDO_FIXED_VOLT(mv) | PDO_FIXED_CURR(ma))
247 #define VSAFE5V 5000 /* mv units */
249 #define PDO_BATT_MAX_VOLT_SHIFT 20 /* 50mV units */
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/linux/Documentation/devicetree/bindings/sound/
H A Dcs35l33.txt22 0, then VBST = VP. If greater than 0, the boost voltage will be 3300mV with
23 a value of 1 and will increase at a step size of 100mV until a maximum of
24 8000mV.
31 20ms. If this property is set to 0,1,2,3 then ramp times would be 40ms,
54 LRCLK cycles. If this property is set to 0, 1, 2, or 3 then the memory
62 stage enters LDO operation. Starts as a default value of 50mV for a value
63 of 1 and increases with a step size of 50mV to a maximum of 750mV (value of
80 The reference voltage starts at 3000mV with a value of 0x3 and is increased
81 by 100mV per step to a maximum of 5500mV.
91 1800mV with a step size of 50mV up to a maximum value of 1750mV.
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H A Dcs35l36.txt14 converter's output voltage in mV. The range is from 2550mV to 12000mV with
15 increments of 50mV.
66 2 = 10ms
75 weak-FET operation. The range is 50mV to 700mV in 50mV increments.
85 2 = 125C (Default)
/linux/arch/riscv/kernel/vdso/
H A Dvgetrandom-chacha.S86 REG_S s2, 2*SZREG(sp)
105 /* state[0,1,2,3] = "expand 32-byte k" */
106 mv state0, copy0
107 mv state1, copy1
108 mv state2, copy2
109 mv state3, copy3
122 mv state12, cnt
126 mv state14, zero
127 mv state15, zero
168 /* output[0,1,2,3] = copy[0,1,2,3] + state[0,1,2,3] */
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/linux/include/dt-bindings/usb/
H A Dpd.h8 #define PDO_TYPE_VAR 2
26 #define PDO_FIXED_VOLT_SHIFT 10 /* 50mV units */
29 #define PDO_FIXED_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_FIXED_VOLT_SHIFT) argument
32 #define PDO_FIXED(mv, ma, flags) \ argument
34 PDO_FIXED_VOLT(mv) | PDO_FIXED_CURR(ma))
36 #define VSAFE5V 5000 /* mv units */
38 #define PDO_BATT_MAX_VOLT_SHIFT 20 /* 50mV units */
39 #define PDO_BATT_MIN_VOLT_SHIFT 10 /* 50mV units */
42 #define PDO_BATT_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MIN_VOLT_SHIFT) argument
43 #define PDO_BATT_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MAX_VOLT_SHIFT) argument
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/linux/Documentation/devicetree/bindings/phy/
H A Dphy-stm32-usbphyc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
22 |_ PHY port#2 ----| |________________
60 maxItems: 2
110 - <1> increases the level by 5 to 7 mV
111 - <2> increases the level by 10 to 14 mV
112 - <3> decreases the level by 5 to 7 mV
131 - <2> = 19.46 mA target current / nominal + 3.12%
154 - <1> = reduce the impedance by 2 ohms
155 - <2> = reduce the impedance by 4 ohms
166 - <1> = threshold shift by +7 mV
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/linux/Documentation/devicetree/bindings/input/
H A Dti,drv260x.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
41 enum: [ 0, 1, 2 ]
58 enum: [ 0, 1, 2, 3, 4, 5, 6, 7 ]
67 vib-rated-mv:
71 If this is not set then the value will be defaulted to 3200 mV.
74 vib-overdrive-mv:
78 If this is not set then the value will be defaulted to 3200 mV.
106 vib-rated-mv = <3200>;
107 vib-overdrive-mv = <3200>;
/linux/Documentation/hwmon/
H A Dltc4245.rst49 rely on the sense resistors listed in Table 2: "Sense Resistor Values".
52 in1_input 12v input voltage (mV)
53 in2_input 5v input voltage (mV)
54 in3_input 3v input voltage (mV)
55 in4_input Vee (-12v) input voltage (mV)
72 in5_input 12v output voltage (mV)
73 in6_input 5v output voltage (mV)
74 in7_input 3v output voltage (mV)
75 in8_input Vee (-12v) output voltage (mV)
109 2) OF device tree -- add the "ltc4245,use-extra-gpios" property to each chip
H A Dxdpe12284.rst41 - VR12.0 mode, 5-mV DAC - 0x01.
42 - VR12.5 mode, 10-mV DAC - 0x02.
43 - IMVP9 mode, 5-mV DAC - 0x03.
44 - AMD mode 6.25mV - 0x10.
52 indexes 1, 2 are for "iin" and 3, 4 for "iout":
69 indexes 1, 2 are for "vin" and 3, 4 for "vout":
86 indexes 1, 2 are for "pin" and 3, 4 for "pout":
88 **power[1-2]_alarm**
98 **temp[1-2]_crit**
100 **temp[1-2]_crit_alarm**
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/linux/drivers/mfd/
H A Dmenelaus.c101 #define MENELAUS_MMC_S2CD_IRQ 1 /* MMC slot 2 card change */
102 #define MENELAUS_MMC_S1D1_IRQ 2 /* MMC DAT1 low in slot 1 */
103 #define MENELAUS_MMC_S2D1_IRQ 3 /* MMC DAT1 low in slot 2 */
126 #define GPIO3_DIR_INPUT (1 << 2)
129 #define MCT_CTRL1_S1_CMD_OD (1 << 2)
143 #define MCT_CTRL3_S1_AUTO_EN (1 << 2)
288 if (slot != 1 && slot != 2) in menelaus_set_mmc_opendrain()
339 if (slot != 1 && slot != 2) in menelaus_set_mmc_slot()
448 static int menelaus_set_voltage(const struct menelaus_vtg *vtg, int mV, in menelaus_set_voltage() argument
463 "to %d mV (reg 0x%02x, val 0x%02x)\n", in menelaus_set_voltage()
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/linux/drivers/scsi/
H A Dch.c258 cmd[2] = (elem >> 8) & 0xff; in ch_read_element_status()
313 cmd[2] = 0x1d; in ch_readconfig()
340 VPRINTK(KERN_INFO, "type #2 (st): 0x%x+%d [storage]\n", in ch_readconfig()
438 cmd[2] = (trans >> 8) & 0xff; in ch_position()
457 cmd[2] = (trans >> 8) & 0xff; in ch_move()
480 cmd[2] = (trans >> 8) & 0xff; in ch_exchange()
488 cmd[10] = (rotate1 ? 1 : 0) | (rotate2 ? 2 : 0); in ch_exchange()
529 cmd[2] = (elem >> 8) & 0xff; in ch_set_voltag()
558 put_user(data[2], dest+i); in ch_gstatus()
559 if (data[2] & CESTATUS_EXCEPT) in ch_gstatus()
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/linux/include/linux/mfd/
H A Dmenelaus.h21 extern int menelaus_set_vmem(unsigned int mV);
22 extern int menelaus_set_vio(unsigned int mV);
23 extern int menelaus_set_vmmc(unsigned int mV);
24 extern int menelaus_set_vaux(unsigned int mV);
25 extern int menelaus_set_vdcdc(int dcdc, unsigned int mV);
35 #define EN_DC3_SLEEP (1 << 2)
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/volt/
H A Dgk20a.c54 int mv; in gk20a_volt_get_cvb_voltage() local
56 mv = DIV_ROUND_CLOSEST(coef->c2 * speedo, s_scale); in gk20a_volt_get_cvb_voltage()
57 mv = DIV_ROUND_CLOSEST((mv + coef->c1) * speedo, s_scale) + coef->c0; in gk20a_volt_get_cvb_voltage()
58 return mv; in gk20a_volt_get_cvb_voltage()
70 int cvb_mv, mv; in gk20a_volt_get_cvb_t_voltage() local
74 mv = DIV_ROUND_CLOSEST(coef->c3 * speedo, s_scale) + coef->c4 + in gk20a_volt_get_cvb_t_voltage()
76 mv = DIV_ROUND_CLOSEST(mv * temp, t_scale) + cvb_mv; in gk20a_volt_get_cvb_t_voltage()
77 return mv; in gk20a_volt_get_cvb_t_voltage()
84 int mv; in gk20a_volt_calc_voltage() local
86 mv = gk20a_volt_get_cvb_t_voltage(speedo, -10, 100, 10, coef); in gk20a_volt_calc_voltage()
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/linux/arch/riscv/purgatory/
H A Dentry.S15 .align 2
19 mv s0, a0 /* The hartid of the current hart */
20 mv s1, a1 /* Phys address of the FDT image */
25 mv a0, s0
26 mv a1, s1
/linux/arch/riscv/kernel/tests/kprobes/
H A Dtest-kprobes-asm.S19 mv a1, ra
23 jal x0, 2f
31 2: jal 1b
40 mv a1, ra
69 li a2, 2
85 bge a2, a1, 2f
91 2:
108 c.j 2f
113 2: li a0, KPROBE_TEST_MAGIC_LOWER
119 la a0, 2f
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