| /linux/arch/riscv/kernel/ |
| H A D | kexec_relocate.S | 24 mv s0, a0 25 mv s1, a1 26 mv s2, a2 27 mv s3, a3 28 mv s4, a4 29 mv s5, zero 30 mv s6, zero 57 .align 2 64 beqz t1, 2f 68 2: [all …]
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| /linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/ |
| H A D | smu13_driver_if_aldebaran.h | 40 #define FEATURE_DPM_UCLK_BIT 2 113 #define THROTTLER_TDC_GFX_BIT 2 174 uint8_t PaddingConfig[2]; 200 #define CMDCONFIG_READWRITE_BIT 2 //bit should be 0 for read, 1 for write 266 …uint8_t NumDiscreteLevels; // Set to 2 (Fmin, Fmax) when using fine grained DPM, otherwis… 277 uint32_t FeaturesToRun[2]; 292 uint16_t MaxVoltageGfx; // In mV(Q2) Maximum Voltage allowable of VDD_GFX 293 uint16_t MaxVoltageSoc; // In mV(Q2) Maximum Voltage allowable of VDD_SOC 336 uint8_t spare1[2]; 342 int16_t GFX_Guardband_Voltage_Cold[8]; // mV [signed] [all …]
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| H A D | smu11_driver_if_sienna_cichlid.h | 35 #define NUM_SMNCLK_DPM_LEVELS 2 37 #define NUM_MP0CLK_DPM_LEVELS 2 46 #define NUM_MP1CLK_DPM_LEVELS 2 47 #define NUM_LINK_LEVELS 2 49 #define NUM_XGMI_LEVELS 2 72 #define PPSMC_GeminiModeSlave 2 //Slave GPU on a Gemini board 78 #define FEATURE_DPM_GFX_GPO_BIT 2 197 #define THROTTLER_TEMP_HOTSPOT_BIT 2 221 #define FW_DSTATE_G6_PHY_VDDCI_OFF_BIT 2 264 #define LED_DISPLAY_ERROR_BIT 2 [all …]
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| H A D | smu11_driver_if_arcturus.h | 37 #define NUM_MP0CLK_DPM_LEVELS 2 41 #define NUM_XGMI_LEVELS 2 58 #define FEATURE_DPM_UCLK_BIT 2 189 #define THROTTLER_TEMP_HOTSPOT_BIT 2 214 #define WORKLOAD_PPLIB_VIDEO_BIT 2 265 uint8_t Padding[2]; 429 XGMI_LINK_RATE_2 = 2, // 2Gbps 448 XGMI_LINK_WIDTH_2 = 2, // x2 457 uint8_t VoltageMode; // 0 - AVFS only, 1- min(AVFS,SS), 2-SS only 459 …uint8_t NumDiscreteLevels; // Set to 2 (Fmin, Fmax) when using fine grained DPM, otherwis… [all …]
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| H A D | smu11_driver_if_navi10.h | 36 #define NUM_SMNCLK_DPM_LEVELS 2 38 #define NUM_MP0CLK_DPM_LEVELS 2 46 #define NUM_MP1CLK_DPM_LEVELS 2 47 #define NUM_LINK_LEVELS 2 67 #define PPSMC_GeminiModeSlave 2 //Slave GPU on a Gemini board 73 #define FEATURE_DPM_GFX_PACE_BIT 2 176 #define THROTTLER_TEMP_HOTSPOT_BIT 2 199 #define FW_DSTATE_G6_PHY_VDDCI_OFF_BIT 2 269 uint8_t Padding[2]; 435 uint8_t VoltageMode; // 0 - AVFS only, 1- min(AVFS,SS), 2-SS only [all …]
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| H A D | smu13_driver_if_v13_0_0.h | 34 #define NUM_MP0CLK_DPM_LEVELS 2 50 #define FEATURE_DPM_GFX_POWER_OPTIMIZER_BIT 2 177 SVI_PSI_2, // Phase count 2nd level 188 #define THROTTLER_TEMP_HOTSPOT_G_BIT 2 213 #define FW_DSTATE_G6_PHY_VMEMP_OFF_BIT 2 240 #define LED_DISPLAY_ERROR_BIT 2 245 #define MEM_TEMP_READ_IN_BAND_DUMMY_PSTATE_BIT 2 353 #define CMDCONFIG_READWRITE_BIT 2 //bit should be 0 for read, 1 for write 504 …uint8_t NumDiscreteLevels; // Set to 2 (Fmin, Fmax) when using fine grained DPM, otherwis… 672 #define PP_OD_FEATURE_PPT_BIT 2 [all …]
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| H A D | smu13_driver_if_v13_0_7.h | 35 #define NUM_MP0CLK_DPM_LEVELS 2 51 #define FEATURE_DPM_GFX_POWER_OPTIMIZER_BIT 2 178 SVI_PSI_2, // Phase count 2nd level 189 #define THROTTLER_TEMP_HOTSPOT_G_BIT 2 214 #define FW_DSTATE_G6_PHY_VMEMP_OFF_BIT 2 241 #define LED_DISPLAY_ERROR_BIT 2 246 #define MEM_TEMP_READ_IN_BAND_DUMMY_PSTATE_BIT 2 354 #define CMDCONFIG_READWRITE_BIT 2 //bit should be 0 for read, 1 for write 505 …uint8_t NumDiscreteLevels; // Set to 2 (Fmin, Fmax) when using fine grained DPM, otherwis… 675 // Slope Q1.7, Offset Q1.2 [all …]
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| H A D | smu14_driver_if_v14_0.h | 32 #define NUM_MP0CLK_DPM_LEVELS 2 48 #define FEATURE_DPM_GFX_POWER_OPTIMIZER_BIT 2 186 SVI_PSI_2, // Phase count 2nd level 197 #define THROTTLER_TEMP_HOTSPOT_GFX_BIT 2 221 #define FW_DSTATE_G6_PHY_VMEMP_OFF_BIT 2 241 #define LED_DISPLAY_ERROR_BIT 2 246 #define MEM_TEMP_READ_IN_BAND_DUMMY_PSTATE_BIT 2 354 #define CMDCONFIG_READWRITE_BIT 2 //bit should be 0 for read, 1 for write 518 …uint8_t NumDiscreteLevels; // Set to 2 (Fmin, Fmax) when using fine grained DPM, otherwis… 587 MEM_VENDOR_INFINEON, // 2 [all …]
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| /linux/Documentation/devicetree/bindings/regulator/ |
| H A D | maxim,max8952.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 21 enum: [0, 1, 2, 3] 42 enum: [0, 1, 2, 3, 4, 5, 6, 7] 46 - 0: 32mV/us 47 - 1: 16mV/us 48 - 2: 8mV/us 49 - 3: 4mV/us 50 - 4: 2mV/us 51 - 5: 1mV/us 52 - 6: 0.5mV/us [all …]
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| H A D | richtek,rt6160-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 14 up to 3A output current from 2025mV to 5200mV. And it support the wide 15 input voltage range from 2200mV to 5500mV. 56 enable-gpios = <&gpio26 2 0>;
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| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | cs35l33.txt | 22 0, then VBST = VP. If greater than 0, the boost voltage will be 3300mV with 23 a value of 1 and will increase at a step size of 100mV until a maximum of 24 8000mV. 31 20ms. If this property is set to 0,1,2,3 then ramp times would be 40ms, 54 LRCLK cycles. If this property is set to 0, 1, 2, or 3 then the memory 62 stage enters LDO operation. Starts as a default value of 50mV for a value 63 of 1 and increases with a step size of 50mV to a maximum of 750mV (value of 80 The reference voltage starts at 3000mV with a value of 0x3 and is increased 81 by 100mV per step to a maximum of 5500mV. 91 1800mV with a step size of 50mV up to a maximum value of 1750mV. [all …]
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| /linux/drivers/media/platform/rockchip/rkvdec/ |
| H A D | rkvdec-vp9.c | 37 u8 coef_intra[4][2][128]; 45 u8 single_ref[5][2]; 47 u8 interp_filter[4][2]; 49 u8 coef[2][4][2][128]; 61 u8 sign[2]; 62 u8 classes[2][10]; 63 u8 class0_bit[2]; 64 u8 bits[2][10]; 65 u8 class0_fr[2][2][3]; 66 u8 fr[2][3]; [all …]
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| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | phy-stm32-usbphyc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 22 |_ PHY port#2 ----| |________________ 60 maxItems: 2 110 - <1> increases the level by 5 to 7 mV 111 - <2> increases the level by 10 to 14 mV 112 - <3> decreases the level by 5 to 7 mV 131 - <2> = 19.46 mA target current / nominal + 3.12% 154 - <1> = reduce the impedance by 2 ohms 155 - <2> = reduce the impedance by 4 ohms 166 - <1> = threshold shift by +7 mV [all …]
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| /linux/drivers/mfd/ |
| H A D | menelaus.c | 101 #define MENELAUS_MMC_S2CD_IRQ 1 /* MMC slot 2 card change */ 102 #define MENELAUS_MMC_S1D1_IRQ 2 /* MMC DAT1 low in slot 1 */ 103 #define MENELAUS_MMC_S2D1_IRQ 3 /* MMC DAT1 low in slot 2 */ 126 #define GPIO3_DIR_INPUT (1 << 2) 129 #define MCT_CTRL1_S1_CMD_OD (1 << 2) 143 #define MCT_CTRL3_S1_AUTO_EN (1 << 2) 288 if (slot != 1 && slot != 2) in menelaus_set_mmc_opendrain() 339 if (slot != 1 && slot != 2) in menelaus_set_mmc_slot() 448 static int menelaus_set_voltage(const struct menelaus_vtg *vtg, int mV, in menelaus_set_voltage() argument 463 "to %d mV (reg 0x%02x, val 0x%02x)\n", in menelaus_set_voltage() [all …]
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| /linux/Documentation/devicetree/bindings/input/ |
| H A D | ti,drv260x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 41 enum: [ 0, 1, 2 ] 58 enum: [ 0, 1, 2, 3, 4, 5, 6, 7 ] 67 vib-rated-mv: 71 If this is not set then the value will be defaulted to 3200 mV. 74 vib-overdrive-mv: 78 If this is not set then the value will be defaulted to 3200 mV. 106 vib-rated-mv = <3200>; 107 vib-overdrive-mv = <3200>;
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| /linux/Documentation/hwmon/ |
| H A D | ltc4245.rst | 49 rely on the sense resistors listed in Table 2: "Sense Resistor Values". 52 in1_input 12v input voltage (mV) 53 in2_input 5v input voltage (mV) 54 in3_input 3v input voltage (mV) 55 in4_input Vee (-12v) input voltage (mV) 72 in5_input 12v output voltage (mV) 73 in6_input 5v output voltage (mV) 74 in7_input 3v output voltage (mV) 75 in8_input Vee (-12v) output voltage (mV) 109 2) OF device tree -- add the "ltc4245,use-extra-gpios" property to each chip
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| H A D | xdpe12284.rst | 41 - VR12.0 mode, 5-mV DAC - 0x01. 42 - VR12.5 mode, 10-mV DAC - 0x02. 43 - IMVP9 mode, 5-mV DAC - 0x03. 44 - AMD mode 6.25mV - 0x10. 52 indexes 1, 2 are for "iin" and 3, 4 for "iout": 69 indexes 1, 2 are for "vin" and 3, 4 for "vout": 86 indexes 1, 2 are for "pin" and 3, 4 for "pout": 88 **power[1-2]_alarm** 98 **temp[1-2]_crit** 100 **temp[1-2]_crit_alarm** [all …]
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| /linux/drivers/scsi/ |
| H A D | ch.c | 248 cmd[2] = (elem >> 8) & 0xff; in ch_read_element_status() 303 cmd[2] = 0x1d; in ch_readconfig() 330 VPRINTK(KERN_INFO, "type #2 (st): 0x%x+%d [storage]\n", in ch_readconfig() 418 cmd[2] = (trans >> 8) & 0xff; in ch_position() 437 cmd[2] = (trans >> 8) & 0xff; in ch_move() 460 cmd[2] = (trans >> 8) & 0xff; in ch_exchange() 468 cmd[10] = (rotate1 ? 1 : 0) | (rotate2 ? 2 : 0); in ch_exchange() 509 cmd[2] = (elem >> 8) & 0xff; in ch_set_voltag() 538 put_user(data[2], dest+i); in ch_gstatus() 539 if (data[2] in ch_gstatus() 699 struct changer_move mv; ch_ioctl() local 721 struct changer_exchange mv; ch_ioctl() local [all...] |
| /linux/arch/riscv/kernel/tests/kprobes/ |
| H A D | test-kprobes-asm.S | 19 mv a1, ra 23 jal x0, 2f 31 2: jal 1b 40 mv a1, ra 69 li a2, 2 85 bge a2, a1, 2f 91 2: 108 c.j 2f 113 2: li a0, KPROBE_TEST_MAGIC_LOWER 119 la a0, 2f [all …]
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| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/volt/ |
| H A D | gk20a.c | 54 int mv; in gk20a_volt_get_cvb_voltage() local 56 mv = DIV_ROUND_CLOSEST(coef->c2 * speedo, s_scale); in gk20a_volt_get_cvb_voltage() 57 mv = DIV_ROUND_CLOSEST((mv + coef->c1) * speedo, s_scale) + coef->c0; in gk20a_volt_get_cvb_voltage() 58 return mv; in gk20a_volt_get_cvb_voltage() 70 int cvb_mv, mv; in gk20a_volt_get_cvb_t_voltage() local 74 mv = DIV_ROUND_CLOSEST(coef->c3 * speedo, s_scale) + coef->c4 + in gk20a_volt_get_cvb_t_voltage() 76 mv = DIV_ROUND_CLOSEST(mv * temp, t_scale) + cvb_mv; in gk20a_volt_get_cvb_t_voltage() 77 return mv; in gk20a_volt_get_cvb_t_voltage() 84 int mv; in gk20a_volt_calc_voltage() local 86 mv = gk20a_volt_get_cvb_t_voltage(speedo, -10, 100, 10, coef); in gk20a_volt_calc_voltage() [all …]
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| /linux/include/linux/mfd/ |
| H A D | menelaus.h | 21 extern int menelaus_set_vmem(unsigned int mV); 22 extern int menelaus_set_vio(unsigned int mV); 23 extern int menelaus_set_vmmc(unsigned int mV); 24 extern int menelaus_set_vaux(unsigned int mV); 25 extern int menelaus_set_vdcdc(int dcdc, unsigned int mV); 35 #define EN_DC3_SLEEP (1 << 2)
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| /linux/drivers/regulator/ |
| H A D | max77675-regulator.c | 48 #define MAX77675_EN_MODE_MASK GENMASK(2, 1) /* nEN Mode (bits 2:1) */ 54 #define MAX77675_SFT_CTRL_MASK GENMASK(2, 0) /* Soft Start Control */ 68 #define MAX77675_INT_TJAL1_R_BIT BIT(2) 69 #define MAX77675_INT_TJAL1_R_SHIFT 2 86 #define MAX77675_INTM_TJAL1_R_BIT BIT(2) 87 #define MAX77675_INTM_TJAL1_R_SHIFT 2 102 #define MAX77675_STAT_TJAL2_S_BIT BIT(2) 103 #define MAX77675_STAT_TJAL2_S_SHIFT 2 119 #define MAX77675_UVLO_BIT BIT(2) /* Undervoltage Lockout Flag */ 120 #define MAX77675_UVLO_SHIFT 2 [all …]
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| /linux/arch/riscv/purgatory/ |
| H A D | entry.S | 15 .align 2 19 mv s0, a0 /* The hartid of the current hart */ 20 mv s1, a1 /* Phys address of the FDT image */ 25 mv a0, s0 26 mv a1, s1
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| /linux/drivers/media/v4l2-core/ |
| H A D | v4l2-vp9.c | 198 { 2, 44, 76 }, 201 { /* Coeff Band 2 */ 222 { 2, 39, 75 }, 247 { 2, 68, 118 }, 251 { /* Coeff Band 2 */ 300 { 2, 49, 87 }, 303 { /* Coeff Band 2 */ 308 { 2, 42, 81 }, 333 { 2, 20, 47 }, 353 { /* Coeff Band 2 */ [all …]
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| /linux/Documentation/translations/zh_CN/process/ |
| H A D | applying-patches.rst | 143 如果看到 ``Hunk #2 succeeded at 1887 with fuzz 2 (offset 7 lines).`` 187 这样便能一步从 5.7.2 更新到 5.7.3。interdiff 的 -z 参数甚至允许 191 下面是一步从 5.7.2 更新到 5.7.3 的方法:: 193 interdiff -z ../patch-5.7.2.gz ../patch-5.7.3.gz | patch -p1 251 $ mv linux-5.6 linux-5.7 # 重命名源码目录 260 $ mv linux-5.6.1 linux-5.7 # 重命名源码目录 280 这类补丁不是增量补丁。例如,5.7.3 补丁不能应用到 5.7.2 内核源码 283 因此,要把 5.7.3 补丁应用到现有的 5.7.2 内核源码,必须先撤销 284 5.7.2 补丁(回到基础 5.7 内核源码),再应用新的 5.7.3 补丁。 288 $ cd ~/linux-5.7.2 # 进入内核源码目录 [all …]
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