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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMicroMipsDSPInstrFormats.td29 let Inst{31-26} = 0b000000;
40 let Inst{31-26} = 0b000000;
50 bits<2> ac;
52 let Inst{31-26} = 0b000000;
65 let Inst{31-26} = 0b000000;
78 let Inst{31-26} = 0b000000;
90 let Inst{31-26} = 0b000000;
103 let Inst{31-26} = 0b000000;
116 let Inst{31-26} = 0b000000;
129 let Inst{31-26} = 0b000000;
[all …]
H A DMicroMips32r6InstrFormats.td104 bits<2> rt;
121 let Inst{31-26} = 0b000000;
198 class PCREL19_FM_MMR6<bits<2> funct> : MipsR6Inst {
229 let Inst{31-26} = 0b000000;
307 let Inst{31-26} = 0b000000;
320 let Inst{31-26} = 0b000000;
332 bits<2> bp;
336 let Inst{31-26} = 0b000000;
362 bits<2> imm2;
366 let Inst{31-26} = 0b000000;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/
H A Darm,hdlcd.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
62 hdlcd@2b000000 {
H A Darm,hdlcd.txt36 hdlcd@2b000000 {
/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am62a-wakeup.dtsi36 wkup_uart0: serial@2b300000 {
46 wkup_i2c0: i2c@2b200000 {
58 wkup_rtc0: rtc@2b1f0000 {
68 wkup_rti0: watchdog@2b000000 {
74 assigned-clock-parents = <&k3_clks 132 2>;
H A Dk3-am62p-wakeup.dtsi33 wkup_uart0: serial@2b300000 {
43 wkup_i2c0: i2c@2b200000 {
55 wkup_rtc0: rtc@2b1f0000 {
65 wkup_rti0: watchdog@2b000000 {
71 assigned-clock-parents = <&k3_clks 132 2>;
H A Dk3-am62-wakeup.dtsi41 target-module@2b300050 {
71 wkup_i2c0: i2c@2b200000 {
83 wkup_rtc0: rtc@2b1f0000 {
93 wkup_rti0: watchdog@2b000000 {
99 assigned-clock-parents = <&k3_clks 132 2>;
H A Dk3-am62p-j722s-common-wakeup.dtsi39 wkup_uart0: serial@2b300000 {
49 wkup_i2c0: i2c@2b200000 {
61 wkup_rtc0: rtc@2b1f0000 {
71 wkup_rti0: watchdog@2b000000 {
77 assigned-clock-parents = <&k3_clks 132 2>;
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dqcs8550.dtsi12 #address-cells = <2>;
13 #size-cells = <2>;
27 * 2. Firmware related memory regions which are shared with Kernel
92 q6_mpss_dtb_mem: q6-mpss-dtb-region@9b000000 {
H A Dipq5018.dtsi15 #address-cells = <2>;
16 #size-cells = <2>;
56 cache-level = <2>;
103 #address-cells = <2>;
104 #size-cells = <2>;
155 #gpio-cells = <2>;
158 #interrupt-cells = <2>;
282 intc: interrupt-controller@b000000 {
356 frame-number = <2>;
394 interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
H A Dipq5332.dtsi15 #address-cells = <2>;
16 #size-cells = <2>;
54 CPU2: cpu@2 {
76 cache-level = <2>;
123 #address-cells = <2>;
124 #size-cells = <2>;
178 bits = <7 2>;
194 #gpio-cells = <2>;
197 #interrupt-cells = <2>;
273 dmas = <&blsp_dma 2>, <&blsp_dma 3>;
[all …]
H A Dsdm670-google-sargo.dts38 #address-cells = <2>;
39 #size-cells = <2>;
81 #address-cells = <2>;
82 #size-cells = <2>;
84 mpss_region: mpss@8b000000 {
473 data-lanes = <0 1 2 3>;
529 drive-strength = <2>;
552 drive-strength = <2>;
560 drive-strength = <2>;
567 drive-strength = <2>;
/freebsd/sys/contrib/device-tree/Bindings/arm/mediatek/
H A Dmediatek,mt8192-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
180 ipesys: clock-controller@1b000000 {
H A Dmediatek,mt8195-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
227 vencsys_core1: clock-controller@1b000000 {
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dmediatek,mt8192-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
180 ipesys: clock-controller@1b000000 {
H A Dmediatek,mt8195-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
227 vencsys_core1: clock-controller@1b000000 {
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrInfoF1.td39 def SDT_BITCAST_TO_LOHI : SDTypeProfile<2, 1, [SDTCisSameAs<0, 1>]>;
41 def SDT_BITCAST_FROM_LOHI : SDTypeProfile<1, 2, [SDTCisSameAs<1, 2>]>;
93 let DecoderMethod = "decodeUImmOperand<8, 2>";
108 def FADDM : F_XYZ<0x2, 0b000000, "faddm", "", BinOpFrag<(fadd node:$LHS, node:$RHS)>, sFPR64_V_OP>;
123 defm FADD : FT_XYZ<0b000000, "fadd", BinOpFrag<(fadd node:$LHS, node:$RHS)>>;
206 def rnFSTOSI : F_XZ_TRANS<0b000000, "fstosi.rn", sFPR32Op, sFPR32Op>;
/freebsd/sys/contrib/device-tree/src/arm/arm/
H A Dvexpress-v2p-ca15-tc1.dts20 #address-cells = <2>;
21 #size-cells = <2>;
57 #address-cells = <2>;
58 #size-cells = <2>;
61 /* Chipselect 2 is physically at 0x18000000 */
70 hdlcd@2b000000 {
78 memory-controller@2b0a0000 {
85 wdt@2b060000 {
94 gic: interrupt-controller@2c001000 {
202 arm,vexpress-sysreg,func = <2 0>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/remoteproc/
H A Dti,pru-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
163 icssg0: icssg@b000000 {
186 interrupts = <16 2 2>;
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt6779.dtsi16 #address-cells = <2>;
17 #size-cells = <2>;
42 cpu2: cpu@2 {
115 #address-cells = <2>;
116 #size-cells = <2>;
179 #gpio-cells = <2>;
182 #interrupt-cells = <2>;
281 ipesys: clock-controller@1b000000 {
/freebsd/sys/contrib/device-tree/src/arm/gemini/
H A Dgemini.dtsi24 bank-width = <2>;
174 reg-shift = <2>;
182 <15 IRQ_TYPE_EDGE_FALLING>, /* Timer 2 */
228 #interrupt-cells = <2>;
231 power-controller@4b000000 {
246 #gpio-cells = <2>;
248 #interrupt-cells = <2>;
258 #gpio-cells = <2>;
260 #interrupt-cells = <2>;
270 #gpio-cells = <2>;
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrFormatsV.td25 class RISCVMOP<bits<2> val> {
26 bits<2> Value = val;
97 let Inst{30-25} = 0b000000;
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8-ss-conn.dtsi38 conn_subsys: bus@5b000000 {
93 fsl,tuning-step = <2>;
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcInstrInfo.td119 def ADDRrr : ComplexPattern<iPTR, 2, "SelectADDRrr", [], []>;
120 def ADDRri : ComplexPattern<iPTR, 2, "SelectADDRri", [], []>;
247 SDTypeProfile<0, 2, [SDTCisInt<0>, SDTCisSameAs<0, 1>]>;
249 SDTypeProfile<0, 2, [SDTCisFP<0>, SDTCisSameAs<0, 1>]>;
251 SDTypeProfile<0, 2, [SDTCisVT<0, OtherVT>, SDTCisVT<1, i32>]>;
253 SDTypeProfile<0, 3, [SDTCisVT<0, OtherVT>, SDTCisVT<1, i32>, SDTCisVT<2, i64>]>;
255 SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>, SDTCisVT<3, i32>]>;
257 SDTypeProfile<1, 4, [SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>, SDTCisVT<3, i32>, SDTCisVT<4, i64>]>;
268 SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisSameAs<0, 1>, SDTCisPtrTy<2>]>;
270 SDTypeProfile<1, 2, [SDTCisPtrTy<0>, SDTCisPtrTy<1>]>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/mediatek/
H A Dmt7629.dtsi156 #gpio-cells = <2>;
157 #interrupt-cells = <2>;
246 #pwm-cells = <2>;
375 #size-cells = <2>;
403 <0 0 0 2 &pcie_intc1 1>,
404 <0 0 0 3 &pcie_intc1 2>,
430 ethsys: syscon@1b000000 {

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