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/linux/arch/sparc/include/asm/
H A Dvisasm.h18 be,pt %icc, 297f; \
19 sethi %hi(297f), %g7; \
22 or %g7, %lo(297f), %g7; \
23 297: wr %g0, FPRS_FEF, %fprs; \
40 be,pt %icc, 297f; \
43 297: wr %o5, FPRS_FEF, %fprs;
/linux/drivers/clk/hisilicon/
H A Dcrg-hi3516cv300.c50 { HI3516CV300_FIXED_297M, "297m", NULL, 0, 297000000, },
56 "24m", "83.3m", "148.5m", "198m", "297m"
/linux/drivers/gpu/drm/renesas/rcar-du/
H A Drcar_dw_hdmi.c46 * The maximum supported clock frequency is 297 MHz, as shown in the PHY in rcar_hdmi_mode_valid()
/linux/drivers/staging/media/atomisp/pci/isp/kernels/ctc/ctc_1.0/
H A Dia_css_ctc_table.host.c38 321, 318, 312, 308, 304, 300, 297, 294,
/linux/include/dt-bindings/clock/
H A Dexynos5250.h101 #define CLK_I2C3 297
H A Dtegra30-car.h262 /* 297 */
H A Dexynos4.h135 #define CLK_SDMMC0 297
H A Dqcom,gcc-mdm9615.h307 #define USB_HS3_XCVR_CLK 297
H A Dtegra194-clock.h292 #define TEGRA194_CLK_PVA0_VPS 297
H A Dqcom,gcc-msm8960.h305 #define USB_HS3_XCVR_CLK 297
H A Dqcom,gcc-msm8974.h306 #define GCC_CE1_AXI_CLK_SLEEP_ENA 297
H A Dqcom,gcc-apq8084.h306 #define GCC_UFS_RX_SYMBOL_0_CLK 297
H A Drk3568-cru.h361 #define CLK_UART4_SRC 297
760 #define SRST_IEP_CORE 297
H A Dtegra114-car.h329 /* 297 */
/linux/Documentation/devicetree/bindings/net/
H A Drenesas,r8a779f0-ether-switch.yaml190 <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
/linux/include/dt-bindings/arm/
H A Dqcom,ids.h148 #define QCOM_ID_MDM9207 297
/linux/drivers/pinctrl/
H A Dpinctrl-gemini.c465 PINCTRL_PIN(297, "U10 GMAC1 TXD2"),
540 243, 244, 261, 262, 279, 280, 281, 296, 297, 298, 299, 315, 316, 317
630 296, 315, 297, 279, 261, 243, 316, 298, 280, 262, 244, 317, 299, 281,
694 static const unsigned int gpio2a_3512_pins[] = { 315, 297, 279, 261 };
1329 PINCTRL_PIN(297, "R18 GPIO0 26"),
1564 263, 282, 301, 320, 283, 302, 321, 317, 379, 295, 359, 339, 297, 318,
1576 263, 282, 301, 320, 283, 302, 321, 317, 379, 295, 359, 339, 297, 318,
1605 static const unsigned int gpio0g_3516_pins[] = { 317, 379, 297, 318, 276, 319 };
2334 GEMINI_CFGPIN(297, GLOBAL_GMAC1_DATA_SKEW, 24, 27), /* GMAC1 TXD2 */
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8dxl-ss-adma.dtsi153 <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
/linux/Documentation/devicetree/bindings/media/
H A Dqcom,sdm660-camss.yaml320 <GIC_SPI 297 IRQ_TYPE_EDGE_RISING>,
H A Dqcom,msm8996-camss.yaml305 <GIC_SPI 297 IRQ_TYPE_EDGE_RISING>,
/linux/tools/perf/arch/mips/entry/syscalls/
H A Dsyscall_n64.tbl308 297 n64 prlimit64 sys_prlimit64
/linux/drivers/staging/media/atomisp/pci/
H A Datomisp_tables.h162 321, 318, 312, 308, 304, 300, 297, 294,
/linux/arch/arm/mm/
H A Dcache-v4wb.S40 * 65536 296 297 296 351 358 361
/linux/arch/mips/kernel/syscalls/
H A Dsyscall_n64.tbl308 297 n64 prlimit64 sys_prlimit64
/linux/arch/arm64/boot/dts/ti/
H A Dk3-j721e-main.dtsi1058 power-domains = <&k3_pds 297 TI_SCI_PD_EXCLUSIVE>;
1059 clocks = <&k3_clks 297 1>, <&k3_clks 297 9>, <&cmn_refclk>;
1061 assigned-clocks = <&k3_clks 297 9>;
1062 assigned-clock-parents = <&k3_clks 297 10>;
1087 assigned-clock-parents = <&k3_clks 297 9>,
1088 <&k3_clks 297 9>,
1089 <&k3_clks 297 9>;
1539 interrupts = <296>, <297>, <298>;

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